1 /* 2 * Copyright (C) 1991, 1992 Linus Torvalds 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs 4 * 5 * Pentium III FXSR, SSE support 6 * Gareth Hughes <gareth@valinux.com>, May 2000 7 */ 8 9 /* 10 * Handle hardware traps and faults. 11 */ 12 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 15 #include <linux/context_tracking.h> 16 #include <linux/interrupt.h> 17 #include <linux/kallsyms.h> 18 #include <linux/spinlock.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/kdebug.h> 22 #include <linux/kgdb.h> 23 #include <linux/kernel.h> 24 #include <linux/export.h> 25 #include <linux/ptrace.h> 26 #include <linux/uprobes.h> 27 #include <linux/string.h> 28 #include <linux/delay.h> 29 #include <linux/errno.h> 30 #include <linux/kexec.h> 31 #include <linux/sched.h> 32 #include <linux/sched/task_stack.h> 33 #include <linux/timer.h> 34 #include <linux/init.h> 35 #include <linux/bug.h> 36 #include <linux/nmi.h> 37 #include <linux/mm.h> 38 #include <linux/smp.h> 39 #include <linux/io.h> 40 41 #ifdef CONFIG_EISA 42 #include <linux/ioport.h> 43 #include <linux/eisa.h> 44 #endif 45 46 #if defined(CONFIG_EDAC) 47 #include <linux/edac.h> 48 #endif 49 50 #include <asm/kmemcheck.h> 51 #include <asm/stacktrace.h> 52 #include <asm/processor.h> 53 #include <asm/debugreg.h> 54 #include <linux/atomic.h> 55 #include <asm/text-patching.h> 56 #include <asm/ftrace.h> 57 #include <asm/traps.h> 58 #include <asm/desc.h> 59 #include <asm/fpu/internal.h> 60 #include <asm/mce.h> 61 #include <asm/fixmap.h> 62 #include <asm/mach_traps.h> 63 #include <asm/alternative.h> 64 #include <asm/fpu/xstate.h> 65 #include <asm/trace/mpx.h> 66 #include <asm/mpx.h> 67 #include <asm/vm86.h> 68 69 #ifdef CONFIG_X86_64 70 #include <asm/x86_init.h> 71 #include <asm/pgalloc.h> 72 #include <asm/proto.h> 73 74 /* No need to be aligned, but done to keep all IDTs defined the same way. */ 75 gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss; 76 #else 77 #include <asm/processor-flags.h> 78 #include <asm/setup.h> 79 #include <asm/proto.h> 80 #endif 81 82 /* Must be page-aligned because the real IDT is used in a fixmap. */ 83 gate_desc idt_table[NR_VECTORS] __page_aligned_bss; 84 85 DECLARE_BITMAP(used_vectors, NR_VECTORS); 86 EXPORT_SYMBOL_GPL(used_vectors); 87 88 static inline void cond_local_irq_enable(struct pt_regs *regs) 89 { 90 if (regs->flags & X86_EFLAGS_IF) 91 local_irq_enable(); 92 } 93 94 static inline void cond_local_irq_disable(struct pt_regs *regs) 95 { 96 if (regs->flags & X86_EFLAGS_IF) 97 local_irq_disable(); 98 } 99 100 /* 101 * In IST context, we explicitly disable preemption. This serves two 102 * purposes: it makes it much less likely that we would accidentally 103 * schedule in IST context and it will force a warning if we somehow 104 * manage to schedule by accident. 105 */ 106 void ist_enter(struct pt_regs *regs) 107 { 108 if (user_mode(regs)) { 109 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 110 } else { 111 /* 112 * We might have interrupted pretty much anything. In 113 * fact, if we're a machine check, we can even interrupt 114 * NMI processing. We don't want in_nmi() to return true, 115 * but we need to notify RCU. 116 */ 117 rcu_nmi_enter(); 118 } 119 120 preempt_disable(); 121 122 /* This code is a bit fragile. Test it. */ 123 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work"); 124 } 125 126 void ist_exit(struct pt_regs *regs) 127 { 128 preempt_enable_no_resched(); 129 130 if (!user_mode(regs)) 131 rcu_nmi_exit(); 132 } 133 134 /** 135 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception 136 * @regs: regs passed to the IST exception handler 137 * 138 * IST exception handlers normally cannot schedule. As a special 139 * exception, if the exception interrupted userspace code (i.e. 140 * user_mode(regs) would return true) and the exception was not 141 * a double fault, it can be safe to schedule. ist_begin_non_atomic() 142 * begins a non-atomic section within an ist_enter()/ist_exit() region. 143 * Callers are responsible for enabling interrupts themselves inside 144 * the non-atomic section, and callers must call ist_end_non_atomic() 145 * before ist_exit(). 146 */ 147 void ist_begin_non_atomic(struct pt_regs *regs) 148 { 149 BUG_ON(!user_mode(regs)); 150 151 /* 152 * Sanity check: we need to be on the normal thread stack. This 153 * will catch asm bugs and any attempt to use ist_preempt_enable 154 * from double_fault. 155 */ 156 BUG_ON((unsigned long)(current_top_of_stack() - 157 current_stack_pointer()) >= THREAD_SIZE); 158 159 preempt_enable_no_resched(); 160 } 161 162 /** 163 * ist_end_non_atomic() - begin a non-atomic section in an IST exception 164 * 165 * Ends a non-atomic section started with ist_begin_non_atomic(). 166 */ 167 void ist_end_non_atomic(void) 168 { 169 preempt_disable(); 170 } 171 172 static nokprobe_inline int 173 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, 174 struct pt_regs *regs, long error_code) 175 { 176 if (v8086_mode(regs)) { 177 /* 178 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. 179 * On nmi (interrupt 2), do_trap should not be called. 180 */ 181 if (trapnr < X86_TRAP_UD) { 182 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, 183 error_code, trapnr)) 184 return 0; 185 } 186 return -1; 187 } 188 189 if (!user_mode(regs)) { 190 if (!fixup_exception(regs, trapnr)) { 191 tsk->thread.error_code = error_code; 192 tsk->thread.trap_nr = trapnr; 193 die(str, regs, error_code); 194 } 195 return 0; 196 } 197 198 return -1; 199 } 200 201 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr, 202 siginfo_t *info) 203 { 204 unsigned long siaddr; 205 int sicode; 206 207 switch (trapnr) { 208 default: 209 return SEND_SIG_PRIV; 210 211 case X86_TRAP_DE: 212 sicode = FPE_INTDIV; 213 siaddr = uprobe_get_trap_addr(regs); 214 break; 215 case X86_TRAP_UD: 216 sicode = ILL_ILLOPN; 217 siaddr = uprobe_get_trap_addr(regs); 218 break; 219 case X86_TRAP_AC: 220 sicode = BUS_ADRALN; 221 siaddr = 0; 222 break; 223 } 224 225 info->si_signo = signr; 226 info->si_errno = 0; 227 info->si_code = sicode; 228 info->si_addr = (void __user *)siaddr; 229 return info; 230 } 231 232 static void 233 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, 234 long error_code, siginfo_t *info) 235 { 236 struct task_struct *tsk = current; 237 238 239 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) 240 return; 241 /* 242 * We want error_code and trap_nr set for userspace faults and 243 * kernelspace faults which result in die(), but not 244 * kernelspace faults which are fixed up. die() gives the 245 * process no chance to handle the signal and notice the 246 * kernel fault information, so that won't result in polluting 247 * the information about previously queued, but not yet 248 * delivered, faults. See also do_general_protection below. 249 */ 250 tsk->thread.error_code = error_code; 251 tsk->thread.trap_nr = trapnr; 252 253 if (show_unhandled_signals && unhandled_signal(tsk, signr) && 254 printk_ratelimit()) { 255 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", 256 tsk->comm, tsk->pid, str, 257 regs->ip, regs->sp, error_code); 258 print_vma_addr(KERN_CONT " in ", regs->ip); 259 pr_cont("\n"); 260 } 261 262 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk); 263 } 264 NOKPROBE_SYMBOL(do_trap); 265 266 static void do_error_trap(struct pt_regs *regs, long error_code, char *str, 267 unsigned long trapnr, int signr) 268 { 269 siginfo_t info; 270 271 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 272 273 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) != 274 NOTIFY_STOP) { 275 cond_local_irq_enable(regs); 276 do_trap(trapnr, signr, str, regs, error_code, 277 fill_trap_info(regs, signr, trapnr, &info)); 278 } 279 } 280 281 #define DO_ERROR(trapnr, signr, str, name) \ 282 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ 283 { \ 284 do_error_trap(regs, error_code, str, trapnr, signr); \ 285 } 286 287 DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error) 288 DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) 289 DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op) 290 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun) 291 DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) 292 DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) 293 DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) 294 DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check) 295 296 #ifdef CONFIG_VMAP_STACK 297 __visible void __noreturn handle_stack_overflow(const char *message, 298 struct pt_regs *regs, 299 unsigned long fault_address) 300 { 301 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n", 302 (void *)fault_address, current->stack, 303 (char *)current->stack + THREAD_SIZE - 1); 304 die(message, regs, 0); 305 306 /* Be absolutely certain we don't return. */ 307 panic(message); 308 } 309 #endif 310 311 #ifdef CONFIG_X86_64 312 /* Runs on IST stack */ 313 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) 314 { 315 static const char str[] = "double fault"; 316 struct task_struct *tsk = current; 317 #ifdef CONFIG_VMAP_STACK 318 unsigned long cr2; 319 #endif 320 321 #ifdef CONFIG_X86_ESPFIX64 322 extern unsigned char native_irq_return_iret[]; 323 324 /* 325 * If IRET takes a non-IST fault on the espfix64 stack, then we 326 * end up promoting it to a doublefault. In that case, modify 327 * the stack to make it look like we just entered the #GP 328 * handler from user space, similar to bad_iret. 329 * 330 * No need for ist_enter here because we don't use RCU. 331 */ 332 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY && 333 regs->cs == __KERNEL_CS && 334 regs->ip == (unsigned long)native_irq_return_iret) 335 { 336 struct pt_regs *normal_regs = task_pt_regs(current); 337 338 /* Fake a #GP(0) from userspace. */ 339 memmove(&normal_regs->ip, (void *)regs->sp, 5*8); 340 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */ 341 regs->ip = (unsigned long)general_protection; 342 regs->sp = (unsigned long)&normal_regs->orig_ax; 343 344 return; 345 } 346 #endif 347 348 ist_enter(regs); 349 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); 350 351 tsk->thread.error_code = error_code; 352 tsk->thread.trap_nr = X86_TRAP_DF; 353 354 #ifdef CONFIG_VMAP_STACK 355 /* 356 * If we overflow the stack into a guard page, the CPU will fail 357 * to deliver #PF and will send #DF instead. Similarly, if we 358 * take any non-IST exception while too close to the bottom of 359 * the stack, the processor will get a page fault while 360 * delivering the exception and will generate a double fault. 361 * 362 * According to the SDM (footnote in 6.15 under "Interrupt 14 - 363 * Page-Fault Exception (#PF): 364 * 365 * Processors update CR2 whenever a page fault is detected. If a 366 * second page fault occurs while an earlier page fault is being 367 * deliv- ered, the faulting linear address of the second fault will 368 * overwrite the contents of CR2 (replacing the previous 369 * address). These updates to CR2 occur even if the page fault 370 * results in a double fault or occurs during the delivery of a 371 * double fault. 372 * 373 * The logic below has a small possibility of incorrectly diagnosing 374 * some errors as stack overflows. For example, if the IDT or GDT 375 * gets corrupted such that #GP delivery fails due to a bad descriptor 376 * causing #GP and we hit this condition while CR2 coincidentally 377 * points to the stack guard page, we'll think we overflowed the 378 * stack. Given that we're going to panic one way or another 379 * if this happens, this isn't necessarily worth fixing. 380 * 381 * If necessary, we could improve the test by only diagnosing 382 * a stack overflow if the saved RSP points within 47 bytes of 383 * the bottom of the stack: if RSP == tsk_stack + 48 and we 384 * take an exception, the stack is already aligned and there 385 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a 386 * possible error code, so a stack overflow would *not* double 387 * fault. With any less space left, exception delivery could 388 * fail, and, as a practical matter, we've overflowed the 389 * stack even if the actual trigger for the double fault was 390 * something else. 391 */ 392 cr2 = read_cr2(); 393 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE) 394 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2); 395 #endif 396 397 #ifdef CONFIG_DOUBLEFAULT 398 df_debug(regs, error_code); 399 #endif 400 /* 401 * This is always a kernel trap and never fixable (and thus must 402 * never return). 403 */ 404 for (;;) 405 die(str, regs, error_code); 406 } 407 #endif 408 409 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code) 410 { 411 const struct mpx_bndcsr *bndcsr; 412 siginfo_t *info; 413 414 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 415 if (notify_die(DIE_TRAP, "bounds", regs, error_code, 416 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP) 417 return; 418 cond_local_irq_enable(regs); 419 420 if (!user_mode(regs)) 421 die("bounds", regs, error_code); 422 423 if (!cpu_feature_enabled(X86_FEATURE_MPX)) { 424 /* The exception is not from Intel MPX */ 425 goto exit_trap; 426 } 427 428 /* 429 * We need to look at BNDSTATUS to resolve this exception. 430 * A NULL here might mean that it is in its 'init state', 431 * which is all zeros which indicates MPX was not 432 * responsible for the exception. 433 */ 434 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR); 435 if (!bndcsr) 436 goto exit_trap; 437 438 trace_bounds_exception_mpx(bndcsr); 439 /* 440 * The error code field of the BNDSTATUS register communicates status 441 * information of a bound range exception #BR or operation involving 442 * bound directory. 443 */ 444 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) { 445 case 2: /* Bound directory has invalid entry. */ 446 if (mpx_handle_bd_fault()) 447 goto exit_trap; 448 break; /* Success, it was handled */ 449 case 1: /* Bound violation. */ 450 info = mpx_generate_siginfo(regs); 451 if (IS_ERR(info)) { 452 /* 453 * We failed to decode the MPX instruction. Act as if 454 * the exception was not caused by MPX. 455 */ 456 goto exit_trap; 457 } 458 /* 459 * Success, we decoded the instruction and retrieved 460 * an 'info' containing the address being accessed 461 * which caused the exception. This information 462 * allows and application to possibly handle the 463 * #BR exception itself. 464 */ 465 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info); 466 kfree(info); 467 break; 468 case 0: /* No exception caused by Intel MPX operations. */ 469 goto exit_trap; 470 default: 471 die("bounds", regs, error_code); 472 } 473 474 return; 475 476 exit_trap: 477 /* 478 * This path out is for all the cases where we could not 479 * handle the exception in some way (like allocating a 480 * table or telling userspace about it. We will also end 481 * up here if the kernel has MPX turned off at compile 482 * time.. 483 */ 484 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL); 485 } 486 487 dotraplinkage void 488 do_general_protection(struct pt_regs *regs, long error_code) 489 { 490 struct task_struct *tsk; 491 492 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 493 cond_local_irq_enable(regs); 494 495 if (v8086_mode(regs)) { 496 local_irq_enable(); 497 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); 498 return; 499 } 500 501 tsk = current; 502 if (!user_mode(regs)) { 503 if (fixup_exception(regs, X86_TRAP_GP)) 504 return; 505 506 tsk->thread.error_code = error_code; 507 tsk->thread.trap_nr = X86_TRAP_GP; 508 if (notify_die(DIE_GPF, "general protection fault", regs, error_code, 509 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) 510 die("general protection fault", regs, error_code); 511 return; 512 } 513 514 tsk->thread.error_code = error_code; 515 tsk->thread.trap_nr = X86_TRAP_GP; 516 517 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && 518 printk_ratelimit()) { 519 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", 520 tsk->comm, task_pid_nr(tsk), 521 regs->ip, regs->sp, error_code); 522 print_vma_addr(KERN_CONT " in ", regs->ip); 523 pr_cont("\n"); 524 } 525 526 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); 527 } 528 NOKPROBE_SYMBOL(do_general_protection); 529 530 /* May run on IST stack. */ 531 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code) 532 { 533 #ifdef CONFIG_DYNAMIC_FTRACE 534 /* 535 * ftrace must be first, everything else may cause a recursive crash. 536 * See note by declaration of modifying_ftrace_code in ftrace.c 537 */ 538 if (unlikely(atomic_read(&modifying_ftrace_code)) && 539 ftrace_int3_handler(regs)) 540 return; 541 #endif 542 if (poke_int3_handler(regs)) 543 return; 544 545 ist_enter(regs); 546 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 547 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP 548 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, 549 SIGTRAP) == NOTIFY_STOP) 550 goto exit; 551 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ 552 553 #ifdef CONFIG_KPROBES 554 if (kprobe_int3_handler(regs)) 555 goto exit; 556 #endif 557 558 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, 559 SIGTRAP) == NOTIFY_STOP) 560 goto exit; 561 562 /* 563 * Let others (NMI) know that the debug stack is in use 564 * as we may switch to the interrupt stack. 565 */ 566 debug_stack_usage_inc(); 567 cond_local_irq_enable(regs); 568 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); 569 cond_local_irq_disable(regs); 570 debug_stack_usage_dec(); 571 exit: 572 ist_exit(regs); 573 } 574 NOKPROBE_SYMBOL(do_int3); 575 576 #ifdef CONFIG_X86_64 577 /* 578 * Help handler running on IST stack to switch off the IST stack if the 579 * interrupted code was in user mode. The actual stack switch is done in 580 * entry_64.S 581 */ 582 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs) 583 { 584 struct pt_regs *regs = task_pt_regs(current); 585 *regs = *eregs; 586 return regs; 587 } 588 NOKPROBE_SYMBOL(sync_regs); 589 590 struct bad_iret_stack { 591 void *error_entry_ret; 592 struct pt_regs regs; 593 }; 594 595 asmlinkage __visible notrace 596 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) 597 { 598 /* 599 * This is called from entry_64.S early in handling a fault 600 * caused by a bad iret to user mode. To handle the fault 601 * correctly, we want move our stack frame to task_pt_regs 602 * and we want to pretend that the exception came from the 603 * iret target. 604 */ 605 struct bad_iret_stack *new_stack = 606 container_of(task_pt_regs(current), 607 struct bad_iret_stack, regs); 608 609 /* Copy the IRET target to the new stack. */ 610 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8); 611 612 /* Copy the remainder of the stack from the current stack. */ 613 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip)); 614 615 BUG_ON(!user_mode(&new_stack->regs)); 616 return new_stack; 617 } 618 NOKPROBE_SYMBOL(fixup_bad_iret); 619 #endif 620 621 static bool is_sysenter_singlestep(struct pt_regs *regs) 622 { 623 /* 624 * We don't try for precision here. If we're anywhere in the region of 625 * code that can be single-stepped in the SYSENTER entry path, then 626 * assume that this is a useless single-step trap due to SYSENTER 627 * being invoked with TF set. (We don't know in advance exactly 628 * which instructions will be hit because BTF could plausibly 629 * be set.) 630 */ 631 #ifdef CONFIG_X86_32 632 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) < 633 (unsigned long)__end_SYSENTER_singlestep_region - 634 (unsigned long)__begin_SYSENTER_singlestep_region; 635 #elif defined(CONFIG_IA32_EMULATION) 636 return (regs->ip - (unsigned long)entry_SYSENTER_compat) < 637 (unsigned long)__end_entry_SYSENTER_compat - 638 (unsigned long)entry_SYSENTER_compat; 639 #else 640 return false; 641 #endif 642 } 643 644 /* 645 * Our handling of the processor debug registers is non-trivial. 646 * We do not clear them on entry and exit from the kernel. Therefore 647 * it is possible to get a watchpoint trap here from inside the kernel. 648 * However, the code in ./ptrace.c has ensured that the user can 649 * only set watchpoints on userspace addresses. Therefore the in-kernel 650 * watchpoint trap can only occur in code which is reading/writing 651 * from user space. Such code must not hold kernel locks (since it 652 * can equally take a page fault), therefore it is safe to call 653 * force_sig_info even though that claims and releases locks. 654 * 655 * Code in ./signal.c ensures that the debug control register 656 * is restored before we deliver any signal, and therefore that 657 * user code runs with the correct debug control register even though 658 * we clear it here. 659 * 660 * Being careful here means that we don't have to be as careful in a 661 * lot of more complicated places (task switching can be a bit lazy 662 * about restoring all the debug state, and ptrace doesn't have to 663 * find every occurrence of the TF bit that could be saved away even 664 * by user code) 665 * 666 * May run on IST stack. 667 */ 668 dotraplinkage void do_debug(struct pt_regs *regs, long error_code) 669 { 670 struct task_struct *tsk = current; 671 int user_icebp = 0; 672 unsigned long dr6; 673 int si_code; 674 675 ist_enter(regs); 676 677 get_debugreg(dr6, 6); 678 /* 679 * The Intel SDM says: 680 * 681 * Certain debug exceptions may clear bits 0-3. The remaining 682 * contents of the DR6 register are never cleared by the 683 * processor. To avoid confusion in identifying debug 684 * exceptions, debug handlers should clear the register before 685 * returning to the interrupted task. 686 * 687 * Keep it simple: clear DR6 immediately. 688 */ 689 set_debugreg(0, 6); 690 691 /* Filter out all the reserved bits which are preset to 1 */ 692 dr6 &= ~DR6_RESERVED; 693 694 /* 695 * The SDM says "The processor clears the BTF flag when it 696 * generates a debug exception." Clear TIF_BLOCKSTEP to keep 697 * TIF_BLOCKSTEP in sync with the hardware BTF flag. 698 */ 699 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); 700 701 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) && 702 is_sysenter_singlestep(regs))) { 703 dr6 &= ~DR_STEP; 704 if (!dr6) 705 goto exit; 706 /* 707 * else we might have gotten a single-step trap and hit a 708 * watchpoint at the same time, in which case we should fall 709 * through and handle the watchpoint. 710 */ 711 } 712 713 /* 714 * If dr6 has no reason to give us about the origin of this trap, 715 * then it's very likely the result of an icebp/int01 trap. 716 * User wants a sigtrap for that. 717 */ 718 if (!dr6 && user_mode(regs)) 719 user_icebp = 1; 720 721 /* Catch kmemcheck conditions! */ 722 if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) 723 goto exit; 724 725 /* Store the virtualized DR6 value */ 726 tsk->thread.debugreg6 = dr6; 727 728 #ifdef CONFIG_KPROBES 729 if (kprobe_debug_handler(regs)) 730 goto exit; 731 #endif 732 733 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code, 734 SIGTRAP) == NOTIFY_STOP) 735 goto exit; 736 737 /* 738 * Let others (NMI) know that the debug stack is in use 739 * as we may switch to the interrupt stack. 740 */ 741 debug_stack_usage_inc(); 742 743 /* It's safe to allow irq's after DR6 has been saved */ 744 cond_local_irq_enable(regs); 745 746 if (v8086_mode(regs)) { 747 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 748 X86_TRAP_DB); 749 cond_local_irq_disable(regs); 750 debug_stack_usage_dec(); 751 goto exit; 752 } 753 754 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) { 755 /* 756 * Historical junk that used to handle SYSENTER single-stepping. 757 * This should be unreachable now. If we survive for a while 758 * without anyone hitting this warning, we'll turn this into 759 * an oops. 760 */ 761 tsk->thread.debugreg6 &= ~DR_STEP; 762 set_tsk_thread_flag(tsk, TIF_SINGLESTEP); 763 regs->flags &= ~X86_EFLAGS_TF; 764 } 765 si_code = get_si_code(tsk->thread.debugreg6); 766 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) 767 send_sigtrap(tsk, regs, error_code, si_code); 768 cond_local_irq_disable(regs); 769 debug_stack_usage_dec(); 770 771 exit: 772 #if defined(CONFIG_X86_32) 773 /* 774 * This is the most likely code path that involves non-trivial use 775 * of the SYSENTER stack. Check that we haven't overrun it. 776 */ 777 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC, 778 "Overran or corrupted SYSENTER stack\n"); 779 #endif 780 ist_exit(regs); 781 } 782 NOKPROBE_SYMBOL(do_debug); 783 784 /* 785 * Note that we play around with the 'TS' bit in an attempt to get 786 * the correct behaviour even in the presence of the asynchronous 787 * IRQ13 behaviour 788 */ 789 static void math_error(struct pt_regs *regs, int error_code, int trapnr) 790 { 791 struct task_struct *task = current; 792 struct fpu *fpu = &task->thread.fpu; 793 siginfo_t info; 794 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : 795 "simd exception"; 796 797 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) 798 return; 799 cond_local_irq_enable(regs); 800 801 if (!user_mode(regs)) { 802 if (!fixup_exception(regs, trapnr)) { 803 task->thread.error_code = error_code; 804 task->thread.trap_nr = trapnr; 805 die(str, regs, error_code); 806 } 807 return; 808 } 809 810 /* 811 * Save the info for the exception handler and clear the error. 812 */ 813 fpu__save(fpu); 814 815 task->thread.trap_nr = trapnr; 816 task->thread.error_code = error_code; 817 info.si_signo = SIGFPE; 818 info.si_errno = 0; 819 info.si_addr = (void __user *)uprobe_get_trap_addr(regs); 820 821 info.si_code = fpu__exception_code(fpu, trapnr); 822 823 /* Retry when we get spurious exceptions: */ 824 if (!info.si_code) 825 return; 826 827 force_sig_info(SIGFPE, &info, task); 828 } 829 830 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) 831 { 832 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 833 math_error(regs, error_code, X86_TRAP_MF); 834 } 835 836 dotraplinkage void 837 do_simd_coprocessor_error(struct pt_regs *regs, long error_code) 838 { 839 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 840 math_error(regs, error_code, X86_TRAP_XF); 841 } 842 843 dotraplinkage void 844 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) 845 { 846 cond_local_irq_enable(regs); 847 } 848 849 dotraplinkage void 850 do_device_not_available(struct pt_regs *regs, long error_code) 851 { 852 unsigned long cr0; 853 854 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 855 856 #ifdef CONFIG_MATH_EMULATION 857 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) { 858 struct math_emu_info info = { }; 859 860 cond_local_irq_enable(regs); 861 862 info.regs = regs; 863 math_emulate(&info); 864 return; 865 } 866 #endif 867 868 /* This should not happen. */ 869 cr0 = read_cr0(); 870 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) { 871 /* Try to fix it up and carry on. */ 872 write_cr0(cr0 & ~X86_CR0_TS); 873 } else { 874 /* 875 * Something terrible happened, and we're better off trying 876 * to kill the task than getting stuck in a never-ending 877 * loop of #NM faults. 878 */ 879 die("unexpected #NM exception", regs, error_code); 880 } 881 } 882 NOKPROBE_SYMBOL(do_device_not_available); 883 884 #ifdef CONFIG_X86_32 885 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) 886 { 887 siginfo_t info; 888 889 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 890 local_irq_enable(); 891 892 info.si_signo = SIGILL; 893 info.si_errno = 0; 894 info.si_code = ILL_BADSTK; 895 info.si_addr = NULL; 896 if (notify_die(DIE_TRAP, "iret exception", regs, error_code, 897 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { 898 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, 899 &info); 900 } 901 } 902 #endif 903 904 /* Set of traps needed for early debugging. */ 905 void __init early_trap_init(void) 906 { 907 /* 908 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS 909 * is ready in cpu_init() <-- trap_init(). Before trap_init(), 910 * CPU runs at ring 0 so it is impossible to hit an invalid 911 * stack. Using the original stack works well enough at this 912 * early stage. DEBUG_STACK will be equipped after cpu_init() in 913 * trap_init(). 914 * 915 * We don't need to set trace_idt_table like set_intr_gate(), 916 * since we don't have trace_debug and it will be reset to 917 * 'debug' in trap_init() by set_intr_gate_ist(). 918 */ 919 set_intr_gate_notrace(X86_TRAP_DB, debug); 920 /* int3 can be called from all */ 921 set_system_intr_gate(X86_TRAP_BP, &int3); 922 #ifdef CONFIG_X86_32 923 set_intr_gate(X86_TRAP_PF, page_fault); 924 #endif 925 load_idt(&idt_descr); 926 } 927 928 void __init early_trap_pf_init(void) 929 { 930 #ifdef CONFIG_X86_64 931 set_intr_gate(X86_TRAP_PF, page_fault); 932 #endif 933 } 934 935 void __init trap_init(void) 936 { 937 int i; 938 939 #ifdef CONFIG_EISA 940 void __iomem *p = early_ioremap(0x0FFFD9, 4); 941 942 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) 943 EISA_bus = 1; 944 early_iounmap(p, 4); 945 #endif 946 947 set_intr_gate(X86_TRAP_DE, divide_error); 948 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); 949 /* int4 can be called from all */ 950 set_system_intr_gate(X86_TRAP_OF, &overflow); 951 set_intr_gate(X86_TRAP_BR, bounds); 952 set_intr_gate(X86_TRAP_UD, invalid_op); 953 set_intr_gate(X86_TRAP_NM, device_not_available); 954 #ifdef CONFIG_X86_32 955 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); 956 #else 957 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); 958 #endif 959 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun); 960 set_intr_gate(X86_TRAP_TS, invalid_TSS); 961 set_intr_gate(X86_TRAP_NP, segment_not_present); 962 set_intr_gate(X86_TRAP_SS, stack_segment); 963 set_intr_gate(X86_TRAP_GP, general_protection); 964 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug); 965 set_intr_gate(X86_TRAP_MF, coprocessor_error); 966 set_intr_gate(X86_TRAP_AC, alignment_check); 967 #ifdef CONFIG_X86_MCE 968 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); 969 #endif 970 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error); 971 972 /* Reserve all the builtin and the syscall vector: */ 973 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) 974 set_bit(i, used_vectors); 975 976 #ifdef CONFIG_IA32_EMULATION 977 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat); 978 set_bit(IA32_SYSCALL_VECTOR, used_vectors); 979 #endif 980 981 #ifdef CONFIG_X86_32 982 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32); 983 set_bit(IA32_SYSCALL_VECTOR, used_vectors); 984 #endif 985 986 /* 987 * Set the IDT descriptor to a fixed read-only location, so that the 988 * "sidt" instruction will not leak the location of the kernel, and 989 * to defend the IDT against arbitrary memory write vulnerabilities. 990 * It will be reloaded in cpu_init() */ 991 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); 992 idt_descr.address = fix_to_virt(FIX_RO_IDT); 993 994 /* 995 * Should be a barrier for any external CPU state: 996 */ 997 cpu_init(); 998 999 /* 1000 * X86_TRAP_DB and X86_TRAP_BP have been set 1001 * in early_trap_init(). However, ITS works only after 1002 * cpu_init() loads TSS. See comments in early_trap_init(). 1003 */ 1004 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); 1005 /* int3 can be called from all */ 1006 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); 1007 1008 x86_init.irqs.trap_init(); 1009 1010 #ifdef CONFIG_X86_64 1011 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16); 1012 set_nmi_gate(X86_TRAP_DB, &debug); 1013 set_nmi_gate(X86_TRAP_BP, &int3); 1014 #endif 1015 } 1016