1 /* 2 * Copyright (C) 1991, 1992 Linus Torvalds 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs 4 * 5 * Pentium III FXSR, SSE support 6 * Gareth Hughes <gareth@valinux.com>, May 2000 7 */ 8 9 /* 10 * Handle hardware traps and faults. 11 */ 12 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 15 #include <linux/context_tracking.h> 16 #include <linux/interrupt.h> 17 #include <linux/kallsyms.h> 18 #include <linux/spinlock.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/kdebug.h> 22 #include <linux/kgdb.h> 23 #include <linux/kernel.h> 24 #include <linux/export.h> 25 #include <linux/ptrace.h> 26 #include <linux/uprobes.h> 27 #include <linux/string.h> 28 #include <linux/delay.h> 29 #include <linux/errno.h> 30 #include <linux/kexec.h> 31 #include <linux/sched.h> 32 #include <linux/sched/task_stack.h> 33 #include <linux/timer.h> 34 #include <linux/init.h> 35 #include <linux/bug.h> 36 #include <linux/nmi.h> 37 #include <linux/mm.h> 38 #include <linux/smp.h> 39 #include <linux/io.h> 40 41 #if defined(CONFIG_EDAC) 42 #include <linux/edac.h> 43 #endif 44 45 #include <asm/kmemcheck.h> 46 #include <asm/stacktrace.h> 47 #include <asm/processor.h> 48 #include <asm/debugreg.h> 49 #include <linux/atomic.h> 50 #include <asm/text-patching.h> 51 #include <asm/ftrace.h> 52 #include <asm/traps.h> 53 #include <asm/desc.h> 54 #include <asm/fpu/internal.h> 55 #include <asm/mce.h> 56 #include <asm/fixmap.h> 57 #include <asm/mach_traps.h> 58 #include <asm/alternative.h> 59 #include <asm/fpu/xstate.h> 60 #include <asm/trace/mpx.h> 61 #include <asm/mpx.h> 62 #include <asm/vm86.h> 63 64 #ifdef CONFIG_X86_64 65 #include <asm/x86_init.h> 66 #include <asm/pgalloc.h> 67 #include <asm/proto.h> 68 #else 69 #include <asm/processor-flags.h> 70 #include <asm/setup.h> 71 #include <asm/proto.h> 72 #endif 73 74 DECLARE_BITMAP(used_vectors, NR_VECTORS); 75 76 static inline void cond_local_irq_enable(struct pt_regs *regs) 77 { 78 if (regs->flags & X86_EFLAGS_IF) 79 local_irq_enable(); 80 } 81 82 static inline void cond_local_irq_disable(struct pt_regs *regs) 83 { 84 if (regs->flags & X86_EFLAGS_IF) 85 local_irq_disable(); 86 } 87 88 /* 89 * In IST context, we explicitly disable preemption. This serves two 90 * purposes: it makes it much less likely that we would accidentally 91 * schedule in IST context and it will force a warning if we somehow 92 * manage to schedule by accident. 93 */ 94 void ist_enter(struct pt_regs *regs) 95 { 96 if (user_mode(regs)) { 97 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 98 } else { 99 /* 100 * We might have interrupted pretty much anything. In 101 * fact, if we're a machine check, we can even interrupt 102 * NMI processing. We don't want in_nmi() to return true, 103 * but we need to notify RCU. 104 */ 105 rcu_nmi_enter(); 106 } 107 108 preempt_disable(); 109 110 /* This code is a bit fragile. Test it. */ 111 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work"); 112 } 113 114 void ist_exit(struct pt_regs *regs) 115 { 116 preempt_enable_no_resched(); 117 118 if (!user_mode(regs)) 119 rcu_nmi_exit(); 120 } 121 122 /** 123 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception 124 * @regs: regs passed to the IST exception handler 125 * 126 * IST exception handlers normally cannot schedule. As a special 127 * exception, if the exception interrupted userspace code (i.e. 128 * user_mode(regs) would return true) and the exception was not 129 * a double fault, it can be safe to schedule. ist_begin_non_atomic() 130 * begins a non-atomic section within an ist_enter()/ist_exit() region. 131 * Callers are responsible for enabling interrupts themselves inside 132 * the non-atomic section, and callers must call ist_end_non_atomic() 133 * before ist_exit(). 134 */ 135 void ist_begin_non_atomic(struct pt_regs *regs) 136 { 137 BUG_ON(!user_mode(regs)); 138 139 /* 140 * Sanity check: we need to be on the normal thread stack. This 141 * will catch asm bugs and any attempt to use ist_preempt_enable 142 * from double_fault. 143 */ 144 BUG_ON((unsigned long)(current_top_of_stack() - 145 current_stack_pointer) >= THREAD_SIZE); 146 147 preempt_enable_no_resched(); 148 } 149 150 /** 151 * ist_end_non_atomic() - begin a non-atomic section in an IST exception 152 * 153 * Ends a non-atomic section started with ist_begin_non_atomic(). 154 */ 155 void ist_end_non_atomic(void) 156 { 157 preempt_disable(); 158 } 159 160 int is_valid_bugaddr(unsigned long addr) 161 { 162 unsigned short ud; 163 164 if (addr < TASK_SIZE_MAX) 165 return 0; 166 167 if (probe_kernel_address((unsigned short *)addr, ud)) 168 return 0; 169 170 return ud == INSN_UD0 || ud == INSN_UD2; 171 } 172 173 int fixup_bug(struct pt_regs *regs, int trapnr) 174 { 175 if (trapnr != X86_TRAP_UD) 176 return 0; 177 178 switch (report_bug(regs->ip, regs)) { 179 case BUG_TRAP_TYPE_NONE: 180 case BUG_TRAP_TYPE_BUG: 181 break; 182 183 case BUG_TRAP_TYPE_WARN: 184 regs->ip += LEN_UD0; 185 return 1; 186 } 187 188 return 0; 189 } 190 191 static nokprobe_inline int 192 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, 193 struct pt_regs *regs, long error_code) 194 { 195 if (v8086_mode(regs)) { 196 /* 197 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. 198 * On nmi (interrupt 2), do_trap should not be called. 199 */ 200 if (trapnr < X86_TRAP_UD) { 201 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, 202 error_code, trapnr)) 203 return 0; 204 } 205 return -1; 206 } 207 208 if (!user_mode(regs)) { 209 if (fixup_exception(regs, trapnr)) 210 return 0; 211 212 tsk->thread.error_code = error_code; 213 tsk->thread.trap_nr = trapnr; 214 die(str, regs, error_code); 215 } 216 217 return -1; 218 } 219 220 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr, 221 siginfo_t *info) 222 { 223 unsigned long siaddr; 224 int sicode; 225 226 switch (trapnr) { 227 default: 228 return SEND_SIG_PRIV; 229 230 case X86_TRAP_DE: 231 sicode = FPE_INTDIV; 232 siaddr = uprobe_get_trap_addr(regs); 233 break; 234 case X86_TRAP_UD: 235 sicode = ILL_ILLOPN; 236 siaddr = uprobe_get_trap_addr(regs); 237 break; 238 case X86_TRAP_AC: 239 sicode = BUS_ADRALN; 240 siaddr = 0; 241 break; 242 } 243 244 info->si_signo = signr; 245 info->si_errno = 0; 246 info->si_code = sicode; 247 info->si_addr = (void __user *)siaddr; 248 return info; 249 } 250 251 static void 252 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, 253 long error_code, siginfo_t *info) 254 { 255 struct task_struct *tsk = current; 256 257 258 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) 259 return; 260 /* 261 * We want error_code and trap_nr set for userspace faults and 262 * kernelspace faults which result in die(), but not 263 * kernelspace faults which are fixed up. die() gives the 264 * process no chance to handle the signal and notice the 265 * kernel fault information, so that won't result in polluting 266 * the information about previously queued, but not yet 267 * delivered, faults. See also do_general_protection below. 268 */ 269 tsk->thread.error_code = error_code; 270 tsk->thread.trap_nr = trapnr; 271 272 if (show_unhandled_signals && unhandled_signal(tsk, signr) && 273 printk_ratelimit()) { 274 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", 275 tsk->comm, tsk->pid, str, 276 regs->ip, regs->sp, error_code); 277 print_vma_addr(KERN_CONT " in ", regs->ip); 278 pr_cont("\n"); 279 } 280 281 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk); 282 } 283 NOKPROBE_SYMBOL(do_trap); 284 285 static void do_error_trap(struct pt_regs *regs, long error_code, char *str, 286 unsigned long trapnr, int signr) 287 { 288 siginfo_t info; 289 290 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 291 292 /* 293 * WARN*()s end up here; fix them up before we call the 294 * notifier chain. 295 */ 296 if (!user_mode(regs) && fixup_bug(regs, trapnr)) 297 return; 298 299 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) != 300 NOTIFY_STOP) { 301 cond_local_irq_enable(regs); 302 do_trap(trapnr, signr, str, regs, error_code, 303 fill_trap_info(regs, signr, trapnr, &info)); 304 } 305 } 306 307 #define DO_ERROR(trapnr, signr, str, name) \ 308 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ 309 { \ 310 do_error_trap(regs, error_code, str, trapnr, signr); \ 311 } 312 313 DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error) 314 DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) 315 DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op) 316 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun) 317 DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) 318 DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) 319 DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) 320 DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check) 321 322 #ifdef CONFIG_VMAP_STACK 323 __visible void __noreturn handle_stack_overflow(const char *message, 324 struct pt_regs *regs, 325 unsigned long fault_address) 326 { 327 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n", 328 (void *)fault_address, current->stack, 329 (char *)current->stack + THREAD_SIZE - 1); 330 die(message, regs, 0); 331 332 /* Be absolutely certain we don't return. */ 333 panic(message); 334 } 335 #endif 336 337 #ifdef CONFIG_X86_64 338 /* Runs on IST stack */ 339 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) 340 { 341 static const char str[] = "double fault"; 342 struct task_struct *tsk = current; 343 #ifdef CONFIG_VMAP_STACK 344 unsigned long cr2; 345 #endif 346 347 #ifdef CONFIG_X86_ESPFIX64 348 extern unsigned char native_irq_return_iret[]; 349 350 /* 351 * If IRET takes a non-IST fault on the espfix64 stack, then we 352 * end up promoting it to a doublefault. In that case, modify 353 * the stack to make it look like we just entered the #GP 354 * handler from user space, similar to bad_iret. 355 * 356 * No need for ist_enter here because we don't use RCU. 357 */ 358 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY && 359 regs->cs == __KERNEL_CS && 360 regs->ip == (unsigned long)native_irq_return_iret) 361 { 362 struct pt_regs *normal_regs = task_pt_regs(current); 363 364 /* Fake a #GP(0) from userspace. */ 365 memmove(&normal_regs->ip, (void *)regs->sp, 5*8); 366 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */ 367 regs->ip = (unsigned long)general_protection; 368 regs->sp = (unsigned long)&normal_regs->orig_ax; 369 370 return; 371 } 372 #endif 373 374 ist_enter(regs); 375 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); 376 377 tsk->thread.error_code = error_code; 378 tsk->thread.trap_nr = X86_TRAP_DF; 379 380 #ifdef CONFIG_VMAP_STACK 381 /* 382 * If we overflow the stack into a guard page, the CPU will fail 383 * to deliver #PF and will send #DF instead. Similarly, if we 384 * take any non-IST exception while too close to the bottom of 385 * the stack, the processor will get a page fault while 386 * delivering the exception and will generate a double fault. 387 * 388 * According to the SDM (footnote in 6.15 under "Interrupt 14 - 389 * Page-Fault Exception (#PF): 390 * 391 * Processors update CR2 whenever a page fault is detected. If a 392 * second page fault occurs while an earlier page fault is being 393 * deliv- ered, the faulting linear address of the second fault will 394 * overwrite the contents of CR2 (replacing the previous 395 * address). These updates to CR2 occur even if the page fault 396 * results in a double fault or occurs during the delivery of a 397 * double fault. 398 * 399 * The logic below has a small possibility of incorrectly diagnosing 400 * some errors as stack overflows. For example, if the IDT or GDT 401 * gets corrupted such that #GP delivery fails due to a bad descriptor 402 * causing #GP and we hit this condition while CR2 coincidentally 403 * points to the stack guard page, we'll think we overflowed the 404 * stack. Given that we're going to panic one way or another 405 * if this happens, this isn't necessarily worth fixing. 406 * 407 * If necessary, we could improve the test by only diagnosing 408 * a stack overflow if the saved RSP points within 47 bytes of 409 * the bottom of the stack: if RSP == tsk_stack + 48 and we 410 * take an exception, the stack is already aligned and there 411 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a 412 * possible error code, so a stack overflow would *not* double 413 * fault. With any less space left, exception delivery could 414 * fail, and, as a practical matter, we've overflowed the 415 * stack even if the actual trigger for the double fault was 416 * something else. 417 */ 418 cr2 = read_cr2(); 419 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE) 420 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2); 421 #endif 422 423 #ifdef CONFIG_DOUBLEFAULT 424 df_debug(regs, error_code); 425 #endif 426 /* 427 * This is always a kernel trap and never fixable (and thus must 428 * never return). 429 */ 430 for (;;) 431 die(str, regs, error_code); 432 } 433 #endif 434 435 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code) 436 { 437 const struct mpx_bndcsr *bndcsr; 438 siginfo_t *info; 439 440 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 441 if (notify_die(DIE_TRAP, "bounds", regs, error_code, 442 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP) 443 return; 444 cond_local_irq_enable(regs); 445 446 if (!user_mode(regs)) 447 die("bounds", regs, error_code); 448 449 if (!cpu_feature_enabled(X86_FEATURE_MPX)) { 450 /* The exception is not from Intel MPX */ 451 goto exit_trap; 452 } 453 454 /* 455 * We need to look at BNDSTATUS to resolve this exception. 456 * A NULL here might mean that it is in its 'init state', 457 * which is all zeros which indicates MPX was not 458 * responsible for the exception. 459 */ 460 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR); 461 if (!bndcsr) 462 goto exit_trap; 463 464 trace_bounds_exception_mpx(bndcsr); 465 /* 466 * The error code field of the BNDSTATUS register communicates status 467 * information of a bound range exception #BR or operation involving 468 * bound directory. 469 */ 470 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) { 471 case 2: /* Bound directory has invalid entry. */ 472 if (mpx_handle_bd_fault()) 473 goto exit_trap; 474 break; /* Success, it was handled */ 475 case 1: /* Bound violation. */ 476 info = mpx_generate_siginfo(regs); 477 if (IS_ERR(info)) { 478 /* 479 * We failed to decode the MPX instruction. Act as if 480 * the exception was not caused by MPX. 481 */ 482 goto exit_trap; 483 } 484 /* 485 * Success, we decoded the instruction and retrieved 486 * an 'info' containing the address being accessed 487 * which caused the exception. This information 488 * allows and application to possibly handle the 489 * #BR exception itself. 490 */ 491 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info); 492 kfree(info); 493 break; 494 case 0: /* No exception caused by Intel MPX operations. */ 495 goto exit_trap; 496 default: 497 die("bounds", regs, error_code); 498 } 499 500 return; 501 502 exit_trap: 503 /* 504 * This path out is for all the cases where we could not 505 * handle the exception in some way (like allocating a 506 * table or telling userspace about it. We will also end 507 * up here if the kernel has MPX turned off at compile 508 * time.. 509 */ 510 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL); 511 } 512 513 dotraplinkage void 514 do_general_protection(struct pt_regs *regs, long error_code) 515 { 516 struct task_struct *tsk; 517 518 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 519 cond_local_irq_enable(regs); 520 521 if (v8086_mode(regs)) { 522 local_irq_enable(); 523 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); 524 return; 525 } 526 527 tsk = current; 528 if (!user_mode(regs)) { 529 if (fixup_exception(regs, X86_TRAP_GP)) 530 return; 531 532 tsk->thread.error_code = error_code; 533 tsk->thread.trap_nr = X86_TRAP_GP; 534 if (notify_die(DIE_GPF, "general protection fault", regs, error_code, 535 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) 536 die("general protection fault", regs, error_code); 537 return; 538 } 539 540 tsk->thread.error_code = error_code; 541 tsk->thread.trap_nr = X86_TRAP_GP; 542 543 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && 544 printk_ratelimit()) { 545 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", 546 tsk->comm, task_pid_nr(tsk), 547 regs->ip, regs->sp, error_code); 548 print_vma_addr(KERN_CONT " in ", regs->ip); 549 pr_cont("\n"); 550 } 551 552 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); 553 } 554 NOKPROBE_SYMBOL(do_general_protection); 555 556 /* May run on IST stack. */ 557 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code) 558 { 559 #ifdef CONFIG_DYNAMIC_FTRACE 560 /* 561 * ftrace must be first, everything else may cause a recursive crash. 562 * See note by declaration of modifying_ftrace_code in ftrace.c 563 */ 564 if (unlikely(atomic_read(&modifying_ftrace_code)) && 565 ftrace_int3_handler(regs)) 566 return; 567 #endif 568 if (poke_int3_handler(regs)) 569 return; 570 571 ist_enter(regs); 572 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 573 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP 574 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, 575 SIGTRAP) == NOTIFY_STOP) 576 goto exit; 577 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ 578 579 #ifdef CONFIG_KPROBES 580 if (kprobe_int3_handler(regs)) 581 goto exit; 582 #endif 583 584 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, 585 SIGTRAP) == NOTIFY_STOP) 586 goto exit; 587 588 /* 589 * Let others (NMI) know that the debug stack is in use 590 * as we may switch to the interrupt stack. 591 */ 592 debug_stack_usage_inc(); 593 cond_local_irq_enable(regs); 594 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); 595 cond_local_irq_disable(regs); 596 debug_stack_usage_dec(); 597 exit: 598 ist_exit(regs); 599 } 600 NOKPROBE_SYMBOL(do_int3); 601 602 #ifdef CONFIG_X86_64 603 /* 604 * Help handler running on IST stack to switch off the IST stack if the 605 * interrupted code was in user mode. The actual stack switch is done in 606 * entry_64.S 607 */ 608 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs) 609 { 610 struct pt_regs *regs = task_pt_regs(current); 611 *regs = *eregs; 612 return regs; 613 } 614 NOKPROBE_SYMBOL(sync_regs); 615 616 struct bad_iret_stack { 617 void *error_entry_ret; 618 struct pt_regs regs; 619 }; 620 621 asmlinkage __visible notrace 622 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) 623 { 624 /* 625 * This is called from entry_64.S early in handling a fault 626 * caused by a bad iret to user mode. To handle the fault 627 * correctly, we want move our stack frame to task_pt_regs 628 * and we want to pretend that the exception came from the 629 * iret target. 630 */ 631 struct bad_iret_stack *new_stack = 632 container_of(task_pt_regs(current), 633 struct bad_iret_stack, regs); 634 635 /* Copy the IRET target to the new stack. */ 636 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8); 637 638 /* Copy the remainder of the stack from the current stack. */ 639 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip)); 640 641 BUG_ON(!user_mode(&new_stack->regs)); 642 return new_stack; 643 } 644 NOKPROBE_SYMBOL(fixup_bad_iret); 645 #endif 646 647 static bool is_sysenter_singlestep(struct pt_regs *regs) 648 { 649 /* 650 * We don't try for precision here. If we're anywhere in the region of 651 * code that can be single-stepped in the SYSENTER entry path, then 652 * assume that this is a useless single-step trap due to SYSENTER 653 * being invoked with TF set. (We don't know in advance exactly 654 * which instructions will be hit because BTF could plausibly 655 * be set.) 656 */ 657 #ifdef CONFIG_X86_32 658 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) < 659 (unsigned long)__end_SYSENTER_singlestep_region - 660 (unsigned long)__begin_SYSENTER_singlestep_region; 661 #elif defined(CONFIG_IA32_EMULATION) 662 return (regs->ip - (unsigned long)entry_SYSENTER_compat) < 663 (unsigned long)__end_entry_SYSENTER_compat - 664 (unsigned long)entry_SYSENTER_compat; 665 #else 666 return false; 667 #endif 668 } 669 670 /* 671 * Our handling of the processor debug registers is non-trivial. 672 * We do not clear them on entry and exit from the kernel. Therefore 673 * it is possible to get a watchpoint trap here from inside the kernel. 674 * However, the code in ./ptrace.c has ensured that the user can 675 * only set watchpoints on userspace addresses. Therefore the in-kernel 676 * watchpoint trap can only occur in code which is reading/writing 677 * from user space. Such code must not hold kernel locks (since it 678 * can equally take a page fault), therefore it is safe to call 679 * force_sig_info even though that claims and releases locks. 680 * 681 * Code in ./signal.c ensures that the debug control register 682 * is restored before we deliver any signal, and therefore that 683 * user code runs with the correct debug control register even though 684 * we clear it here. 685 * 686 * Being careful here means that we don't have to be as careful in a 687 * lot of more complicated places (task switching can be a bit lazy 688 * about restoring all the debug state, and ptrace doesn't have to 689 * find every occurrence of the TF bit that could be saved away even 690 * by user code) 691 * 692 * May run on IST stack. 693 */ 694 dotraplinkage void do_debug(struct pt_regs *regs, long error_code) 695 { 696 struct task_struct *tsk = current; 697 int user_icebp = 0; 698 unsigned long dr6; 699 int si_code; 700 701 ist_enter(regs); 702 703 get_debugreg(dr6, 6); 704 /* 705 * The Intel SDM says: 706 * 707 * Certain debug exceptions may clear bits 0-3. The remaining 708 * contents of the DR6 register are never cleared by the 709 * processor. To avoid confusion in identifying debug 710 * exceptions, debug handlers should clear the register before 711 * returning to the interrupted task. 712 * 713 * Keep it simple: clear DR6 immediately. 714 */ 715 set_debugreg(0, 6); 716 717 /* Filter out all the reserved bits which are preset to 1 */ 718 dr6 &= ~DR6_RESERVED; 719 720 /* 721 * The SDM says "The processor clears the BTF flag when it 722 * generates a debug exception." Clear TIF_BLOCKSTEP to keep 723 * TIF_BLOCKSTEP in sync with the hardware BTF flag. 724 */ 725 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); 726 727 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) && 728 is_sysenter_singlestep(regs))) { 729 dr6 &= ~DR_STEP; 730 if (!dr6) 731 goto exit; 732 /* 733 * else we might have gotten a single-step trap and hit a 734 * watchpoint at the same time, in which case we should fall 735 * through and handle the watchpoint. 736 */ 737 } 738 739 /* 740 * If dr6 has no reason to give us about the origin of this trap, 741 * then it's very likely the result of an icebp/int01 trap. 742 * User wants a sigtrap for that. 743 */ 744 if (!dr6 && user_mode(regs)) 745 user_icebp = 1; 746 747 /* Catch kmemcheck conditions! */ 748 if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) 749 goto exit; 750 751 /* Store the virtualized DR6 value */ 752 tsk->thread.debugreg6 = dr6; 753 754 #ifdef CONFIG_KPROBES 755 if (kprobe_debug_handler(regs)) 756 goto exit; 757 #endif 758 759 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code, 760 SIGTRAP) == NOTIFY_STOP) 761 goto exit; 762 763 /* 764 * Let others (NMI) know that the debug stack is in use 765 * as we may switch to the interrupt stack. 766 */ 767 debug_stack_usage_inc(); 768 769 /* It's safe to allow irq's after DR6 has been saved */ 770 cond_local_irq_enable(regs); 771 772 if (v8086_mode(regs)) { 773 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 774 X86_TRAP_DB); 775 cond_local_irq_disable(regs); 776 debug_stack_usage_dec(); 777 goto exit; 778 } 779 780 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) { 781 /* 782 * Historical junk that used to handle SYSENTER single-stepping. 783 * This should be unreachable now. If we survive for a while 784 * without anyone hitting this warning, we'll turn this into 785 * an oops. 786 */ 787 tsk->thread.debugreg6 &= ~DR_STEP; 788 set_tsk_thread_flag(tsk, TIF_SINGLESTEP); 789 regs->flags &= ~X86_EFLAGS_TF; 790 } 791 si_code = get_si_code(tsk->thread.debugreg6); 792 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) 793 send_sigtrap(tsk, regs, error_code, si_code); 794 cond_local_irq_disable(regs); 795 debug_stack_usage_dec(); 796 797 exit: 798 #if defined(CONFIG_X86_32) 799 /* 800 * This is the most likely code path that involves non-trivial use 801 * of the SYSENTER stack. Check that we haven't overrun it. 802 */ 803 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC, 804 "Overran or corrupted SYSENTER stack\n"); 805 #endif 806 ist_exit(regs); 807 } 808 NOKPROBE_SYMBOL(do_debug); 809 810 /* 811 * Note that we play around with the 'TS' bit in an attempt to get 812 * the correct behaviour even in the presence of the asynchronous 813 * IRQ13 behaviour 814 */ 815 static void math_error(struct pt_regs *regs, int error_code, int trapnr) 816 { 817 struct task_struct *task = current; 818 struct fpu *fpu = &task->thread.fpu; 819 siginfo_t info; 820 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : 821 "simd exception"; 822 823 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) 824 return; 825 cond_local_irq_enable(regs); 826 827 if (!user_mode(regs)) { 828 if (!fixup_exception(regs, trapnr)) { 829 task->thread.error_code = error_code; 830 task->thread.trap_nr = trapnr; 831 die(str, regs, error_code); 832 } 833 return; 834 } 835 836 /* 837 * Save the info for the exception handler and clear the error. 838 */ 839 fpu__save(fpu); 840 841 task->thread.trap_nr = trapnr; 842 task->thread.error_code = error_code; 843 info.si_signo = SIGFPE; 844 info.si_errno = 0; 845 info.si_addr = (void __user *)uprobe_get_trap_addr(regs); 846 847 info.si_code = fpu__exception_code(fpu, trapnr); 848 849 /* Retry when we get spurious exceptions: */ 850 if (!info.si_code) 851 return; 852 853 force_sig_info(SIGFPE, &info, task); 854 } 855 856 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) 857 { 858 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 859 math_error(regs, error_code, X86_TRAP_MF); 860 } 861 862 dotraplinkage void 863 do_simd_coprocessor_error(struct pt_regs *regs, long error_code) 864 { 865 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 866 math_error(regs, error_code, X86_TRAP_XF); 867 } 868 869 dotraplinkage void 870 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) 871 { 872 cond_local_irq_enable(regs); 873 } 874 875 dotraplinkage void 876 do_device_not_available(struct pt_regs *regs, long error_code) 877 { 878 unsigned long cr0; 879 880 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 881 882 #ifdef CONFIG_MATH_EMULATION 883 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) { 884 struct math_emu_info info = { }; 885 886 cond_local_irq_enable(regs); 887 888 info.regs = regs; 889 math_emulate(&info); 890 return; 891 } 892 #endif 893 894 /* This should not happen. */ 895 cr0 = read_cr0(); 896 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) { 897 /* Try to fix it up and carry on. */ 898 write_cr0(cr0 & ~X86_CR0_TS); 899 } else { 900 /* 901 * Something terrible happened, and we're better off trying 902 * to kill the task than getting stuck in a never-ending 903 * loop of #NM faults. 904 */ 905 die("unexpected #NM exception", regs, error_code); 906 } 907 } 908 NOKPROBE_SYMBOL(do_device_not_available); 909 910 #ifdef CONFIG_X86_32 911 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) 912 { 913 siginfo_t info; 914 915 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); 916 local_irq_enable(); 917 918 info.si_signo = SIGILL; 919 info.si_errno = 0; 920 info.si_code = ILL_BADSTK; 921 info.si_addr = NULL; 922 if (notify_die(DIE_TRAP, "iret exception", regs, error_code, 923 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { 924 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, 925 &info); 926 } 927 } 928 #endif 929 930 void __init trap_init(void) 931 { 932 idt_setup_traps(); 933 934 /* 935 * Set the IDT descriptor to a fixed read-only location, so that the 936 * "sidt" instruction will not leak the location of the kernel, and 937 * to defend the IDT against arbitrary memory write vulnerabilities. 938 * It will be reloaded in cpu_init() */ 939 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); 940 idt_descr.address = fix_to_virt(FIX_RO_IDT); 941 942 /* 943 * Should be a barrier for any external CPU state: 944 */ 945 cpu_init(); 946 947 idt_setup_ist_traps(); 948 949 x86_init.irqs.trap_init(); 950 951 idt_setup_debugidt_traps(); 952 } 953