1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 1991,1992,1995 Linus Torvalds 4 * Copyright (c) 1994 Alan Modra 5 * Copyright (c) 1995 Markus Kuhn 6 * Copyright (c) 1996 Ingo Molnar 7 * Copyright (c) 1998 Andrea Arcangeli 8 * Copyright (c) 2002,2006 Vojtech Pavlik 9 * Copyright (c) 2003 Andi Kleen 10 * 11 */ 12 13 #include <linux/clocksource.h> 14 #include <linux/clockchips.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/i8253.h> 18 #include <linux/time.h> 19 #include <linux/export.h> 20 21 #include <asm/vsyscall.h> 22 #include <asm/x86_init.h> 23 #include <asm/i8259.h> 24 #include <asm/timer.h> 25 #include <asm/hpet.h> 26 #include <asm/time.h> 27 28 #ifdef CONFIG_X86_64 29 __visible volatile unsigned long jiffies __cacheline_aligned_in_smp = INITIAL_JIFFIES; 30 #endif 31 32 unsigned long profile_pc(struct pt_regs *regs) 33 { 34 unsigned long pc = instruction_pointer(regs); 35 36 if (!user_mode(regs) && in_lock_functions(pc)) { 37 #ifdef CONFIG_FRAME_POINTER 38 return *(unsigned long *)(regs->bp + sizeof(long)); 39 #else 40 unsigned long *sp = (unsigned long *)regs->sp; 41 /* 42 * Return address is either directly at stack pointer 43 * or above a saved flags. Eflags has bits 22-31 zero, 44 * kernel addresses don't. 45 */ 46 if (sp[0] >> 22) 47 return sp[0]; 48 if (sp[1] >> 22) 49 return sp[1]; 50 #endif 51 } 52 return pc; 53 } 54 EXPORT_SYMBOL(profile_pc); 55 56 /* 57 * Default timer interrupt handler for PIT/HPET 58 */ 59 static irqreturn_t timer_interrupt(int irq, void *dev_id) 60 { 61 global_clock_event->event_handler(global_clock_event); 62 return IRQ_HANDLED; 63 } 64 65 static void __init setup_default_timer_irq(void) 66 { 67 unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER; 68 69 /* 70 * Unconditionally register the legacy timer interrupt; even 71 * without legacy PIC/PIT we need this for the HPET0 in legacy 72 * replacement mode. 73 */ 74 if (request_irq(0, timer_interrupt, flags, "timer", NULL)) 75 pr_info("Failed to register legacy timer interrupt\n"); 76 } 77 78 /* Default timer init function */ 79 void __init hpet_time_init(void) 80 { 81 if (!hpet_enable()) { 82 if (!pit_timer_init()) 83 return; 84 } 85 86 setup_default_timer_irq(); 87 } 88 89 static __init void x86_late_time_init(void) 90 { 91 /* 92 * Before PIT/HPET init, select the interrupt mode. This is required 93 * to make the decision whether PIT should be initialized correct. 94 */ 95 x86_init.irqs.intr_mode_select(); 96 97 /* Setup the legacy timers */ 98 x86_init.timers.timer_init(); 99 100 /* 101 * After PIT/HPET timers init, set up the final interrupt mode for 102 * delivering IRQs. 103 */ 104 x86_init.irqs.intr_mode_init(); 105 tsc_init(); 106 } 107 108 /* 109 * Initialize TSC and delay the periodic timer init to 110 * late x86_late_time_init() so ioremap works. 111 */ 112 void __init time_init(void) 113 { 114 late_time_init = x86_late_time_init; 115 } 116 117 /* 118 * Sanity check the vdso related archdata content. 119 */ 120 void clocksource_arch_init(struct clocksource *cs) 121 { 122 if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE) 123 return; 124 125 if (cs->mask != CLOCKSOURCE_MASK(64)) { 126 pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n", 127 cs->name, cs->mask); 128 cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; 129 } 130 } 131