1 /* 2 * x86 SMP booting functions 3 * 4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> 6 * Copyright 2001 Andi Kleen, SuSE Labs. 7 * 8 * Much of the core SMP work is based on previous work by Thomas Radke, to 9 * whom a great many thanks are extended. 10 * 11 * Thanks to Intel for making available several different Pentium, 12 * Pentium Pro and Pentium-II/Xeon MP machines. 13 * Original development of Linux SMP code supported by Caldera. 14 * 15 * This code is released under the GNU General Public License version 2 or 16 * later. 17 * 18 * Fixes 19 * Felix Koop : NR_CPUS used properly 20 * Jose Renau : Handle single CPU case. 21 * Alan Cox : By repeated request 8) - Total BogoMIPS report. 22 * Greg Wright : Fix for kernel stacks panic. 23 * Erich Boleyn : MP v1.4 and additional changes. 24 * Matthias Sattler : Changes for 2.1 kernel map. 25 * Michel Lespinasse : Changes for 2.1 kernel map. 26 * Michael Chastain : Change trampoline.S to gnu as. 27 * Alan Cox : Dumb bug: 'B' step PPro's are fine 28 * Ingo Molnar : Added APIC timers, based on code 29 * from Jose Renau 30 * Ingo Molnar : various cleanups and rewrites 31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug. 32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs 33 * Andi Kleen : Changed for SMP boot into long mode. 34 * Martin J. Bligh : Added support for multi-quad systems 35 * Dave Jones : Report invalid combinations of Athlon CPUs. 36 * Rusty Russell : Hacked into shape for new "hotplug" boot process. 37 * Andi Kleen : Converted to new state machine. 38 * Ashok Raj : CPU hotplug support 39 * Glauber Costa : i386 and x86_64 integration 40 */ 41 42 #include <linux/init.h> 43 #include <linux/smp.h> 44 #include <linux/module.h> 45 #include <linux/sched.h> 46 #include <linux/percpu.h> 47 #include <linux/bootmem.h> 48 #include <linux/err.h> 49 #include <linux/nmi.h> 50 51 #include <asm/acpi.h> 52 #include <asm/desc.h> 53 #include <asm/nmi.h> 54 #include <asm/irq.h> 55 #include <asm/idle.h> 56 #include <asm/smp.h> 57 #include <asm/trampoline.h> 58 #include <asm/cpu.h> 59 #include <asm/numa.h> 60 #include <asm/pgtable.h> 61 #include <asm/tlbflush.h> 62 #include <asm/mtrr.h> 63 #include <asm/vmi.h> 64 #include <asm/genapic.h> 65 #include <asm/setup.h> 66 #include <linux/mc146818rtc.h> 67 68 #include <mach_apic.h> 69 #include <mach_wakecpu.h> 70 #include <smpboot_hooks.h> 71 72 #ifdef CONFIG_X86_32 73 u8 apicid_2_node[MAX_APICID]; 74 static int low_mappings; 75 #endif 76 77 /* State of each CPU */ 78 DEFINE_PER_CPU(int, cpu_state) = { 0 }; 79 80 /* Store all idle threads, this can be reused instead of creating 81 * a new thread. Also avoids complicated thread destroy functionality 82 * for idle threads. 83 */ 84 #ifdef CONFIG_HOTPLUG_CPU 85 /* 86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is 87 * removed after init for !CONFIG_HOTPLUG_CPU. 88 */ 89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array); 90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x)) 91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p)) 92 #else 93 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ; 94 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p)) 96 #endif 97 98 /* Number of siblings per CPU package */ 99 int smp_num_siblings = 1; 100 EXPORT_SYMBOL(smp_num_siblings); 101 102 /* Last level cache ID of each logical CPU */ 103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID; 104 105 /* representing HT siblings of each logical CPU */ 106 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map); 107 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 108 109 /* representing HT and core siblings of each logical CPU */ 110 DEFINE_PER_CPU(cpumask_t, cpu_core_map); 111 EXPORT_PER_CPU_SYMBOL(cpu_core_map); 112 113 /* Per CPU bogomips and other parameters */ 114 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); 115 EXPORT_PER_CPU_SYMBOL(cpu_info); 116 117 static atomic_t init_deasserted; 118 119 120 /* Set if we find a B stepping CPU */ 121 static int __cpuinitdata smp_b_stepping; 122 123 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32) 124 125 /* which logical CPUs are on which nodes */ 126 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly = 127 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE }; 128 EXPORT_SYMBOL(node_to_cpumask_map); 129 /* which node each logical CPU is on */ 130 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 }; 131 EXPORT_SYMBOL(cpu_to_node_map); 132 133 /* set up a mapping between cpu and node. */ 134 static void map_cpu_to_node(int cpu, int node) 135 { 136 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node); 137 cpumask_set_cpu(cpu, &node_to_cpumask_map[node]); 138 cpu_to_node_map[cpu] = node; 139 } 140 141 /* undo a mapping between cpu and node. */ 142 static void unmap_cpu_to_node(int cpu) 143 { 144 int node; 145 146 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu); 147 for (node = 0; node < MAX_NUMNODES; node++) 148 cpumask_clear_cpu(cpu, &node_to_cpumask_map[node]); 149 cpu_to_node_map[cpu] = 0; 150 } 151 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */ 152 #define map_cpu_to_node(cpu, node) ({}) 153 #define unmap_cpu_to_node(cpu) ({}) 154 #endif 155 156 #ifdef CONFIG_X86_32 157 static int boot_cpu_logical_apicid; 158 159 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = 160 { [0 ... NR_CPUS-1] = BAD_APICID }; 161 162 static void map_cpu_to_logical_apicid(void) 163 { 164 int cpu = smp_processor_id(); 165 int apicid = logical_smp_processor_id(); 166 int node = apicid_to_node(apicid); 167 168 if (!node_online(node)) 169 node = first_online_node; 170 171 cpu_2_logical_apicid[cpu] = apicid; 172 map_cpu_to_node(cpu, node); 173 } 174 175 void numa_remove_cpu(int cpu) 176 { 177 cpu_2_logical_apicid[cpu] = BAD_APICID; 178 unmap_cpu_to_node(cpu); 179 } 180 #else 181 #define map_cpu_to_logical_apicid() do {} while (0) 182 #endif 183 184 /* 185 * Report back to the Boot Processor. 186 * Running on AP. 187 */ 188 static void __cpuinit smp_callin(void) 189 { 190 int cpuid, phys_id; 191 unsigned long timeout; 192 193 /* 194 * If waken up by an INIT in an 82489DX configuration 195 * we may get here before an INIT-deassert IPI reaches 196 * our local APIC. We have to wait for the IPI or we'll 197 * lock up on an APIC access. 198 */ 199 wait_for_init_deassert(&init_deasserted); 200 201 /* 202 * (This works even if the APIC is not enabled.) 203 */ 204 phys_id = read_apic_id(); 205 cpuid = smp_processor_id(); 206 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) { 207 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__, 208 phys_id, cpuid); 209 } 210 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id); 211 212 /* 213 * STARTUP IPIs are fragile beasts as they might sometimes 214 * trigger some glue motherboard logic. Complete APIC bus 215 * silence for 1 second, this overestimates the time the 216 * boot CPU is spending to send the up to 2 STARTUP IPIs 217 * by a factor of two. This should be enough. 218 */ 219 220 /* 221 * Waiting 2s total for startup (udelay is not yet working) 222 */ 223 timeout = jiffies + 2*HZ; 224 while (time_before(jiffies, timeout)) { 225 /* 226 * Has the boot CPU finished it's STARTUP sequence? 227 */ 228 if (cpumask_test_cpu(cpuid, cpu_callout_mask)) 229 break; 230 cpu_relax(); 231 } 232 233 if (!time_before(jiffies, timeout)) { 234 panic("%s: CPU%d started up but did not get a callout!\n", 235 __func__, cpuid); 236 } 237 238 /* 239 * the boot CPU has finished the init stage and is spinning 240 * on callin_map until we finish. We are free to set up this 241 * CPU, first the APIC. (this is probably redundant on most 242 * boards) 243 */ 244 245 pr_debug("CALLIN, before setup_local_APIC().\n"); 246 smp_callin_clear_local_apic(); 247 setup_local_APIC(); 248 end_local_APIC_setup(); 249 map_cpu_to_logical_apicid(); 250 251 notify_cpu_starting(cpuid); 252 /* 253 * Get our bogomips. 254 * 255 * Need to enable IRQs because it can take longer and then 256 * the NMI watchdog might kill us. 257 */ 258 local_irq_enable(); 259 calibrate_delay(); 260 local_irq_disable(); 261 pr_debug("Stack at about %p\n", &cpuid); 262 263 /* 264 * Save our processor parameters 265 */ 266 smp_store_cpu_info(cpuid); 267 268 /* 269 * Allow the master to continue. 270 */ 271 cpumask_set_cpu(cpuid, cpu_callin_mask); 272 } 273 274 static int __cpuinitdata unsafe_smp; 275 276 /* 277 * Activate a secondary processor. 278 */ 279 notrace static void __cpuinit start_secondary(void *unused) 280 { 281 /* 282 * Don't put *anything* before cpu_init(), SMP booting is too 283 * fragile that we want to limit the things done here to the 284 * most necessary things. 285 */ 286 vmi_bringup(); 287 cpu_init(); 288 preempt_disable(); 289 smp_callin(); 290 291 /* otherwise gcc will move up smp_processor_id before the cpu_init */ 292 barrier(); 293 /* 294 * Check TSC synchronization with the BP: 295 */ 296 check_tsc_sync_target(); 297 298 if (nmi_watchdog == NMI_IO_APIC) { 299 disable_8259A_irq(0); 300 enable_NMI_through_LVT0(); 301 enable_8259A_irq(0); 302 } 303 304 #ifdef CONFIG_X86_32 305 while (low_mappings) 306 cpu_relax(); 307 __flush_tlb_all(); 308 #endif 309 310 /* This must be done before setting cpu_online_map */ 311 set_cpu_sibling_map(raw_smp_processor_id()); 312 wmb(); 313 314 /* 315 * We need to hold call_lock, so there is no inconsistency 316 * between the time smp_call_function() determines number of 317 * IPI recipients, and the time when the determination is made 318 * for which cpus receive the IPI. Holding this 319 * lock helps us to not include this cpu in a currently in progress 320 * smp_call_function(). 321 * 322 * We need to hold vector_lock so there the set of online cpus 323 * does not change while we are assigning vectors to cpus. Holding 324 * this lock ensures we don't half assign or remove an irq from a cpu. 325 */ 326 ipi_call_lock(); 327 lock_vector_lock(); 328 __setup_vector_irq(smp_processor_id()); 329 set_cpu_online(smp_processor_id(), true); 330 unlock_vector_lock(); 331 ipi_call_unlock(); 332 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 333 334 /* enable local interrupts */ 335 local_irq_enable(); 336 337 setup_secondary_clock(); 338 339 wmb(); 340 cpu_idle(); 341 } 342 343 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c) 344 { 345 /* 346 * Mask B, Pentium, but not Pentium MMX 347 */ 348 if (c->x86_vendor == X86_VENDOR_INTEL && 349 c->x86 == 5 && 350 c->x86_mask >= 1 && c->x86_mask <= 4 && 351 c->x86_model <= 3) 352 /* 353 * Remember we have B step Pentia with bugs 354 */ 355 smp_b_stepping = 1; 356 357 /* 358 * Certain Athlons might work (for various values of 'work') in SMP 359 * but they are not certified as MP capable. 360 */ 361 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) { 362 363 if (num_possible_cpus() == 1) 364 goto valid_k7; 365 366 /* Athlon 660/661 is valid. */ 367 if ((c->x86_model == 6) && ((c->x86_mask == 0) || 368 (c->x86_mask == 1))) 369 goto valid_k7; 370 371 /* Duron 670 is valid */ 372 if ((c->x86_model == 7) && (c->x86_mask == 0)) 373 goto valid_k7; 374 375 /* 376 * Athlon 662, Duron 671, and Athlon >model 7 have capability 377 * bit. It's worth noting that the A5 stepping (662) of some 378 * Athlon XP's have the MP bit set. 379 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for 380 * more. 381 */ 382 if (((c->x86_model == 6) && (c->x86_mask >= 2)) || 383 ((c->x86_model == 7) && (c->x86_mask >= 1)) || 384 (c->x86_model > 7)) 385 if (cpu_has_mp) 386 goto valid_k7; 387 388 /* If we get here, not a certified SMP capable AMD system. */ 389 unsafe_smp = 1; 390 } 391 392 valid_k7: 393 ; 394 } 395 396 static void __cpuinit smp_checks(void) 397 { 398 if (smp_b_stepping) 399 printk(KERN_WARNING "WARNING: SMP operation may be unreliable" 400 "with B stepping processors.\n"); 401 402 /* 403 * Don't taint if we are running SMP kernel on a single non-MP 404 * approved Athlon 405 */ 406 if (unsafe_smp && num_online_cpus() > 1) { 407 printk(KERN_INFO "WARNING: This combination of AMD" 408 "processors is not suitable for SMP.\n"); 409 add_taint(TAINT_UNSAFE_SMP); 410 } 411 } 412 413 /* 414 * The bootstrap kernel entry code has set these up. Save them for 415 * a given CPU 416 */ 417 418 void __cpuinit smp_store_cpu_info(int id) 419 { 420 struct cpuinfo_x86 *c = &cpu_data(id); 421 422 *c = boot_cpu_data; 423 c->cpu_index = id; 424 if (id != 0) 425 identify_secondary_cpu(c); 426 smp_apply_quirks(c); 427 } 428 429 430 void __cpuinit set_cpu_sibling_map(int cpu) 431 { 432 int i; 433 struct cpuinfo_x86 *c = &cpu_data(cpu); 434 435 cpumask_set_cpu(cpu, cpu_sibling_setup_mask); 436 437 if (smp_num_siblings > 1) { 438 for_each_cpu(i, cpu_sibling_setup_mask) { 439 struct cpuinfo_x86 *o = &cpu_data(i); 440 441 if (c->phys_proc_id == o->phys_proc_id && 442 c->cpu_core_id == o->cpu_core_id) { 443 cpumask_set_cpu(i, cpu_sibling_mask(cpu)); 444 cpumask_set_cpu(cpu, cpu_sibling_mask(i)); 445 cpumask_set_cpu(i, cpu_core_mask(cpu)); 446 cpumask_set_cpu(cpu, cpu_core_mask(i)); 447 cpumask_set_cpu(i, &c->llc_shared_map); 448 cpumask_set_cpu(cpu, &o->llc_shared_map); 449 } 450 } 451 } else { 452 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu)); 453 } 454 455 cpumask_set_cpu(cpu, &c->llc_shared_map); 456 457 if (current_cpu_data.x86_max_cores == 1) { 458 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu)); 459 c->booted_cores = 1; 460 return; 461 } 462 463 for_each_cpu(i, cpu_sibling_setup_mask) { 464 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID && 465 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) { 466 cpumask_set_cpu(i, &c->llc_shared_map); 467 cpumask_set_cpu(cpu, &cpu_data(i).llc_shared_map); 468 } 469 if (c->phys_proc_id == cpu_data(i).phys_proc_id) { 470 cpumask_set_cpu(i, cpu_core_mask(cpu)); 471 cpumask_set_cpu(cpu, cpu_core_mask(i)); 472 /* 473 * Does this new cpu bringup a new core? 474 */ 475 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) { 476 /* 477 * for each core in package, increment 478 * the booted_cores for this new cpu 479 */ 480 if (cpumask_first(cpu_sibling_mask(i)) == i) 481 c->booted_cores++; 482 /* 483 * increment the core count for all 484 * the other cpus in this package 485 */ 486 if (i != cpu) 487 cpu_data(i).booted_cores++; 488 } else if (i != cpu && !c->booted_cores) 489 c->booted_cores = cpu_data(i).booted_cores; 490 } 491 } 492 } 493 494 /* maps the cpu to the sched domain representing multi-core */ 495 const struct cpumask *cpu_coregroup_mask(int cpu) 496 { 497 struct cpuinfo_x86 *c = &cpu_data(cpu); 498 /* 499 * For perf, we return last level cache shared map. 500 * And for power savings, we return cpu_core_map 501 */ 502 if (sched_mc_power_savings || sched_smt_power_savings) 503 return cpu_core_mask(cpu); 504 else 505 return &c->llc_shared_map; 506 } 507 508 cpumask_t cpu_coregroup_map(int cpu) 509 { 510 return *cpu_coregroup_mask(cpu); 511 } 512 513 static void impress_friends(void) 514 { 515 int cpu; 516 unsigned long bogosum = 0; 517 /* 518 * Allow the user to impress friends. 519 */ 520 pr_debug("Before bogomips.\n"); 521 for_each_possible_cpu(cpu) 522 if (cpumask_test_cpu(cpu, cpu_callout_mask)) 523 bogosum += cpu_data(cpu).loops_per_jiffy; 524 printk(KERN_INFO 525 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 526 num_online_cpus(), 527 bogosum/(500000/HZ), 528 (bogosum/(5000/HZ))%100); 529 530 pr_debug("Before bogocount - setting activated=1.\n"); 531 } 532 533 void __inquire_remote_apic(int apicid) 534 { 535 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; 536 char *names[] = { "ID", "VERSION", "SPIV" }; 537 int timeout; 538 u32 status; 539 540 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid); 541 542 for (i = 0; i < ARRAY_SIZE(regs); i++) { 543 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]); 544 545 /* 546 * Wait for idle. 547 */ 548 status = safe_apic_wait_icr_idle(); 549 if (status) 550 printk(KERN_CONT 551 "a previous APIC delivery may have failed\n"); 552 553 apic_icr_write(APIC_DM_REMRD | regs[i], apicid); 554 555 timeout = 0; 556 do { 557 udelay(100); 558 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK; 559 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000); 560 561 switch (status) { 562 case APIC_ICR_RR_VALID: 563 status = apic_read(APIC_RRR); 564 printk(KERN_CONT "%08x\n", status); 565 break; 566 default: 567 printk(KERN_CONT "failed\n"); 568 } 569 } 570 } 571 572 /* 573 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal 574 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this 575 * won't ... remember to clear down the APIC, etc later. 576 */ 577 int __devinit 578 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) 579 { 580 unsigned long send_status, accept_status = 0; 581 int maxlvt; 582 583 /* Target chip */ 584 /* Boot on the stack */ 585 /* Kick the second */ 586 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid); 587 588 pr_debug("Waiting for send to finish...\n"); 589 send_status = safe_apic_wait_icr_idle(); 590 591 /* 592 * Give the other CPU some time to accept the IPI. 593 */ 594 udelay(200); 595 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 596 maxlvt = lapic_get_maxlvt(); 597 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 598 apic_write(APIC_ESR, 0); 599 accept_status = (apic_read(APIC_ESR) & 0xEF); 600 } 601 pr_debug("NMI sent.\n"); 602 603 if (send_status) 604 printk(KERN_ERR "APIC never delivered???\n"); 605 if (accept_status) 606 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status); 607 608 return (send_status | accept_status); 609 } 610 611 int __devinit 612 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) 613 { 614 unsigned long send_status, accept_status = 0; 615 int maxlvt, num_starts, j; 616 617 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) { 618 send_status = uv_wakeup_secondary(phys_apicid, start_eip); 619 atomic_set(&init_deasserted, 1); 620 return send_status; 621 } 622 623 maxlvt = lapic_get_maxlvt(); 624 625 /* 626 * Be paranoid about clearing APIC errors. 627 */ 628 if (APIC_INTEGRATED(apic_version[phys_apicid])) { 629 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 630 apic_write(APIC_ESR, 0); 631 apic_read(APIC_ESR); 632 } 633 634 pr_debug("Asserting INIT.\n"); 635 636 /* 637 * Turn INIT on target chip 638 */ 639 /* 640 * Send IPI 641 */ 642 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, 643 phys_apicid); 644 645 pr_debug("Waiting for send to finish...\n"); 646 send_status = safe_apic_wait_icr_idle(); 647 648 mdelay(10); 649 650 pr_debug("Deasserting INIT.\n"); 651 652 /* Target chip */ 653 /* Send IPI */ 654 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); 655 656 pr_debug("Waiting for send to finish...\n"); 657 send_status = safe_apic_wait_icr_idle(); 658 659 mb(); 660 atomic_set(&init_deasserted, 1); 661 662 /* 663 * Should we send STARTUP IPIs ? 664 * 665 * Determine this based on the APIC version. 666 * If we don't have an integrated APIC, don't send the STARTUP IPIs. 667 */ 668 if (APIC_INTEGRATED(apic_version[phys_apicid])) 669 num_starts = 2; 670 else 671 num_starts = 0; 672 673 /* 674 * Paravirt / VMI wants a startup IPI hook here to set up the 675 * target processor state. 676 */ 677 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary, 678 (unsigned long)stack_start.sp); 679 680 /* 681 * Run STARTUP IPI loop. 682 */ 683 pr_debug("#startup loops: %d.\n", num_starts); 684 685 for (j = 1; j <= num_starts; j++) { 686 pr_debug("Sending STARTUP #%d.\n", j); 687 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 688 apic_write(APIC_ESR, 0); 689 apic_read(APIC_ESR); 690 pr_debug("After apic_write.\n"); 691 692 /* 693 * STARTUP IPI 694 */ 695 696 /* Target chip */ 697 /* Boot on the stack */ 698 /* Kick the second */ 699 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), 700 phys_apicid); 701 702 /* 703 * Give the other CPU some time to accept the IPI. 704 */ 705 udelay(300); 706 707 pr_debug("Startup point 1.\n"); 708 709 pr_debug("Waiting for send to finish...\n"); 710 send_status = safe_apic_wait_icr_idle(); 711 712 /* 713 * Give the other CPU some time to accept the IPI. 714 */ 715 udelay(200); 716 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 717 apic_write(APIC_ESR, 0); 718 accept_status = (apic_read(APIC_ESR) & 0xEF); 719 if (send_status || accept_status) 720 break; 721 } 722 pr_debug("After Startup.\n"); 723 724 if (send_status) 725 printk(KERN_ERR "APIC never delivered???\n"); 726 if (accept_status) 727 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status); 728 729 return (send_status | accept_status); 730 } 731 732 struct create_idle { 733 struct work_struct work; 734 struct task_struct *idle; 735 struct completion done; 736 int cpu; 737 }; 738 739 static void __cpuinit do_fork_idle(struct work_struct *work) 740 { 741 struct create_idle *c_idle = 742 container_of(work, struct create_idle, work); 743 744 c_idle->idle = fork_idle(c_idle->cpu); 745 complete(&c_idle->done); 746 } 747 748 #ifdef CONFIG_X86_64 749 750 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */ 751 static void __ref free_bootmem_pda(struct x8664_pda *oldpda) 752 { 753 if (!after_bootmem) 754 free_bootmem((unsigned long)oldpda, sizeof(*oldpda)); 755 } 756 757 /* 758 * Allocate node local memory for the AP pda. 759 * 760 * Must be called after the _cpu_pda pointer table is initialized. 761 */ 762 int __cpuinit get_local_pda(int cpu) 763 { 764 struct x8664_pda *oldpda, *newpda; 765 unsigned long size = sizeof(struct x8664_pda); 766 int node = cpu_to_node(cpu); 767 768 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem) 769 return 0; 770 771 oldpda = cpu_pda(cpu); 772 newpda = kmalloc_node(size, GFP_ATOMIC, node); 773 if (!newpda) { 774 printk(KERN_ERR "Could not allocate node local PDA " 775 "for CPU %d on node %d\n", cpu, node); 776 777 if (oldpda) 778 return 0; /* have a usable pda */ 779 else 780 return -1; 781 } 782 783 if (oldpda) { 784 memcpy(newpda, oldpda, size); 785 free_bootmem_pda(oldpda); 786 } 787 788 newpda->in_bootmem = 0; 789 cpu_pda(cpu) = newpda; 790 return 0; 791 } 792 #endif /* CONFIG_X86_64 */ 793 794 static int __cpuinit do_boot_cpu(int apicid, int cpu) 795 /* 796 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 797 * (ie clustered apic addressing mode), this is a LOGICAL apic ID. 798 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu. 799 */ 800 { 801 unsigned long boot_error = 0; 802 int timeout; 803 unsigned long start_ip; 804 unsigned short nmi_high = 0, nmi_low = 0; 805 struct create_idle c_idle = { 806 .cpu = cpu, 807 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), 808 }; 809 INIT_WORK(&c_idle.work, do_fork_idle); 810 811 #ifdef CONFIG_X86_64 812 /* Allocate node local memory for AP pdas */ 813 if (cpu > 0) { 814 boot_error = get_local_pda(cpu); 815 if (boot_error) 816 goto restore_state; 817 /* if can't get pda memory, can't start cpu */ 818 } 819 #endif 820 821 alternatives_smp_switch(1); 822 823 c_idle.idle = get_idle_for_cpu(cpu); 824 825 /* 826 * We can't use kernel_thread since we must avoid to 827 * reschedule the child. 828 */ 829 if (c_idle.idle) { 830 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *) 831 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1); 832 init_idle(c_idle.idle, cpu); 833 goto do_rest; 834 } 835 836 if (!keventd_up() || current_is_keventd()) 837 c_idle.work.func(&c_idle.work); 838 else { 839 schedule_work(&c_idle.work); 840 wait_for_completion(&c_idle.done); 841 } 842 843 if (IS_ERR(c_idle.idle)) { 844 printk("failed fork for CPU %d\n", cpu); 845 return PTR_ERR(c_idle.idle); 846 } 847 848 set_idle_for_cpu(cpu, c_idle.idle); 849 do_rest: 850 #ifdef CONFIG_X86_32 851 per_cpu(current_task, cpu) = c_idle.idle; 852 init_gdt(cpu); 853 /* Stack for startup_32 can be just as for start_secondary onwards */ 854 irq_ctx_init(cpu); 855 #else 856 cpu_pda(cpu)->pcurrent = c_idle.idle; 857 clear_tsk_thread_flag(c_idle.idle, TIF_FORK); 858 #endif 859 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); 860 initial_code = (unsigned long)start_secondary; 861 stack_start.sp = (void *) c_idle.idle->thread.sp; 862 863 /* start_ip had better be page-aligned! */ 864 start_ip = setup_trampoline(); 865 866 /* So we see what's up */ 867 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n", 868 cpu, apicid, start_ip); 869 870 /* 871 * This grunge runs the startup process for 872 * the targeted processor. 873 */ 874 875 atomic_set(&init_deasserted, 0); 876 877 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { 878 879 pr_debug("Setting warm reset code and vector.\n"); 880 881 store_NMI_vector(&nmi_high, &nmi_low); 882 883 smpboot_setup_warm_reset_vector(start_ip); 884 /* 885 * Be paranoid about clearing APIC errors. 886 */ 887 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 888 apic_write(APIC_ESR, 0); 889 apic_read(APIC_ESR); 890 } 891 } 892 893 /* 894 * Starting actual IPI sequence... 895 */ 896 boot_error = wakeup_secondary_cpu(apicid, start_ip); 897 898 if (!boot_error) { 899 /* 900 * allow APs to start initializing. 901 */ 902 pr_debug("Before Callout %d.\n", cpu); 903 cpumask_set_cpu(cpu, cpu_callout_mask); 904 pr_debug("After Callout %d.\n", cpu); 905 906 /* 907 * Wait 5s total for a response 908 */ 909 for (timeout = 0; timeout < 50000; timeout++) { 910 if (cpumask_test_cpu(cpu, cpu_callin_mask)) 911 break; /* It has booted */ 912 udelay(100); 913 } 914 915 if (cpumask_test_cpu(cpu, cpu_callin_mask)) { 916 /* number CPUs logically, starting from 1 (BSP is 0) */ 917 pr_debug("OK.\n"); 918 printk(KERN_INFO "CPU%d: ", cpu); 919 print_cpu_info(&cpu_data(cpu)); 920 pr_debug("CPU has booted.\n"); 921 } else { 922 boot_error = 1; 923 if (*((volatile unsigned char *)trampoline_base) 924 == 0xA5) 925 /* trampoline started but...? */ 926 printk(KERN_ERR "Stuck ??\n"); 927 else 928 /* trampoline code not run */ 929 printk(KERN_ERR "Not responding.\n"); 930 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) 931 inquire_remote_apic(apicid); 932 } 933 } 934 #ifdef CONFIG_X86_64 935 restore_state: 936 #endif 937 if (boot_error) { 938 /* Try to put things back the way they were before ... */ 939 numa_remove_cpu(cpu); /* was set by numa_add_cpu */ 940 941 /* was set by do_boot_cpu() */ 942 cpumask_clear_cpu(cpu, cpu_callout_mask); 943 944 /* was set by cpu_init() */ 945 cpumask_clear_cpu(cpu, cpu_initialized_mask); 946 947 set_cpu_present(cpu, false); 948 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; 949 } 950 951 /* mark "stuck" area as not stuck */ 952 *((volatile unsigned long *)trampoline_base) = 0; 953 954 /* 955 * Cleanup possible dangling ends... 956 */ 957 smpboot_restore_warm_reset_vector(); 958 959 return boot_error; 960 } 961 962 int __cpuinit native_cpu_up(unsigned int cpu) 963 { 964 int apicid = cpu_present_to_apicid(cpu); 965 unsigned long flags; 966 int err; 967 968 WARN_ON(irqs_disabled()); 969 970 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); 971 972 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid || 973 !physid_isset(apicid, phys_cpu_present_map)) { 974 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu); 975 return -EINVAL; 976 } 977 978 /* 979 * Already booted CPU? 980 */ 981 if (cpumask_test_cpu(cpu, cpu_callin_mask)) { 982 pr_debug("do_boot_cpu %d Already started\n", cpu); 983 return -ENOSYS; 984 } 985 986 /* 987 * Save current MTRR state in case it was changed since early boot 988 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync: 989 */ 990 mtrr_save_state(); 991 992 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 993 994 #ifdef CONFIG_X86_32 995 /* init low mem mapping */ 996 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 997 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY)); 998 flush_tlb_all(); 999 low_mappings = 1; 1000 1001 err = do_boot_cpu(apicid, cpu); 1002 1003 zap_low_mappings(); 1004 low_mappings = 0; 1005 #else 1006 err = do_boot_cpu(apicid, cpu); 1007 #endif 1008 if (err) { 1009 pr_debug("do_boot_cpu failed %d\n", err); 1010 return -EIO; 1011 } 1012 1013 /* 1014 * Check TSC synchronization with the AP (keep irqs disabled 1015 * while doing so): 1016 */ 1017 local_irq_save(flags); 1018 check_tsc_sync_source(cpu); 1019 local_irq_restore(flags); 1020 1021 while (!cpu_online(cpu)) { 1022 cpu_relax(); 1023 touch_nmi_watchdog(); 1024 } 1025 1026 return 0; 1027 } 1028 1029 /* 1030 * Fall back to non SMP mode after errors. 1031 * 1032 * RED-PEN audit/test this more. I bet there is more state messed up here. 1033 */ 1034 static __init void disable_smp(void) 1035 { 1036 /* use the read/write pointers to the present and possible maps */ 1037 cpumask_copy(&cpu_present_map, cpumask_of(0)); 1038 cpumask_copy(&cpu_possible_map, cpumask_of(0)); 1039 smpboot_clear_io_apic_irqs(); 1040 1041 if (smp_found_config) 1042 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); 1043 else 1044 physid_set_mask_of_physid(0, &phys_cpu_present_map); 1045 map_cpu_to_logical_apicid(); 1046 cpumask_set_cpu(0, cpu_sibling_mask(0)); 1047 cpumask_set_cpu(0, cpu_core_mask(0)); 1048 } 1049 1050 /* 1051 * Various sanity checks. 1052 */ 1053 static int __init smp_sanity_check(unsigned max_cpus) 1054 { 1055 preempt_disable(); 1056 1057 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32) 1058 if (def_to_bigsmp && nr_cpu_ids > 8) { 1059 unsigned int cpu; 1060 unsigned nr; 1061 1062 printk(KERN_WARNING 1063 "More than 8 CPUs detected - skipping them.\n" 1064 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n"); 1065 1066 nr = 0; 1067 for_each_present_cpu(cpu) { 1068 if (nr >= 8) 1069 set_cpu_present(cpu, false); 1070 nr++; 1071 } 1072 1073 nr = 0; 1074 for_each_possible_cpu(cpu) { 1075 if (nr >= 8) 1076 set_cpu_possible(cpu, false); 1077 nr++; 1078 } 1079 1080 nr_cpu_ids = 8; 1081 } 1082 #endif 1083 1084 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { 1085 printk(KERN_WARNING 1086 "weird, boot CPU (#%d) not listed by the BIOS.\n", 1087 hard_smp_processor_id()); 1088 1089 physid_set(hard_smp_processor_id(), phys_cpu_present_map); 1090 } 1091 1092 /* 1093 * If we couldn't find an SMP configuration at boot time, 1094 * get out of here now! 1095 */ 1096 if (!smp_found_config && !acpi_lapic) { 1097 preempt_enable(); 1098 printk(KERN_NOTICE "SMP motherboard not detected.\n"); 1099 disable_smp(); 1100 if (APIC_init_uniprocessor()) 1101 printk(KERN_NOTICE "Local APIC not detected." 1102 " Using dummy APIC emulation.\n"); 1103 return -1; 1104 } 1105 1106 /* 1107 * Should not be necessary because the MP table should list the boot 1108 * CPU too, but we do it for the sake of robustness anyway. 1109 */ 1110 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) { 1111 printk(KERN_NOTICE 1112 "weird, boot CPU (#%d) not listed by the BIOS.\n", 1113 boot_cpu_physical_apicid); 1114 physid_set(hard_smp_processor_id(), phys_cpu_present_map); 1115 } 1116 preempt_enable(); 1117 1118 /* 1119 * If we couldn't find a local APIC, then get out of here now! 1120 */ 1121 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && 1122 !cpu_has_apic) { 1123 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n", 1124 boot_cpu_physical_apicid); 1125 printk(KERN_ERR "... forcing use of dummy APIC emulation." 1126 "(tell your hw vendor)\n"); 1127 smpboot_clear_io_apic(); 1128 return -1; 1129 } 1130 1131 verify_local_APIC(); 1132 1133 /* 1134 * If SMP should be disabled, then really disable it! 1135 */ 1136 if (!max_cpus) { 1137 printk(KERN_INFO "SMP mode deactivated.\n"); 1138 smpboot_clear_io_apic(); 1139 1140 localise_nmi_watchdog(); 1141 1142 connect_bsp_APIC(); 1143 setup_local_APIC(); 1144 end_local_APIC_setup(); 1145 return -1; 1146 } 1147 1148 return 0; 1149 } 1150 1151 static void __init smp_cpu_index_default(void) 1152 { 1153 int i; 1154 struct cpuinfo_x86 *c; 1155 1156 for_each_possible_cpu(i) { 1157 c = &cpu_data(i); 1158 /* mark all to hotplug */ 1159 c->cpu_index = nr_cpu_ids; 1160 } 1161 } 1162 1163 /* 1164 * Prepare for SMP bootup. The MP table or ACPI has been read 1165 * earlier. Just do some sanity checking here and enable APIC mode. 1166 */ 1167 void __init native_smp_prepare_cpus(unsigned int max_cpus) 1168 { 1169 preempt_disable(); 1170 smp_cpu_index_default(); 1171 current_cpu_data = boot_cpu_data; 1172 cpumask_copy(cpu_callin_mask, cpumask_of(0)); 1173 mb(); 1174 /* 1175 * Setup boot CPU information 1176 */ 1177 smp_store_cpu_info(0); /* Final full version of the data */ 1178 #ifdef CONFIG_X86_32 1179 boot_cpu_logical_apicid = logical_smp_processor_id(); 1180 #endif 1181 current_thread_info()->cpu = 0; /* needed? */ 1182 set_cpu_sibling_map(0); 1183 1184 #ifdef CONFIG_X86_64 1185 enable_IR_x2apic(); 1186 setup_apic_routing(); 1187 #endif 1188 1189 if (smp_sanity_check(max_cpus) < 0) { 1190 printk(KERN_INFO "SMP disabled\n"); 1191 disable_smp(); 1192 goto out; 1193 } 1194 1195 preempt_disable(); 1196 if (read_apic_id() != boot_cpu_physical_apicid) { 1197 panic("Boot APIC ID in local APIC unexpected (%d vs %d)", 1198 read_apic_id(), boot_cpu_physical_apicid); 1199 /* Or can we switch back to PIC here? */ 1200 } 1201 preempt_enable(); 1202 1203 connect_bsp_APIC(); 1204 1205 /* 1206 * Switch from PIC to APIC mode. 1207 */ 1208 setup_local_APIC(); 1209 1210 #ifdef CONFIG_X86_64 1211 /* 1212 * Enable IO APIC before setting up error vector 1213 */ 1214 if (!skip_ioapic_setup && nr_ioapics) 1215 enable_IO_APIC(); 1216 #endif 1217 end_local_APIC_setup(); 1218 1219 map_cpu_to_logical_apicid(); 1220 1221 setup_portio_remap(); 1222 1223 smpboot_setup_io_apic(); 1224 /* 1225 * Set up local APIC timer on boot CPU. 1226 */ 1227 1228 printk(KERN_INFO "CPU%d: ", 0); 1229 print_cpu_info(&cpu_data(0)); 1230 setup_boot_clock(); 1231 1232 if (is_uv_system()) 1233 uv_system_init(); 1234 out: 1235 preempt_enable(); 1236 } 1237 /* 1238 * Early setup to make printk work. 1239 */ 1240 void __init native_smp_prepare_boot_cpu(void) 1241 { 1242 int me = smp_processor_id(); 1243 #ifdef CONFIG_X86_32 1244 init_gdt(me); 1245 #endif 1246 switch_to_new_gdt(); 1247 /* already set me in cpu_online_mask in boot_cpu_init() */ 1248 cpumask_set_cpu(me, cpu_callout_mask); 1249 per_cpu(cpu_state, me) = CPU_ONLINE; 1250 } 1251 1252 void __init native_smp_cpus_done(unsigned int max_cpus) 1253 { 1254 pr_debug("Boot done.\n"); 1255 1256 impress_friends(); 1257 smp_checks(); 1258 #ifdef CONFIG_X86_IO_APIC 1259 setup_ioapic_dest(); 1260 #endif 1261 check_nmi_watchdog(); 1262 } 1263 1264 static int __initdata setup_possible_cpus = -1; 1265 static int __init _setup_possible_cpus(char *str) 1266 { 1267 get_option(&str, &setup_possible_cpus); 1268 return 0; 1269 } 1270 early_param("possible_cpus", _setup_possible_cpus); 1271 1272 1273 /* 1274 * cpu_possible_map should be static, it cannot change as cpu's 1275 * are onlined, or offlined. The reason is per-cpu data-structures 1276 * are allocated by some modules at init time, and dont expect to 1277 * do this dynamically on cpu arrival/departure. 1278 * cpu_present_map on the other hand can change dynamically. 1279 * In case when cpu_hotplug is not compiled, then we resort to current 1280 * behaviour, which is cpu_possible == cpu_present. 1281 * - Ashok Raj 1282 * 1283 * Three ways to find out the number of additional hotplug CPUs: 1284 * - If the BIOS specified disabled CPUs in ACPI/mptables use that. 1285 * - The user can overwrite it with possible_cpus=NUM 1286 * - Otherwise don't reserve additional CPUs. 1287 * We do this because additional CPUs waste a lot of memory. 1288 * -AK 1289 */ 1290 __init void prefill_possible_map(void) 1291 { 1292 int i, possible; 1293 1294 /* no processor from mptable or madt */ 1295 if (!num_processors) 1296 num_processors = 1; 1297 1298 if (setup_possible_cpus == -1) 1299 possible = num_processors + disabled_cpus; 1300 else 1301 possible = setup_possible_cpus; 1302 1303 total_cpus = max_t(int, possible, num_processors + disabled_cpus); 1304 1305 if (possible > CONFIG_NR_CPUS) { 1306 printk(KERN_WARNING 1307 "%d Processors exceeds NR_CPUS limit of %d\n", 1308 possible, CONFIG_NR_CPUS); 1309 possible = CONFIG_NR_CPUS; 1310 } 1311 1312 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", 1313 possible, max_t(int, possible - num_processors, 0)); 1314 1315 for (i = 0; i < possible; i++) 1316 set_cpu_possible(i, true); 1317 1318 nr_cpu_ids = possible; 1319 } 1320 1321 #ifdef CONFIG_HOTPLUG_CPU 1322 1323 static void remove_siblinginfo(int cpu) 1324 { 1325 int sibling; 1326 struct cpuinfo_x86 *c = &cpu_data(cpu); 1327 1328 for_each_cpu(sibling, cpu_core_mask(cpu)) { 1329 cpumask_clear_cpu(cpu, cpu_core_mask(sibling)); 1330 /*/ 1331 * last thread sibling in this cpu core going down 1332 */ 1333 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) 1334 cpu_data(sibling).booted_cores--; 1335 } 1336 1337 for_each_cpu(sibling, cpu_sibling_mask(cpu)) 1338 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling)); 1339 cpumask_clear(cpu_sibling_mask(cpu)); 1340 cpumask_clear(cpu_core_mask(cpu)); 1341 c->phys_proc_id = 0; 1342 c->cpu_core_id = 0; 1343 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask); 1344 } 1345 1346 static void __ref remove_cpu_from_maps(int cpu) 1347 { 1348 set_cpu_online(cpu, false); 1349 cpumask_clear_cpu(cpu, cpu_callout_mask); 1350 cpumask_clear_cpu(cpu, cpu_callin_mask); 1351 /* was set by cpu_init() */ 1352 cpumask_clear_cpu(cpu, cpu_initialized_mask); 1353 numa_remove_cpu(cpu); 1354 } 1355 1356 void cpu_disable_common(void) 1357 { 1358 int cpu = smp_processor_id(); 1359 /* 1360 * HACK: 1361 * Allow any queued timer interrupts to get serviced 1362 * This is only a temporary solution until we cleanup 1363 * fixup_irqs as we do for IA64. 1364 */ 1365 local_irq_enable(); 1366 mdelay(1); 1367 1368 local_irq_disable(); 1369 remove_siblinginfo(cpu); 1370 1371 /* It's now safe to remove this processor from the online map */ 1372 lock_vector_lock(); 1373 remove_cpu_from_maps(cpu); 1374 unlock_vector_lock(); 1375 fixup_irqs(); 1376 } 1377 1378 int native_cpu_disable(void) 1379 { 1380 int cpu = smp_processor_id(); 1381 1382 /* 1383 * Perhaps use cpufreq to drop frequency, but that could go 1384 * into generic code. 1385 * 1386 * We won't take down the boot processor on i386 due to some 1387 * interrupts only being able to be serviced by the BSP. 1388 * Especially so if we're not using an IOAPIC -zwane 1389 */ 1390 if (cpu == 0) 1391 return -EBUSY; 1392 1393 if (nmi_watchdog == NMI_LOCAL_APIC) 1394 stop_apic_nmi_watchdog(NULL); 1395 clear_local_APIC(); 1396 1397 cpu_disable_common(); 1398 return 0; 1399 } 1400 1401 void native_cpu_die(unsigned int cpu) 1402 { 1403 /* We don't do anything here: idle task is faking death itself. */ 1404 unsigned int i; 1405 1406 for (i = 0; i < 10; i++) { 1407 /* They ack this in play_dead by setting CPU_DEAD */ 1408 if (per_cpu(cpu_state, cpu) == CPU_DEAD) { 1409 printk(KERN_INFO "CPU %d is now offline\n", cpu); 1410 if (1 == num_online_cpus()) 1411 alternatives_smp_switch(0); 1412 return; 1413 } 1414 msleep(100); 1415 } 1416 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 1417 } 1418 1419 void play_dead_common(void) 1420 { 1421 idle_task_exit(); 1422 reset_lazy_tlbstate(); 1423 irq_ctx_exit(raw_smp_processor_id()); 1424 c1e_remove_cpu(raw_smp_processor_id()); 1425 1426 mb(); 1427 /* Ack it */ 1428 __get_cpu_var(cpu_state) = CPU_DEAD; 1429 1430 /* 1431 * With physical CPU hotplug, we should halt the cpu 1432 */ 1433 local_irq_disable(); 1434 } 1435 1436 void native_play_dead(void) 1437 { 1438 play_dead_common(); 1439 wbinvd_halt(); 1440 } 1441 1442 #else /* ... !CONFIG_HOTPLUG_CPU */ 1443 int native_cpu_disable(void) 1444 { 1445 return -ENOSYS; 1446 } 1447 1448 void native_cpu_die(unsigned int cpu) 1449 { 1450 /* We said "no" in __cpu_disable */ 1451 BUG(); 1452 } 1453 1454 void native_play_dead(void) 1455 { 1456 BUG(); 1457 } 1458 1459 #endif 1460