1 /* 2 * x86 SMP booting functions 3 * 4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> 5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> 6 * Copyright 2001 Andi Kleen, SuSE Labs. 7 * 8 * Much of the core SMP work is based on previous work by Thomas Radke, to 9 * whom a great many thanks are extended. 10 * 11 * Thanks to Intel for making available several different Pentium, 12 * Pentium Pro and Pentium-II/Xeon MP machines. 13 * Original development of Linux SMP code supported by Caldera. 14 * 15 * This code is released under the GNU General Public License version 2 or 16 * later. 17 * 18 * Fixes 19 * Felix Koop : NR_CPUS used properly 20 * Jose Renau : Handle single CPU case. 21 * Alan Cox : By repeated request 8) - Total BogoMIPS report. 22 * Greg Wright : Fix for kernel stacks panic. 23 * Erich Boleyn : MP v1.4 and additional changes. 24 * Matthias Sattler : Changes for 2.1 kernel map. 25 * Michel Lespinasse : Changes for 2.1 kernel map. 26 * Michael Chastain : Change trampoline.S to gnu as. 27 * Alan Cox : Dumb bug: 'B' step PPro's are fine 28 * Ingo Molnar : Added APIC timers, based on code 29 * from Jose Renau 30 * Ingo Molnar : various cleanups and rewrites 31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug. 32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs 33 * Andi Kleen : Changed for SMP boot into long mode. 34 * Martin J. Bligh : Added support for multi-quad systems 35 * Dave Jones : Report invalid combinations of Athlon CPUs. 36 * Rusty Russell : Hacked into shape for new "hotplug" boot process. 37 * Andi Kleen : Converted to new state machine. 38 * Ashok Raj : CPU hotplug support 39 * Glauber Costa : i386 and x86_64 integration 40 */ 41 42 #include <linux/init.h> 43 #include <linux/smp.h> 44 #include <linux/module.h> 45 #include <linux/sched.h> 46 #include <linux/percpu.h> 47 #include <linux/bootmem.h> 48 #include <linux/err.h> 49 #include <linux/nmi.h> 50 51 #include <asm/acpi.h> 52 #include <asm/desc.h> 53 #include <asm/nmi.h> 54 #include <asm/irq.h> 55 #include <asm/idle.h> 56 #include <asm/smp.h> 57 #include <asm/trampoline.h> 58 #include <asm/cpu.h> 59 #include <asm/numa.h> 60 #include <asm/pgtable.h> 61 #include <asm/tlbflush.h> 62 #include <asm/mtrr.h> 63 #include <asm/vmi.h> 64 #include <asm/genapic.h> 65 #include <asm/setup.h> 66 #include <linux/mc146818rtc.h> 67 68 #include <mach_apic.h> 69 #include <mach_wakecpu.h> 70 #include <smpboot_hooks.h> 71 72 #ifdef CONFIG_X86_32 73 u8 apicid_2_node[MAX_APICID]; 74 static int low_mappings; 75 #endif 76 77 /* State of each CPU */ 78 DEFINE_PER_CPU(int, cpu_state) = { 0 }; 79 80 /* Store all idle threads, this can be reused instead of creating 81 * a new thread. Also avoids complicated thread destroy functionality 82 * for idle threads. 83 */ 84 #ifdef CONFIG_HOTPLUG_CPU 85 /* 86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is 87 * removed after init for !CONFIG_HOTPLUG_CPU. 88 */ 89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array); 90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x)) 91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p)) 92 #else 93 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ; 94 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p)) 96 #endif 97 98 /* Number of siblings per CPU package */ 99 int smp_num_siblings = 1; 100 EXPORT_SYMBOL(smp_num_siblings); 101 102 /* Last level cache ID of each logical CPU */ 103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID; 104 105 cpumask_t cpu_callin_map; 106 cpumask_t cpu_callout_map; 107 108 /* representing HT siblings of each logical CPU */ 109 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map); 110 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 111 112 /* representing HT and core siblings of each logical CPU */ 113 DEFINE_PER_CPU(cpumask_t, cpu_core_map); 114 EXPORT_PER_CPU_SYMBOL(cpu_core_map); 115 116 /* Per CPU bogomips and other parameters */ 117 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); 118 EXPORT_PER_CPU_SYMBOL(cpu_info); 119 120 static atomic_t init_deasserted; 121 122 123 /* representing cpus for which sibling maps can be computed */ 124 static cpumask_t cpu_sibling_setup_map; 125 126 /* Set if we find a B stepping CPU */ 127 static int __cpuinitdata smp_b_stepping; 128 129 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32) 130 131 /* which logical CPUs are on which nodes */ 132 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly = 133 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE }; 134 EXPORT_SYMBOL(node_to_cpumask_map); 135 /* which node each logical CPU is on */ 136 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 }; 137 EXPORT_SYMBOL(cpu_to_node_map); 138 139 /* set up a mapping between cpu and node. */ 140 static void map_cpu_to_node(int cpu, int node) 141 { 142 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node); 143 cpu_set(cpu, node_to_cpumask_map[node]); 144 cpu_to_node_map[cpu] = node; 145 } 146 147 /* undo a mapping between cpu and node. */ 148 static void unmap_cpu_to_node(int cpu) 149 { 150 int node; 151 152 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu); 153 for (node = 0; node < MAX_NUMNODES; node++) 154 cpu_clear(cpu, node_to_cpumask_map[node]); 155 cpu_to_node_map[cpu] = 0; 156 } 157 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */ 158 #define map_cpu_to_node(cpu, node) ({}) 159 #define unmap_cpu_to_node(cpu) ({}) 160 #endif 161 162 #ifdef CONFIG_X86_32 163 static int boot_cpu_logical_apicid; 164 165 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = 166 { [0 ... NR_CPUS-1] = BAD_APICID }; 167 168 static void map_cpu_to_logical_apicid(void) 169 { 170 int cpu = smp_processor_id(); 171 int apicid = logical_smp_processor_id(); 172 int node = apicid_to_node(apicid); 173 174 if (!node_online(node)) 175 node = first_online_node; 176 177 cpu_2_logical_apicid[cpu] = apicid; 178 map_cpu_to_node(cpu, node); 179 } 180 181 void numa_remove_cpu(int cpu) 182 { 183 cpu_2_logical_apicid[cpu] = BAD_APICID; 184 unmap_cpu_to_node(cpu); 185 } 186 #else 187 #define map_cpu_to_logical_apicid() do {} while (0) 188 #endif 189 190 /* 191 * Report back to the Boot Processor. 192 * Running on AP. 193 */ 194 static void __cpuinit smp_callin(void) 195 { 196 int cpuid, phys_id; 197 unsigned long timeout; 198 199 /* 200 * If waken up by an INIT in an 82489DX configuration 201 * we may get here before an INIT-deassert IPI reaches 202 * our local APIC. We have to wait for the IPI or we'll 203 * lock up on an APIC access. 204 */ 205 wait_for_init_deassert(&init_deasserted); 206 207 /* 208 * (This works even if the APIC is not enabled.) 209 */ 210 phys_id = read_apic_id(); 211 cpuid = smp_processor_id(); 212 if (cpu_isset(cpuid, cpu_callin_map)) { 213 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__, 214 phys_id, cpuid); 215 } 216 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id); 217 218 /* 219 * STARTUP IPIs are fragile beasts as they might sometimes 220 * trigger some glue motherboard logic. Complete APIC bus 221 * silence for 1 second, this overestimates the time the 222 * boot CPU is spending to send the up to 2 STARTUP IPIs 223 * by a factor of two. This should be enough. 224 */ 225 226 /* 227 * Waiting 2s total for startup (udelay is not yet working) 228 */ 229 timeout = jiffies + 2*HZ; 230 while (time_before(jiffies, timeout)) { 231 /* 232 * Has the boot CPU finished it's STARTUP sequence? 233 */ 234 if (cpu_isset(cpuid, cpu_callout_map)) 235 break; 236 cpu_relax(); 237 } 238 239 if (!time_before(jiffies, timeout)) { 240 panic("%s: CPU%d started up but did not get a callout!\n", 241 __func__, cpuid); 242 } 243 244 /* 245 * the boot CPU has finished the init stage and is spinning 246 * on callin_map until we finish. We are free to set up this 247 * CPU, first the APIC. (this is probably redundant on most 248 * boards) 249 */ 250 251 pr_debug("CALLIN, before setup_local_APIC().\n"); 252 smp_callin_clear_local_apic(); 253 setup_local_APIC(); 254 end_local_APIC_setup(); 255 map_cpu_to_logical_apicid(); 256 257 notify_cpu_starting(cpuid); 258 /* 259 * Get our bogomips. 260 * 261 * Need to enable IRQs because it can take longer and then 262 * the NMI watchdog might kill us. 263 */ 264 local_irq_enable(); 265 calibrate_delay(); 266 local_irq_disable(); 267 pr_debug("Stack at about %p\n", &cpuid); 268 269 /* 270 * Save our processor parameters 271 */ 272 smp_store_cpu_info(cpuid); 273 274 /* 275 * Allow the master to continue. 276 */ 277 cpu_set(cpuid, cpu_callin_map); 278 } 279 280 static int __cpuinitdata unsafe_smp; 281 282 /* 283 * Activate a secondary processor. 284 */ 285 notrace static void __cpuinit start_secondary(void *unused) 286 { 287 /* 288 * Don't put *anything* before cpu_init(), SMP booting is too 289 * fragile that we want to limit the things done here to the 290 * most necessary things. 291 */ 292 vmi_bringup(); 293 cpu_init(); 294 preempt_disable(); 295 smp_callin(); 296 297 /* otherwise gcc will move up smp_processor_id before the cpu_init */ 298 barrier(); 299 /* 300 * Check TSC synchronization with the BP: 301 */ 302 check_tsc_sync_target(); 303 304 if (nmi_watchdog == NMI_IO_APIC) { 305 disable_8259A_irq(0); 306 enable_NMI_through_LVT0(); 307 enable_8259A_irq(0); 308 } 309 310 #ifdef CONFIG_X86_32 311 while (low_mappings) 312 cpu_relax(); 313 __flush_tlb_all(); 314 #endif 315 316 /* This must be done before setting cpu_online_map */ 317 set_cpu_sibling_map(raw_smp_processor_id()); 318 wmb(); 319 320 /* 321 * We need to hold call_lock, so there is no inconsistency 322 * between the time smp_call_function() determines number of 323 * IPI recipients, and the time when the determination is made 324 * for which cpus receive the IPI. Holding this 325 * lock helps us to not include this cpu in a currently in progress 326 * smp_call_function(). 327 * 328 * We need to hold vector_lock so there the set of online cpus 329 * does not change while we are assigning vectors to cpus. Holding 330 * this lock ensures we don't half assign or remove an irq from a cpu. 331 */ 332 ipi_call_lock(); 333 lock_vector_lock(); 334 __setup_vector_irq(smp_processor_id()); 335 cpu_set(smp_processor_id(), cpu_online_map); 336 unlock_vector_lock(); 337 ipi_call_unlock(); 338 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 339 340 /* enable local interrupts */ 341 local_irq_enable(); 342 343 setup_secondary_clock(); 344 345 wmb(); 346 cpu_idle(); 347 } 348 349 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c) 350 { 351 /* 352 * Mask B, Pentium, but not Pentium MMX 353 */ 354 if (c->x86_vendor == X86_VENDOR_INTEL && 355 c->x86 == 5 && 356 c->x86_mask >= 1 && c->x86_mask <= 4 && 357 c->x86_model <= 3) 358 /* 359 * Remember we have B step Pentia with bugs 360 */ 361 smp_b_stepping = 1; 362 363 /* 364 * Certain Athlons might work (for various values of 'work') in SMP 365 * but they are not certified as MP capable. 366 */ 367 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) { 368 369 if (num_possible_cpus() == 1) 370 goto valid_k7; 371 372 /* Athlon 660/661 is valid. */ 373 if ((c->x86_model == 6) && ((c->x86_mask == 0) || 374 (c->x86_mask == 1))) 375 goto valid_k7; 376 377 /* Duron 670 is valid */ 378 if ((c->x86_model == 7) && (c->x86_mask == 0)) 379 goto valid_k7; 380 381 /* 382 * Athlon 662, Duron 671, and Athlon >model 7 have capability 383 * bit. It's worth noting that the A5 stepping (662) of some 384 * Athlon XP's have the MP bit set. 385 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for 386 * more. 387 */ 388 if (((c->x86_model == 6) && (c->x86_mask >= 2)) || 389 ((c->x86_model == 7) && (c->x86_mask >= 1)) || 390 (c->x86_model > 7)) 391 if (cpu_has_mp) 392 goto valid_k7; 393 394 /* If we get here, not a certified SMP capable AMD system. */ 395 unsafe_smp = 1; 396 } 397 398 valid_k7: 399 ; 400 } 401 402 static void __cpuinit smp_checks(void) 403 { 404 if (smp_b_stepping) 405 printk(KERN_WARNING "WARNING: SMP operation may be unreliable" 406 "with B stepping processors.\n"); 407 408 /* 409 * Don't taint if we are running SMP kernel on a single non-MP 410 * approved Athlon 411 */ 412 if (unsafe_smp && num_online_cpus() > 1) { 413 printk(KERN_INFO "WARNING: This combination of AMD" 414 "processors is not suitable for SMP.\n"); 415 add_taint(TAINT_UNSAFE_SMP); 416 } 417 } 418 419 /* 420 * The bootstrap kernel entry code has set these up. Save them for 421 * a given CPU 422 */ 423 424 void __cpuinit smp_store_cpu_info(int id) 425 { 426 struct cpuinfo_x86 *c = &cpu_data(id); 427 428 *c = boot_cpu_data; 429 c->cpu_index = id; 430 if (id != 0) 431 identify_secondary_cpu(c); 432 smp_apply_quirks(c); 433 } 434 435 436 void __cpuinit set_cpu_sibling_map(int cpu) 437 { 438 int i; 439 struct cpuinfo_x86 *c = &cpu_data(cpu); 440 441 cpu_set(cpu, cpu_sibling_setup_map); 442 443 if (smp_num_siblings > 1) { 444 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) { 445 if (c->phys_proc_id == cpu_data(i).phys_proc_id && 446 c->cpu_core_id == cpu_data(i).cpu_core_id) { 447 cpu_set(i, per_cpu(cpu_sibling_map, cpu)); 448 cpu_set(cpu, per_cpu(cpu_sibling_map, i)); 449 cpu_set(i, per_cpu(cpu_core_map, cpu)); 450 cpu_set(cpu, per_cpu(cpu_core_map, i)); 451 cpu_set(i, c->llc_shared_map); 452 cpu_set(cpu, cpu_data(i).llc_shared_map); 453 } 454 } 455 } else { 456 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu)); 457 } 458 459 cpu_set(cpu, c->llc_shared_map); 460 461 if (current_cpu_data.x86_max_cores == 1) { 462 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu); 463 c->booted_cores = 1; 464 return; 465 } 466 467 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) { 468 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID && 469 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) { 470 cpu_set(i, c->llc_shared_map); 471 cpu_set(cpu, cpu_data(i).llc_shared_map); 472 } 473 if (c->phys_proc_id == cpu_data(i).phys_proc_id) { 474 cpu_set(i, per_cpu(cpu_core_map, cpu)); 475 cpu_set(cpu, per_cpu(cpu_core_map, i)); 476 /* 477 * Does this new cpu bringup a new core? 478 */ 479 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) { 480 /* 481 * for each core in package, increment 482 * the booted_cores for this new cpu 483 */ 484 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i) 485 c->booted_cores++; 486 /* 487 * increment the core count for all 488 * the other cpus in this package 489 */ 490 if (i != cpu) 491 cpu_data(i).booted_cores++; 492 } else if (i != cpu && !c->booted_cores) 493 c->booted_cores = cpu_data(i).booted_cores; 494 } 495 } 496 } 497 498 /* maps the cpu to the sched domain representing multi-core */ 499 const struct cpumask *cpu_coregroup_mask(int cpu) 500 { 501 struct cpuinfo_x86 *c = &cpu_data(cpu); 502 /* 503 * For perf, we return last level cache shared map. 504 * And for power savings, we return cpu_core_map 505 */ 506 if (sched_mc_power_savings || sched_smt_power_savings) 507 return &per_cpu(cpu_core_map, cpu); 508 else 509 return &c->llc_shared_map; 510 } 511 512 cpumask_t cpu_coregroup_map(int cpu) 513 { 514 return *cpu_coregroup_mask(cpu); 515 } 516 517 static void impress_friends(void) 518 { 519 int cpu; 520 unsigned long bogosum = 0; 521 /* 522 * Allow the user to impress friends. 523 */ 524 pr_debug("Before bogomips.\n"); 525 for_each_possible_cpu(cpu) 526 if (cpu_isset(cpu, cpu_callout_map)) 527 bogosum += cpu_data(cpu).loops_per_jiffy; 528 printk(KERN_INFO 529 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 530 num_online_cpus(), 531 bogosum/(500000/HZ), 532 (bogosum/(5000/HZ))%100); 533 534 pr_debug("Before bogocount - setting activated=1.\n"); 535 } 536 537 void __inquire_remote_apic(int apicid) 538 { 539 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; 540 char *names[] = { "ID", "VERSION", "SPIV" }; 541 int timeout; 542 u32 status; 543 544 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid); 545 546 for (i = 0; i < ARRAY_SIZE(regs); i++) { 547 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]); 548 549 /* 550 * Wait for idle. 551 */ 552 status = safe_apic_wait_icr_idle(); 553 if (status) 554 printk(KERN_CONT 555 "a previous APIC delivery may have failed\n"); 556 557 apic_icr_write(APIC_DM_REMRD | regs[i], apicid); 558 559 timeout = 0; 560 do { 561 udelay(100); 562 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK; 563 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000); 564 565 switch (status) { 566 case APIC_ICR_RR_VALID: 567 status = apic_read(APIC_RRR); 568 printk(KERN_CONT "%08x\n", status); 569 break; 570 default: 571 printk(KERN_CONT "failed\n"); 572 } 573 } 574 } 575 576 /* 577 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal 578 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this 579 * won't ... remember to clear down the APIC, etc later. 580 */ 581 int __devinit 582 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) 583 { 584 unsigned long send_status, accept_status = 0; 585 int maxlvt; 586 587 /* Target chip */ 588 /* Boot on the stack */ 589 /* Kick the second */ 590 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid); 591 592 pr_debug("Waiting for send to finish...\n"); 593 send_status = safe_apic_wait_icr_idle(); 594 595 /* 596 * Give the other CPU some time to accept the IPI. 597 */ 598 udelay(200); 599 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 600 maxlvt = lapic_get_maxlvt(); 601 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 602 apic_write(APIC_ESR, 0); 603 accept_status = (apic_read(APIC_ESR) & 0xEF); 604 } 605 pr_debug("NMI sent.\n"); 606 607 if (send_status) 608 printk(KERN_ERR "APIC never delivered???\n"); 609 if (accept_status) 610 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status); 611 612 return (send_status | accept_status); 613 } 614 615 int __devinit 616 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) 617 { 618 unsigned long send_status, accept_status = 0; 619 int maxlvt, num_starts, j; 620 621 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) { 622 send_status = uv_wakeup_secondary(phys_apicid, start_eip); 623 atomic_set(&init_deasserted, 1); 624 return send_status; 625 } 626 627 maxlvt = lapic_get_maxlvt(); 628 629 /* 630 * Be paranoid about clearing APIC errors. 631 */ 632 if (APIC_INTEGRATED(apic_version[phys_apicid])) { 633 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 634 apic_write(APIC_ESR, 0); 635 apic_read(APIC_ESR); 636 } 637 638 pr_debug("Asserting INIT.\n"); 639 640 /* 641 * Turn INIT on target chip 642 */ 643 /* 644 * Send IPI 645 */ 646 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, 647 phys_apicid); 648 649 pr_debug("Waiting for send to finish...\n"); 650 send_status = safe_apic_wait_icr_idle(); 651 652 mdelay(10); 653 654 pr_debug("Deasserting INIT.\n"); 655 656 /* Target chip */ 657 /* Send IPI */ 658 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); 659 660 pr_debug("Waiting for send to finish...\n"); 661 send_status = safe_apic_wait_icr_idle(); 662 663 mb(); 664 atomic_set(&init_deasserted, 1); 665 666 /* 667 * Should we send STARTUP IPIs ? 668 * 669 * Determine this based on the APIC version. 670 * If we don't have an integrated APIC, don't send the STARTUP IPIs. 671 */ 672 if (APIC_INTEGRATED(apic_version[phys_apicid])) 673 num_starts = 2; 674 else 675 num_starts = 0; 676 677 /* 678 * Paravirt / VMI wants a startup IPI hook here to set up the 679 * target processor state. 680 */ 681 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary, 682 (unsigned long)stack_start.sp); 683 684 /* 685 * Run STARTUP IPI loop. 686 */ 687 pr_debug("#startup loops: %d.\n", num_starts); 688 689 for (j = 1; j <= num_starts; j++) { 690 pr_debug("Sending STARTUP #%d.\n", j); 691 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 692 apic_write(APIC_ESR, 0); 693 apic_read(APIC_ESR); 694 pr_debug("After apic_write.\n"); 695 696 /* 697 * STARTUP IPI 698 */ 699 700 /* Target chip */ 701 /* Boot on the stack */ 702 /* Kick the second */ 703 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), 704 phys_apicid); 705 706 /* 707 * Give the other CPU some time to accept the IPI. 708 */ 709 udelay(300); 710 711 pr_debug("Startup point 1.\n"); 712 713 pr_debug("Waiting for send to finish...\n"); 714 send_status = safe_apic_wait_icr_idle(); 715 716 /* 717 * Give the other CPU some time to accept the IPI. 718 */ 719 udelay(200); 720 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 721 apic_write(APIC_ESR, 0); 722 accept_status = (apic_read(APIC_ESR) & 0xEF); 723 if (send_status || accept_status) 724 break; 725 } 726 pr_debug("After Startup.\n"); 727 728 if (send_status) 729 printk(KERN_ERR "APIC never delivered???\n"); 730 if (accept_status) 731 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status); 732 733 return (send_status | accept_status); 734 } 735 736 struct create_idle { 737 struct work_struct work; 738 struct task_struct *idle; 739 struct completion done; 740 int cpu; 741 }; 742 743 static void __cpuinit do_fork_idle(struct work_struct *work) 744 { 745 struct create_idle *c_idle = 746 container_of(work, struct create_idle, work); 747 748 c_idle->idle = fork_idle(c_idle->cpu); 749 complete(&c_idle->done); 750 } 751 752 #ifdef CONFIG_X86_64 753 754 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */ 755 static void __ref free_bootmem_pda(struct x8664_pda *oldpda) 756 { 757 if (!after_bootmem) 758 free_bootmem((unsigned long)oldpda, sizeof(*oldpda)); 759 } 760 761 /* 762 * Allocate node local memory for the AP pda. 763 * 764 * Must be called after the _cpu_pda pointer table is initialized. 765 */ 766 int __cpuinit get_local_pda(int cpu) 767 { 768 struct x8664_pda *oldpda, *newpda; 769 unsigned long size = sizeof(struct x8664_pda); 770 int node = cpu_to_node(cpu); 771 772 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem) 773 return 0; 774 775 oldpda = cpu_pda(cpu); 776 newpda = kmalloc_node(size, GFP_ATOMIC, node); 777 if (!newpda) { 778 printk(KERN_ERR "Could not allocate node local PDA " 779 "for CPU %d on node %d\n", cpu, node); 780 781 if (oldpda) 782 return 0; /* have a usable pda */ 783 else 784 return -1; 785 } 786 787 if (oldpda) { 788 memcpy(newpda, oldpda, size); 789 free_bootmem_pda(oldpda); 790 } 791 792 newpda->in_bootmem = 0; 793 cpu_pda(cpu) = newpda; 794 return 0; 795 } 796 #endif /* CONFIG_X86_64 */ 797 798 static int __cpuinit do_boot_cpu(int apicid, int cpu) 799 /* 800 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 801 * (ie clustered apic addressing mode), this is a LOGICAL apic ID. 802 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu. 803 */ 804 { 805 unsigned long boot_error = 0; 806 int timeout; 807 unsigned long start_ip; 808 unsigned short nmi_high = 0, nmi_low = 0; 809 struct create_idle c_idle = { 810 .cpu = cpu, 811 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), 812 }; 813 INIT_WORK(&c_idle.work, do_fork_idle); 814 815 #ifdef CONFIG_X86_64 816 /* Allocate node local memory for AP pdas */ 817 if (cpu > 0) { 818 boot_error = get_local_pda(cpu); 819 if (boot_error) 820 goto restore_state; 821 /* if can't get pda memory, can't start cpu */ 822 } 823 #endif 824 825 alternatives_smp_switch(1); 826 827 c_idle.idle = get_idle_for_cpu(cpu); 828 829 /* 830 * We can't use kernel_thread since we must avoid to 831 * reschedule the child. 832 */ 833 if (c_idle.idle) { 834 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *) 835 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1); 836 init_idle(c_idle.idle, cpu); 837 goto do_rest; 838 } 839 840 if (!keventd_up() || current_is_keventd()) 841 c_idle.work.func(&c_idle.work); 842 else { 843 schedule_work(&c_idle.work); 844 wait_for_completion(&c_idle.done); 845 } 846 847 if (IS_ERR(c_idle.idle)) { 848 printk("failed fork for CPU %d\n", cpu); 849 return PTR_ERR(c_idle.idle); 850 } 851 852 set_idle_for_cpu(cpu, c_idle.idle); 853 do_rest: 854 #ifdef CONFIG_X86_32 855 per_cpu(current_task, cpu) = c_idle.idle; 856 init_gdt(cpu); 857 /* Stack for startup_32 can be just as for start_secondary onwards */ 858 irq_ctx_init(cpu); 859 #else 860 cpu_pda(cpu)->pcurrent = c_idle.idle; 861 clear_tsk_thread_flag(c_idle.idle, TIF_FORK); 862 #endif 863 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); 864 initial_code = (unsigned long)start_secondary; 865 stack_start.sp = (void *) c_idle.idle->thread.sp; 866 867 /* start_ip had better be page-aligned! */ 868 start_ip = setup_trampoline(); 869 870 /* So we see what's up */ 871 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n", 872 cpu, apicid, start_ip); 873 874 /* 875 * This grunge runs the startup process for 876 * the targeted processor. 877 */ 878 879 atomic_set(&init_deasserted, 0); 880 881 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { 882 883 pr_debug("Setting warm reset code and vector.\n"); 884 885 store_NMI_vector(&nmi_high, &nmi_low); 886 887 smpboot_setup_warm_reset_vector(start_ip); 888 /* 889 * Be paranoid about clearing APIC errors. 890 */ 891 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 892 apic_write(APIC_ESR, 0); 893 apic_read(APIC_ESR); 894 } 895 } 896 897 /* 898 * Starting actual IPI sequence... 899 */ 900 boot_error = wakeup_secondary_cpu(apicid, start_ip); 901 902 if (!boot_error) { 903 /* 904 * allow APs to start initializing. 905 */ 906 pr_debug("Before Callout %d.\n", cpu); 907 cpu_set(cpu, cpu_callout_map); 908 pr_debug("After Callout %d.\n", cpu); 909 910 /* 911 * Wait 5s total for a response 912 */ 913 for (timeout = 0; timeout < 50000; timeout++) { 914 if (cpu_isset(cpu, cpu_callin_map)) 915 break; /* It has booted */ 916 udelay(100); 917 } 918 919 if (cpu_isset(cpu, cpu_callin_map)) { 920 /* number CPUs logically, starting from 1 (BSP is 0) */ 921 pr_debug("OK.\n"); 922 printk(KERN_INFO "CPU%d: ", cpu); 923 print_cpu_info(&cpu_data(cpu)); 924 pr_debug("CPU has booted.\n"); 925 } else { 926 boot_error = 1; 927 if (*((volatile unsigned char *)trampoline_base) 928 == 0xA5) 929 /* trampoline started but...? */ 930 printk(KERN_ERR "Stuck ??\n"); 931 else 932 /* trampoline code not run */ 933 printk(KERN_ERR "Not responding.\n"); 934 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) 935 inquire_remote_apic(apicid); 936 } 937 } 938 #ifdef CONFIG_X86_64 939 restore_state: 940 #endif 941 if (boot_error) { 942 /* Try to put things back the way they were before ... */ 943 numa_remove_cpu(cpu); /* was set by numa_add_cpu */ 944 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */ 945 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */ 946 cpu_clear(cpu, cpu_present_map); 947 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; 948 } 949 950 /* mark "stuck" area as not stuck */ 951 *((volatile unsigned long *)trampoline_base) = 0; 952 953 /* 954 * Cleanup possible dangling ends... 955 */ 956 smpboot_restore_warm_reset_vector(); 957 958 return boot_error; 959 } 960 961 int __cpuinit native_cpu_up(unsigned int cpu) 962 { 963 int apicid = cpu_present_to_apicid(cpu); 964 unsigned long flags; 965 int err; 966 967 WARN_ON(irqs_disabled()); 968 969 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); 970 971 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid || 972 !physid_isset(apicid, phys_cpu_present_map)) { 973 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu); 974 return -EINVAL; 975 } 976 977 /* 978 * Already booted CPU? 979 */ 980 if (cpu_isset(cpu, cpu_callin_map)) { 981 pr_debug("do_boot_cpu %d Already started\n", cpu); 982 return -ENOSYS; 983 } 984 985 /* 986 * Save current MTRR state in case it was changed since early boot 987 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync: 988 */ 989 mtrr_save_state(); 990 991 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 992 993 #ifdef CONFIG_X86_32 994 /* init low mem mapping */ 995 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 996 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY)); 997 flush_tlb_all(); 998 low_mappings = 1; 999 1000 err = do_boot_cpu(apicid, cpu); 1001 1002 zap_low_mappings(); 1003 low_mappings = 0; 1004 #else 1005 err = do_boot_cpu(apicid, cpu); 1006 #endif 1007 if (err) { 1008 pr_debug("do_boot_cpu failed %d\n", err); 1009 return -EIO; 1010 } 1011 1012 /* 1013 * Check TSC synchronization with the AP (keep irqs disabled 1014 * while doing so): 1015 */ 1016 local_irq_save(flags); 1017 check_tsc_sync_source(cpu); 1018 local_irq_restore(flags); 1019 1020 while (!cpu_online(cpu)) { 1021 cpu_relax(); 1022 touch_nmi_watchdog(); 1023 } 1024 1025 return 0; 1026 } 1027 1028 /* 1029 * Fall back to non SMP mode after errors. 1030 * 1031 * RED-PEN audit/test this more. I bet there is more state messed up here. 1032 */ 1033 static __init void disable_smp(void) 1034 { 1035 cpu_present_map = cpumask_of_cpu(0); 1036 cpu_possible_map = cpumask_of_cpu(0); 1037 smpboot_clear_io_apic_irqs(); 1038 1039 if (smp_found_config) 1040 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); 1041 else 1042 physid_set_mask_of_physid(0, &phys_cpu_present_map); 1043 map_cpu_to_logical_apicid(); 1044 cpu_set(0, per_cpu(cpu_sibling_map, 0)); 1045 cpu_set(0, per_cpu(cpu_core_map, 0)); 1046 } 1047 1048 /* 1049 * Various sanity checks. 1050 */ 1051 static int __init smp_sanity_check(unsigned max_cpus) 1052 { 1053 preempt_disable(); 1054 1055 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32) 1056 if (def_to_bigsmp && nr_cpu_ids > 8) { 1057 unsigned int cpu; 1058 unsigned nr; 1059 1060 printk(KERN_WARNING 1061 "More than 8 CPUs detected - skipping them.\n" 1062 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n"); 1063 1064 nr = 0; 1065 for_each_present_cpu(cpu) { 1066 if (nr >= 8) 1067 cpu_clear(cpu, cpu_present_map); 1068 nr++; 1069 } 1070 1071 nr = 0; 1072 for_each_possible_cpu(cpu) { 1073 if (nr >= 8) 1074 cpu_clear(cpu, cpu_possible_map); 1075 nr++; 1076 } 1077 1078 nr_cpu_ids = 8; 1079 } 1080 #endif 1081 1082 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { 1083 printk(KERN_WARNING 1084 "weird, boot CPU (#%d) not listed by the BIOS.\n", 1085 hard_smp_processor_id()); 1086 1087 physid_set(hard_smp_processor_id(), phys_cpu_present_map); 1088 } 1089 1090 /* 1091 * If we couldn't find an SMP configuration at boot time, 1092 * get out of here now! 1093 */ 1094 if (!smp_found_config && !acpi_lapic) { 1095 preempt_enable(); 1096 printk(KERN_NOTICE "SMP motherboard not detected.\n"); 1097 disable_smp(); 1098 if (APIC_init_uniprocessor()) 1099 printk(KERN_NOTICE "Local APIC not detected." 1100 " Using dummy APIC emulation.\n"); 1101 return -1; 1102 } 1103 1104 /* 1105 * Should not be necessary because the MP table should list the boot 1106 * CPU too, but we do it for the sake of robustness anyway. 1107 */ 1108 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) { 1109 printk(KERN_NOTICE 1110 "weird, boot CPU (#%d) not listed by the BIOS.\n", 1111 boot_cpu_physical_apicid); 1112 physid_set(hard_smp_processor_id(), phys_cpu_present_map); 1113 } 1114 preempt_enable(); 1115 1116 /* 1117 * If we couldn't find a local APIC, then get out of here now! 1118 */ 1119 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && 1120 !cpu_has_apic) { 1121 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n", 1122 boot_cpu_physical_apicid); 1123 printk(KERN_ERR "... forcing use of dummy APIC emulation." 1124 "(tell your hw vendor)\n"); 1125 smpboot_clear_io_apic(); 1126 return -1; 1127 } 1128 1129 verify_local_APIC(); 1130 1131 /* 1132 * If SMP should be disabled, then really disable it! 1133 */ 1134 if (!max_cpus) { 1135 printk(KERN_INFO "SMP mode deactivated.\n"); 1136 smpboot_clear_io_apic(); 1137 1138 localise_nmi_watchdog(); 1139 1140 connect_bsp_APIC(); 1141 setup_local_APIC(); 1142 end_local_APIC_setup(); 1143 return -1; 1144 } 1145 1146 return 0; 1147 } 1148 1149 static void __init smp_cpu_index_default(void) 1150 { 1151 int i; 1152 struct cpuinfo_x86 *c; 1153 1154 for_each_possible_cpu(i) { 1155 c = &cpu_data(i); 1156 /* mark all to hotplug */ 1157 c->cpu_index = nr_cpu_ids; 1158 } 1159 } 1160 1161 /* 1162 * Prepare for SMP bootup. The MP table or ACPI has been read 1163 * earlier. Just do some sanity checking here and enable APIC mode. 1164 */ 1165 void __init native_smp_prepare_cpus(unsigned int max_cpus) 1166 { 1167 preempt_disable(); 1168 smp_cpu_index_default(); 1169 current_cpu_data = boot_cpu_data; 1170 cpu_callin_map = cpumask_of_cpu(0); 1171 mb(); 1172 /* 1173 * Setup boot CPU information 1174 */ 1175 smp_store_cpu_info(0); /* Final full version of the data */ 1176 #ifdef CONFIG_X86_32 1177 boot_cpu_logical_apicid = logical_smp_processor_id(); 1178 #endif 1179 current_thread_info()->cpu = 0; /* needed? */ 1180 set_cpu_sibling_map(0); 1181 1182 #ifdef CONFIG_X86_64 1183 enable_IR_x2apic(); 1184 setup_apic_routing(); 1185 #endif 1186 1187 if (smp_sanity_check(max_cpus) < 0) { 1188 printk(KERN_INFO "SMP disabled\n"); 1189 disable_smp(); 1190 goto out; 1191 } 1192 1193 preempt_disable(); 1194 if (read_apic_id() != boot_cpu_physical_apicid) { 1195 panic("Boot APIC ID in local APIC unexpected (%d vs %d)", 1196 read_apic_id(), boot_cpu_physical_apicid); 1197 /* Or can we switch back to PIC here? */ 1198 } 1199 preempt_enable(); 1200 1201 connect_bsp_APIC(); 1202 1203 /* 1204 * Switch from PIC to APIC mode. 1205 */ 1206 setup_local_APIC(); 1207 1208 #ifdef CONFIG_X86_64 1209 /* 1210 * Enable IO APIC before setting up error vector 1211 */ 1212 if (!skip_ioapic_setup && nr_ioapics) 1213 enable_IO_APIC(); 1214 #endif 1215 end_local_APIC_setup(); 1216 1217 map_cpu_to_logical_apicid(); 1218 1219 setup_portio_remap(); 1220 1221 smpboot_setup_io_apic(); 1222 /* 1223 * Set up local APIC timer on boot CPU. 1224 */ 1225 1226 printk(KERN_INFO "CPU%d: ", 0); 1227 print_cpu_info(&cpu_data(0)); 1228 setup_boot_clock(); 1229 1230 if (is_uv_system()) 1231 uv_system_init(); 1232 out: 1233 preempt_enable(); 1234 } 1235 /* 1236 * Early setup to make printk work. 1237 */ 1238 void __init native_smp_prepare_boot_cpu(void) 1239 { 1240 int me = smp_processor_id(); 1241 #ifdef CONFIG_X86_32 1242 init_gdt(me); 1243 #endif 1244 switch_to_new_gdt(); 1245 /* already set me in cpu_online_map in boot_cpu_init() */ 1246 cpu_set(me, cpu_callout_map); 1247 per_cpu(cpu_state, me) = CPU_ONLINE; 1248 } 1249 1250 void __init native_smp_cpus_done(unsigned int max_cpus) 1251 { 1252 pr_debug("Boot done.\n"); 1253 1254 impress_friends(); 1255 smp_checks(); 1256 #ifdef CONFIG_X86_IO_APIC 1257 setup_ioapic_dest(); 1258 #endif 1259 check_nmi_watchdog(); 1260 } 1261 1262 static int __initdata setup_possible_cpus = -1; 1263 static int __init _setup_possible_cpus(char *str) 1264 { 1265 get_option(&str, &setup_possible_cpus); 1266 return 0; 1267 } 1268 early_param("possible_cpus", _setup_possible_cpus); 1269 1270 1271 /* 1272 * cpu_possible_map should be static, it cannot change as cpu's 1273 * are onlined, or offlined. The reason is per-cpu data-structures 1274 * are allocated by some modules at init time, and dont expect to 1275 * do this dynamically on cpu arrival/departure. 1276 * cpu_present_map on the other hand can change dynamically. 1277 * In case when cpu_hotplug is not compiled, then we resort to current 1278 * behaviour, which is cpu_possible == cpu_present. 1279 * - Ashok Raj 1280 * 1281 * Three ways to find out the number of additional hotplug CPUs: 1282 * - If the BIOS specified disabled CPUs in ACPI/mptables use that. 1283 * - The user can overwrite it with possible_cpus=NUM 1284 * - Otherwise don't reserve additional CPUs. 1285 * We do this because additional CPUs waste a lot of memory. 1286 * -AK 1287 */ 1288 __init void prefill_possible_map(void) 1289 { 1290 int i, possible; 1291 1292 /* no processor from mptable or madt */ 1293 if (!num_processors) 1294 num_processors = 1; 1295 1296 if (setup_possible_cpus == -1) 1297 possible = num_processors + disabled_cpus; 1298 else 1299 possible = setup_possible_cpus; 1300 1301 total_cpus = max_t(int, possible, num_processors + disabled_cpus); 1302 1303 if (possible > CONFIG_NR_CPUS) { 1304 printk(KERN_WARNING 1305 "%d Processors exceeds NR_CPUS limit of %d\n", 1306 possible, CONFIG_NR_CPUS); 1307 possible = CONFIG_NR_CPUS; 1308 } 1309 1310 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", 1311 possible, max_t(int, possible - num_processors, 0)); 1312 1313 for (i = 0; i < possible; i++) 1314 cpu_set(i, cpu_possible_map); 1315 1316 nr_cpu_ids = possible; 1317 } 1318 1319 #ifdef CONFIG_HOTPLUG_CPU 1320 1321 static void remove_siblinginfo(int cpu) 1322 { 1323 int sibling; 1324 struct cpuinfo_x86 *c = &cpu_data(cpu); 1325 1326 for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) { 1327 cpu_clear(cpu, per_cpu(cpu_core_map, sibling)); 1328 /*/ 1329 * last thread sibling in this cpu core going down 1330 */ 1331 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) 1332 cpu_data(sibling).booted_cores--; 1333 } 1334 1335 for_each_cpu_mask_nr(sibling, per_cpu(cpu_sibling_map, cpu)) 1336 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling)); 1337 cpus_clear(per_cpu(cpu_sibling_map, cpu)); 1338 cpus_clear(per_cpu(cpu_core_map, cpu)); 1339 c->phys_proc_id = 0; 1340 c->cpu_core_id = 0; 1341 cpu_clear(cpu, cpu_sibling_setup_map); 1342 } 1343 1344 static void __ref remove_cpu_from_maps(int cpu) 1345 { 1346 cpu_clear(cpu, cpu_online_map); 1347 cpu_clear(cpu, cpu_callout_map); 1348 cpu_clear(cpu, cpu_callin_map); 1349 /* was set by cpu_init() */ 1350 cpu_clear(cpu, cpu_initialized); 1351 numa_remove_cpu(cpu); 1352 } 1353 1354 void cpu_disable_common(void) 1355 { 1356 int cpu = smp_processor_id(); 1357 /* 1358 * HACK: 1359 * Allow any queued timer interrupts to get serviced 1360 * This is only a temporary solution until we cleanup 1361 * fixup_irqs as we do for IA64. 1362 */ 1363 local_irq_enable(); 1364 mdelay(1); 1365 1366 local_irq_disable(); 1367 remove_siblinginfo(cpu); 1368 1369 /* It's now safe to remove this processor from the online map */ 1370 lock_vector_lock(); 1371 remove_cpu_from_maps(cpu); 1372 unlock_vector_lock(); 1373 fixup_irqs(); 1374 } 1375 1376 int native_cpu_disable(void) 1377 { 1378 int cpu = smp_processor_id(); 1379 1380 /* 1381 * Perhaps use cpufreq to drop frequency, but that could go 1382 * into generic code. 1383 * 1384 * We won't take down the boot processor on i386 due to some 1385 * interrupts only being able to be serviced by the BSP. 1386 * Especially so if we're not using an IOAPIC -zwane 1387 */ 1388 if (cpu == 0) 1389 return -EBUSY; 1390 1391 if (nmi_watchdog == NMI_LOCAL_APIC) 1392 stop_apic_nmi_watchdog(NULL); 1393 clear_local_APIC(); 1394 1395 cpu_disable_common(); 1396 return 0; 1397 } 1398 1399 void native_cpu_die(unsigned int cpu) 1400 { 1401 /* We don't do anything here: idle task is faking death itself. */ 1402 unsigned int i; 1403 1404 for (i = 0; i < 10; i++) { 1405 /* They ack this in play_dead by setting CPU_DEAD */ 1406 if (per_cpu(cpu_state, cpu) == CPU_DEAD) { 1407 printk(KERN_INFO "CPU %d is now offline\n", cpu); 1408 if (1 == num_online_cpus()) 1409 alternatives_smp_switch(0); 1410 return; 1411 } 1412 msleep(100); 1413 } 1414 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 1415 } 1416 1417 void play_dead_common(void) 1418 { 1419 idle_task_exit(); 1420 reset_lazy_tlbstate(); 1421 irq_ctx_exit(raw_smp_processor_id()); 1422 c1e_remove_cpu(raw_smp_processor_id()); 1423 1424 mb(); 1425 /* Ack it */ 1426 __get_cpu_var(cpu_state) = CPU_DEAD; 1427 1428 /* 1429 * With physical CPU hotplug, we should halt the cpu 1430 */ 1431 local_irq_disable(); 1432 } 1433 1434 void native_play_dead(void) 1435 { 1436 play_dead_common(); 1437 wbinvd_halt(); 1438 } 1439 1440 #else /* ... !CONFIG_HOTPLUG_CPU */ 1441 int native_cpu_disable(void) 1442 { 1443 return -ENOSYS; 1444 } 1445 1446 void native_cpu_die(unsigned int cpu) 1447 { 1448 /* We said "no" in __cpu_disable */ 1449 BUG(); 1450 } 1451 1452 void native_play_dead(void) 1453 { 1454 BUG(); 1455 } 1456 1457 #endif 1458