1 #include <linux/module.h> 2 #include <linux/reboot.h> 3 #include <linux/init.h> 4 #include <linux/pm.h> 5 #include <linux/efi.h> 6 #include <linux/dmi.h> 7 #include <linux/sched.h> 8 #include <linux/tboot.h> 9 #include <acpi/reboot.h> 10 #include <asm/io.h> 11 #include <asm/apic.h> 12 #include <asm/desc.h> 13 #include <asm/hpet.h> 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/reboot_fixups.h> 17 #include <asm/reboot.h> 18 #include <asm/pci_x86.h> 19 #include <asm/virtext.h> 20 #include <asm/cpu.h> 21 #include <asm/nmi.h> 22 23 #ifdef CONFIG_X86_32 24 # include <linux/ctype.h> 25 # include <linux/mc146818rtc.h> 26 #else 27 # include <asm/x86_init.h> 28 #endif 29 30 /* 31 * Power off function, if any 32 */ 33 void (*pm_power_off)(void); 34 EXPORT_SYMBOL(pm_power_off); 35 36 static const struct desc_ptr no_idt = {}; 37 static int reboot_mode; 38 enum reboot_type reboot_type = BOOT_KBD; 39 int reboot_force; 40 41 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 42 static int reboot_cpu = -1; 43 #endif 44 45 /* This is set if we need to go through the 'emergency' path. 46 * When machine_emergency_restart() is called, we may be on 47 * an inconsistent state and won't be able to do a clean cleanup 48 */ 49 static int reboot_emergency; 50 51 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ 52 bool port_cf9_safe = false; 53 54 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] 55 warm Don't set the cold reboot flag 56 cold Set the cold reboot flag 57 bios Reboot by jumping through the BIOS (only for X86_32) 58 smp Reboot by executing reset on BSP or other CPU (only for X86_32) 59 triple Force a triple fault (init) 60 kbd Use the keyboard controller. cold reset (default) 61 acpi Use the RESET_REG in the FADT 62 efi Use efi reset_system runtime service 63 pci Use the so-called "PCI reset register", CF9 64 force Avoid anything that could hang. 65 */ 66 static int __init reboot_setup(char *str) 67 { 68 for (;;) { 69 switch (*str) { 70 case 'w': 71 reboot_mode = 0x1234; 72 break; 73 74 case 'c': 75 reboot_mode = 0; 76 break; 77 78 #ifdef CONFIG_X86_32 79 #ifdef CONFIG_SMP 80 case 's': 81 if (isdigit(*(str+1))) { 82 reboot_cpu = (int) (*(str+1) - '0'); 83 if (isdigit(*(str+2))) 84 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); 85 } 86 /* we will leave sorting out the final value 87 when we are ready to reboot, since we might not 88 have detected BSP APIC ID or smp_num_cpu */ 89 break; 90 #endif /* CONFIG_SMP */ 91 92 case 'b': 93 #endif 94 case 'a': 95 case 'k': 96 case 't': 97 case 'e': 98 case 'p': 99 reboot_type = *str; 100 break; 101 102 case 'f': 103 reboot_force = 1; 104 break; 105 } 106 107 str = strchr(str, ','); 108 if (str) 109 str++; 110 else 111 break; 112 } 113 return 1; 114 } 115 116 __setup("reboot=", reboot_setup); 117 118 119 #ifdef CONFIG_X86_32 120 /* 121 * Reboot options and system auto-detection code provided by 122 * Dell Inc. so their systems "just work". :-) 123 */ 124 125 /* 126 * Some machines require the "reboot=b" commandline option, 127 * this quirk makes that automatic. 128 */ 129 static int __init set_bios_reboot(const struct dmi_system_id *d) 130 { 131 if (reboot_type != BOOT_BIOS) { 132 reboot_type = BOOT_BIOS; 133 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); 134 } 135 return 0; 136 } 137 138 static struct dmi_system_id __initdata reboot_dmi_table[] = { 139 { /* Handle problems with rebooting on Dell E520's */ 140 .callback = set_bios_reboot, 141 .ident = "Dell E520", 142 .matches = { 143 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 144 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 145 }, 146 }, 147 { /* Handle problems with rebooting on Dell 1300's */ 148 .callback = set_bios_reboot, 149 .ident = "Dell PowerEdge 1300", 150 .matches = { 151 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 152 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 153 }, 154 }, 155 { /* Handle problems with rebooting on Dell 300's */ 156 .callback = set_bios_reboot, 157 .ident = "Dell PowerEdge 300", 158 .matches = { 159 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 160 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 161 }, 162 }, 163 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ 164 .callback = set_bios_reboot, 165 .ident = "Dell OptiPlex 745", 166 .matches = { 167 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 168 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 169 }, 170 }, 171 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ 172 .callback = set_bios_reboot, 173 .ident = "Dell OptiPlex 745", 174 .matches = { 175 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 176 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 177 DMI_MATCH(DMI_BOARD_NAME, "0MM599"), 178 }, 179 }, 180 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 181 .callback = set_bios_reboot, 182 .ident = "Dell OptiPlex 745", 183 .matches = { 184 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 185 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 186 DMI_MATCH(DMI_BOARD_NAME, "0KW626"), 187 }, 188 }, 189 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 190 .callback = set_bios_reboot, 191 .ident = "Dell OptiPlex 330", 192 .matches = { 193 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 194 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 195 DMI_MATCH(DMI_BOARD_NAME, "0KP561"), 196 }, 197 }, 198 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 199 .callback = set_bios_reboot, 200 .ident = "Dell OptiPlex 360", 201 .matches = { 202 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 203 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 204 DMI_MATCH(DMI_BOARD_NAME, "0T656F"), 205 }, 206 }, 207 { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/ 208 .callback = set_bios_reboot, 209 .ident = "Dell OptiPlex 760", 210 .matches = { 211 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 212 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"), 213 DMI_MATCH(DMI_BOARD_NAME, "0G919G"), 214 }, 215 }, 216 { /* Handle problems with rebooting on Dell 2400's */ 217 .callback = set_bios_reboot, 218 .ident = "Dell PowerEdge 2400", 219 .matches = { 220 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 221 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 222 }, 223 }, 224 { /* Handle problems with rebooting on Dell T5400's */ 225 .callback = set_bios_reboot, 226 .ident = "Dell Precision T5400", 227 .matches = { 228 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 229 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 230 }, 231 }, 232 { /* Handle problems with rebooting on Dell T7400's */ 233 .callback = set_bios_reboot, 234 .ident = "Dell Precision T7400", 235 .matches = { 236 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 237 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"), 238 }, 239 }, 240 { /* Handle problems with rebooting on HP laptops */ 241 .callback = set_bios_reboot, 242 .ident = "HP Compaq Laptop", 243 .matches = { 244 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 245 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 246 }, 247 }, 248 { /* Handle problems with rebooting on Dell XPS710 */ 249 .callback = set_bios_reboot, 250 .ident = "Dell XPS710", 251 .matches = { 252 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 253 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 254 }, 255 }, 256 { /* Handle problems with rebooting on Dell DXP061 */ 257 .callback = set_bios_reboot, 258 .ident = "Dell DXP061", 259 .matches = { 260 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 261 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 262 }, 263 }, 264 { /* Handle problems with rebooting on Sony VGN-Z540N */ 265 .callback = set_bios_reboot, 266 .ident = "Sony VGN-Z540N", 267 .matches = { 268 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 269 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 270 }, 271 }, 272 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 273 .callback = set_bios_reboot, 274 .ident = "CompuLab SBC-FITPC2", 275 .matches = { 276 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 277 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 278 }, 279 }, 280 { /* Handle problems with rebooting on ASUS P4S800 */ 281 .callback = set_bios_reboot, 282 .ident = "ASUS P4S800", 283 .matches = { 284 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 285 DMI_MATCH(DMI_BOARD_NAME, "P4S800"), 286 }, 287 }, 288 { } 289 }; 290 291 static int __init reboot_init(void) 292 { 293 dmi_check_system(reboot_dmi_table); 294 return 0; 295 } 296 core_initcall(reboot_init); 297 298 /* The following code and data reboots the machine by switching to real 299 mode and jumping to the BIOS reset entry point, as if the CPU has 300 really been reset. The previous version asked the keyboard 301 controller to pulse the CPU reset line, which is more thorough, but 302 doesn't work with at least one type of 486 motherboard. It is easy 303 to stop this code working; hence the copious comments. */ 304 static const unsigned long long 305 real_mode_gdt_entries [3] = 306 { 307 0x0000000000000000ULL, /* Null descriptor */ 308 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 309 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 310 }; 311 312 static const struct desc_ptr 313 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 314 real_mode_idt = { 0x3ff, 0 }; 315 316 /* This is 16-bit protected mode code to disable paging and the cache, 317 switch to real mode and jump to the BIOS reset code. 318 319 The instruction that switches to real mode by writing to CR0 must be 320 followed immediately by a far jump instruction, which set CS to a 321 valid value for real mode, and flushes the prefetch queue to avoid 322 running instructions that have already been decoded in protected 323 mode. 324 325 Clears all the flags except ET, especially PG (paging), PE 326 (protected-mode enable) and TS (task switch for coprocessor state 327 save). Flushes the TLB after paging has been disabled. Sets CD and 328 NW, to disable the cache on a 486, and invalidates the cache. This 329 is more like the state of a 486 after reset. I don't know if 330 something else should be done for other chips. 331 332 More could be done here to set up the registers as if a CPU reset had 333 occurred; hopefully real BIOSs don't assume much. */ 334 static const unsigned char real_mode_switch [] = 335 { 336 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 337 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 338 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ 339 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ 340 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ 341 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 342 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 343 0x74, 0x02, /* jz f */ 344 0x0f, 0x09, /* wbinvd */ 345 0x24, 0x10, /* f: andb $0x10,al */ 346 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 347 }; 348 static const unsigned char jump_to_bios [] = 349 { 350 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 351 }; 352 353 /* 354 * Switch to real mode and then execute the code 355 * specified by the code and length parameters. 356 * We assume that length will aways be less that 100! 357 */ 358 void machine_real_restart(const unsigned char *code, int length) 359 { 360 local_irq_disable(); 361 362 /* Write zero to CMOS register number 0x0f, which the BIOS POST 363 routine will recognize as telling it to do a proper reboot. (Well 364 that's what this book in front of me says -- it may only apply to 365 the Phoenix BIOS though, it's not clear). At the same time, 366 disable NMIs by setting the top bit in the CMOS address register, 367 as we're about to do peculiar things to the CPU. I'm not sure if 368 `outb_p' is needed instead of just `outb'. Use it to be on the 369 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) 370 */ 371 spin_lock(&rtc_lock); 372 CMOS_WRITE(0x00, 0x8f); 373 spin_unlock(&rtc_lock); 374 375 /* 376 * Switch back to the initial page table. 377 */ 378 load_cr3(initial_page_table); 379 380 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads 381 this on booting to tell it to "Bypass memory test (also warm 382 boot)". This seems like a fairly standard thing that gets set by 383 REBOOT.COM programs, and the previous reset routine did this 384 too. */ 385 *((unsigned short *)0x472) = reboot_mode; 386 387 /* For the switch to real mode, copy some code to low memory. It has 388 to be in the first 64k because it is running in 16-bit mode, and it 389 has to have the same physical and virtual address, because it turns 390 off paging. Copy it near the end of the first page, out of the way 391 of BIOS variables. */ 392 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), 393 real_mode_switch, sizeof (real_mode_switch)); 394 memcpy((void *)(0x1000 - 100), code, length); 395 396 /* Set up the IDT for real mode. */ 397 load_idt(&real_mode_idt); 398 399 /* Set up a GDT from which we can load segment descriptors for real 400 mode. The GDT is not used in real mode; it is just needed here to 401 prepare the descriptors. */ 402 load_gdt(&real_mode_gdt); 403 404 /* Load the data segment registers, and thus the descriptors ready for 405 real mode. The base address of each segment is 0x100, 16 times the 406 selector value being loaded here. This is so that the segment 407 registers don't have to be reloaded after switching to real mode: 408 the values are consistent for real mode operation already. */ 409 __asm__ __volatile__ ("movl $0x0010,%%eax\n" 410 "\tmovl %%eax,%%ds\n" 411 "\tmovl %%eax,%%es\n" 412 "\tmovl %%eax,%%fs\n" 413 "\tmovl %%eax,%%gs\n" 414 "\tmovl %%eax,%%ss" : : : "eax"); 415 416 /* Jump to the 16-bit code that we copied earlier. It disables paging 417 and the cache, switches to real mode, and jumps to the BIOS reset 418 entry point. */ 419 __asm__ __volatile__ ("ljmp $0x0008,%0" 420 : 421 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); 422 } 423 #ifdef CONFIG_APM_MODULE 424 EXPORT_SYMBOL(machine_real_restart); 425 #endif 426 427 #endif /* CONFIG_X86_32 */ 428 429 /* 430 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot 431 */ 432 static int __init set_pci_reboot(const struct dmi_system_id *d) 433 { 434 if (reboot_type != BOOT_CF9) { 435 reboot_type = BOOT_CF9; 436 printk(KERN_INFO "%s series board detected. " 437 "Selecting PCI-method for reboots.\n", d->ident); 438 } 439 return 0; 440 } 441 442 static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { 443 { /* Handle problems with rebooting on Apple MacBook5 */ 444 .callback = set_pci_reboot, 445 .ident = "Apple MacBook5", 446 .matches = { 447 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 448 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 449 }, 450 }, 451 { /* Handle problems with rebooting on Apple MacBookPro5 */ 452 .callback = set_pci_reboot, 453 .ident = "Apple MacBookPro5", 454 .matches = { 455 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 456 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 457 }, 458 }, 459 { /* Handle problems with rebooting on Apple Macmini3,1 */ 460 .callback = set_pci_reboot, 461 .ident = "Apple Macmini3,1", 462 .matches = { 463 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 464 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), 465 }, 466 }, 467 { /* Handle problems with rebooting on the iMac9,1. */ 468 .callback = set_pci_reboot, 469 .ident = "Apple iMac9,1", 470 .matches = { 471 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 472 DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), 473 }, 474 }, 475 { } 476 }; 477 478 static int __init pci_reboot_init(void) 479 { 480 dmi_check_system(pci_reboot_dmi_table); 481 return 0; 482 } 483 core_initcall(pci_reboot_init); 484 485 static inline void kb_wait(void) 486 { 487 int i; 488 489 for (i = 0; i < 0x10000; i++) { 490 if ((inb(0x64) & 0x02) == 0) 491 break; 492 udelay(2); 493 } 494 } 495 496 static void vmxoff_nmi(int cpu, struct die_args *args) 497 { 498 cpu_emergency_vmxoff(); 499 } 500 501 /* Use NMIs as IPIs to tell all CPUs to disable virtualization 502 */ 503 static void emergency_vmx_disable_all(void) 504 { 505 /* Just make sure we won't change CPUs while doing this */ 506 local_irq_disable(); 507 508 /* We need to disable VMX on all CPUs before rebooting, otherwise 509 * we risk hanging up the machine, because the CPU ignore INIT 510 * signals when VMX is enabled. 511 * 512 * We can't take any locks and we may be on an inconsistent 513 * state, so we use NMIs as IPIs to tell the other CPUs to disable 514 * VMX and halt. 515 * 516 * For safety, we will avoid running the nmi_shootdown_cpus() 517 * stuff unnecessarily, but we don't have a way to check 518 * if other CPUs have VMX enabled. So we will call it only if the 519 * CPU we are running on has VMX enabled. 520 * 521 * We will miss cases where VMX is not enabled on all CPUs. This 522 * shouldn't do much harm because KVM always enable VMX on all 523 * CPUs anyway. But we can miss it on the small window where KVM 524 * is still enabling VMX. 525 */ 526 if (cpu_has_vmx() && cpu_vmx_enabled()) { 527 /* Disable VMX on this CPU. 528 */ 529 cpu_vmxoff(); 530 531 /* Halt and disable VMX on the other CPUs */ 532 nmi_shootdown_cpus(vmxoff_nmi); 533 534 } 535 } 536 537 538 void __attribute__((weak)) mach_reboot_fixups(void) 539 { 540 } 541 542 static void native_machine_emergency_restart(void) 543 { 544 int i; 545 546 if (reboot_emergency) 547 emergency_vmx_disable_all(); 548 549 tboot_shutdown(TB_SHUTDOWN_REBOOT); 550 551 /* Tell the BIOS if we want cold or warm reboot */ 552 *((unsigned short *)__va(0x472)) = reboot_mode; 553 554 for (;;) { 555 /* Could also try the reset bit in the Hammer NB */ 556 switch (reboot_type) { 557 case BOOT_KBD: 558 mach_reboot_fixups(); /* for board specific fixups */ 559 560 for (i = 0; i < 10; i++) { 561 kb_wait(); 562 udelay(50); 563 outb(0xfe, 0x64); /* pulse reset low */ 564 udelay(50); 565 } 566 567 case BOOT_TRIPLE: 568 load_idt(&no_idt); 569 __asm__ __volatile__("int3"); 570 571 reboot_type = BOOT_KBD; 572 break; 573 574 #ifdef CONFIG_X86_32 575 case BOOT_BIOS: 576 machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); 577 578 reboot_type = BOOT_KBD; 579 break; 580 #endif 581 582 case BOOT_ACPI: 583 acpi_reboot(); 584 reboot_type = BOOT_KBD; 585 break; 586 587 case BOOT_EFI: 588 if (efi_enabled) 589 efi.reset_system(reboot_mode ? 590 EFI_RESET_WARM : 591 EFI_RESET_COLD, 592 EFI_SUCCESS, 0, NULL); 593 reboot_type = BOOT_KBD; 594 break; 595 596 case BOOT_CF9: 597 port_cf9_safe = true; 598 /* fall through */ 599 600 case BOOT_CF9_COND: 601 if (port_cf9_safe) { 602 u8 cf9 = inb(0xcf9) & ~6; 603 outb(cf9|2, 0xcf9); /* Request hard reset */ 604 udelay(50); 605 outb(cf9|6, 0xcf9); /* Actually do the reset */ 606 udelay(50); 607 } 608 reboot_type = BOOT_KBD; 609 break; 610 } 611 } 612 } 613 614 void native_machine_shutdown(void) 615 { 616 /* Stop the cpus and apics */ 617 #ifdef CONFIG_SMP 618 619 /* The boot cpu is always logical cpu 0 */ 620 int reboot_cpu_id = 0; 621 622 #ifdef CONFIG_X86_32 623 /* See if there has been given a command line override */ 624 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && 625 cpu_online(reboot_cpu)) 626 reboot_cpu_id = reboot_cpu; 627 #endif 628 629 /* Make certain the cpu I'm about to reboot on is online */ 630 if (!cpu_online(reboot_cpu_id)) 631 reboot_cpu_id = smp_processor_id(); 632 633 /* Make certain I only run on the appropriate processor */ 634 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 635 636 /* O.K Now that I'm on the appropriate processor, 637 * stop all of the others. 638 */ 639 stop_other_cpus(); 640 #endif 641 642 lapic_shutdown(); 643 644 #ifdef CONFIG_X86_IO_APIC 645 disable_IO_APIC(); 646 #endif 647 648 #ifdef CONFIG_HPET_TIMER 649 hpet_disable(); 650 #endif 651 652 #ifdef CONFIG_X86_64 653 x86_platform.iommu_shutdown(); 654 #endif 655 } 656 657 static void __machine_emergency_restart(int emergency) 658 { 659 reboot_emergency = emergency; 660 machine_ops.emergency_restart(); 661 } 662 663 static void native_machine_restart(char *__unused) 664 { 665 printk("machine restart\n"); 666 667 if (!reboot_force) 668 machine_shutdown(); 669 __machine_emergency_restart(0); 670 } 671 672 static void native_machine_halt(void) 673 { 674 /* stop other cpus and apics */ 675 machine_shutdown(); 676 677 tboot_shutdown(TB_SHUTDOWN_HALT); 678 679 /* stop this cpu */ 680 stop_this_cpu(NULL); 681 } 682 683 static void native_machine_power_off(void) 684 { 685 if (pm_power_off) { 686 if (!reboot_force) 687 machine_shutdown(); 688 pm_power_off(); 689 } 690 /* a fallback in case there is no PM info available */ 691 tboot_shutdown(TB_SHUTDOWN_HALT); 692 } 693 694 struct machine_ops machine_ops = { 695 .power_off = native_machine_power_off, 696 .shutdown = native_machine_shutdown, 697 .emergency_restart = native_machine_emergency_restart, 698 .restart = native_machine_restart, 699 .halt = native_machine_halt, 700 #ifdef CONFIG_KEXEC 701 .crash_shutdown = native_machine_crash_shutdown, 702 #endif 703 }; 704 705 void machine_power_off(void) 706 { 707 machine_ops.power_off(); 708 } 709 710 void machine_shutdown(void) 711 { 712 machine_ops.shutdown(); 713 } 714 715 void machine_emergency_restart(void) 716 { 717 __machine_emergency_restart(1); 718 } 719 720 void machine_restart(char *cmd) 721 { 722 machine_ops.restart(cmd); 723 } 724 725 void machine_halt(void) 726 { 727 machine_ops.halt(); 728 } 729 730 #ifdef CONFIG_KEXEC 731 void machine_crash_shutdown(struct pt_regs *regs) 732 { 733 machine_ops.crash_shutdown(regs); 734 } 735 #endif 736 737 738 #if defined(CONFIG_SMP) 739 740 /* This keeps a track of which one is crashing cpu. */ 741 static int crashing_cpu; 742 static nmi_shootdown_cb shootdown_callback; 743 744 static atomic_t waiting_for_crash_ipi; 745 746 static int crash_nmi_callback(struct notifier_block *self, 747 unsigned long val, void *data) 748 { 749 int cpu; 750 751 if (val != DIE_NMI) 752 return NOTIFY_OK; 753 754 cpu = raw_smp_processor_id(); 755 756 /* Don't do anything if this handler is invoked on crashing cpu. 757 * Otherwise, system will completely hang. Crashing cpu can get 758 * an NMI if system was initially booted with nmi_watchdog parameter. 759 */ 760 if (cpu == crashing_cpu) 761 return NOTIFY_STOP; 762 local_irq_disable(); 763 764 shootdown_callback(cpu, (struct die_args *)data); 765 766 atomic_dec(&waiting_for_crash_ipi); 767 /* Assume hlt works */ 768 halt(); 769 for (;;) 770 cpu_relax(); 771 772 return 1; 773 } 774 775 static void smp_send_nmi_allbutself(void) 776 { 777 apic->send_IPI_allbutself(NMI_VECTOR); 778 } 779 780 static struct notifier_block crash_nmi_nb = { 781 .notifier_call = crash_nmi_callback, 782 /* we want to be the first one called */ 783 .priority = NMI_LOCAL_HIGH_PRIOR+1, 784 }; 785 786 /* Halt all other CPUs, calling the specified function on each of them 787 * 788 * This function can be used to halt all other CPUs on crash 789 * or emergency reboot time. The function passed as parameter 790 * will be called inside a NMI handler on all CPUs. 791 */ 792 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 793 { 794 unsigned long msecs; 795 local_irq_disable(); 796 797 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 798 crashing_cpu = safe_smp_processor_id(); 799 800 shootdown_callback = callback; 801 802 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); 803 /* Would it be better to replace the trap vector here? */ 804 if (register_die_notifier(&crash_nmi_nb)) 805 return; /* return what? */ 806 /* Ensure the new callback function is set before sending 807 * out the NMI 808 */ 809 wmb(); 810 811 smp_send_nmi_allbutself(); 812 813 msecs = 1000; /* Wait at most a second for the other cpus to stop */ 814 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { 815 mdelay(1); 816 msecs--; 817 } 818 819 /* Leave the nmi callback set */ 820 } 821 #else /* !CONFIG_SMP */ 822 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 823 { 824 /* No other CPUs to shoot down */ 825 } 826 #endif 827