1 #include <linux/module.h> 2 #include <linux/reboot.h> 3 #include <linux/init.h> 4 #include <linux/pm.h> 5 #include <linux/efi.h> 6 #include <linux/dmi.h> 7 #include <linux/sched.h> 8 #include <linux/tboot.h> 9 #include <acpi/reboot.h> 10 #include <asm/io.h> 11 #include <asm/apic.h> 12 #include <asm/desc.h> 13 #include <asm/hpet.h> 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/reboot_fixups.h> 17 #include <asm/reboot.h> 18 #include <asm/pci_x86.h> 19 #include <asm/virtext.h> 20 #include <asm/cpu.h> 21 22 #ifdef CONFIG_X86_32 23 # include <linux/ctype.h> 24 # include <linux/mc146818rtc.h> 25 #else 26 # include <asm/x86_init.h> 27 #endif 28 29 /* 30 * Power off function, if any 31 */ 32 void (*pm_power_off)(void); 33 EXPORT_SYMBOL(pm_power_off); 34 35 static const struct desc_ptr no_idt = {}; 36 static int reboot_mode; 37 enum reboot_type reboot_type = BOOT_KBD; 38 int reboot_force; 39 40 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 41 static int reboot_cpu = -1; 42 #endif 43 44 /* This is set if we need to go through the 'emergency' path. 45 * When machine_emergency_restart() is called, we may be on 46 * an inconsistent state and won't be able to do a clean cleanup 47 */ 48 static int reboot_emergency; 49 50 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ 51 bool port_cf9_safe = false; 52 53 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] 54 warm Don't set the cold reboot flag 55 cold Set the cold reboot flag 56 bios Reboot by jumping through the BIOS (only for X86_32) 57 smp Reboot by executing reset on BSP or other CPU (only for X86_32) 58 triple Force a triple fault (init) 59 kbd Use the keyboard controller. cold reset (default) 60 acpi Use the RESET_REG in the FADT 61 efi Use efi reset_system runtime service 62 pci Use the so-called "PCI reset register", CF9 63 force Avoid anything that could hang. 64 */ 65 static int __init reboot_setup(char *str) 66 { 67 for (;;) { 68 switch (*str) { 69 case 'w': 70 reboot_mode = 0x1234; 71 break; 72 73 case 'c': 74 reboot_mode = 0; 75 break; 76 77 #ifdef CONFIG_X86_32 78 #ifdef CONFIG_SMP 79 case 's': 80 if (isdigit(*(str+1))) { 81 reboot_cpu = (int) (*(str+1) - '0'); 82 if (isdigit(*(str+2))) 83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); 84 } 85 /* we will leave sorting out the final value 86 when we are ready to reboot, since we might not 87 have detected BSP APIC ID or smp_num_cpu */ 88 break; 89 #endif /* CONFIG_SMP */ 90 91 case 'b': 92 #endif 93 case 'a': 94 case 'k': 95 case 't': 96 case 'e': 97 case 'p': 98 reboot_type = *str; 99 break; 100 101 case 'f': 102 reboot_force = 1; 103 break; 104 } 105 106 str = strchr(str, ','); 107 if (str) 108 str++; 109 else 110 break; 111 } 112 return 1; 113 } 114 115 __setup("reboot=", reboot_setup); 116 117 118 #ifdef CONFIG_X86_32 119 /* 120 * Reboot options and system auto-detection code provided by 121 * Dell Inc. so their systems "just work". :-) 122 */ 123 124 /* 125 * Some machines require the "reboot=b" commandline option, 126 * this quirk makes that automatic. 127 */ 128 static int __init set_bios_reboot(const struct dmi_system_id *d) 129 { 130 if (reboot_type != BOOT_BIOS) { 131 reboot_type = BOOT_BIOS; 132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); 133 } 134 return 0; 135 } 136 137 static struct dmi_system_id __initdata reboot_dmi_table[] = { 138 { /* Handle problems with rebooting on Dell E520's */ 139 .callback = set_bios_reboot, 140 .ident = "Dell E520", 141 .matches = { 142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 144 }, 145 }, 146 { /* Handle problems with rebooting on Dell 1300's */ 147 .callback = set_bios_reboot, 148 .ident = "Dell PowerEdge 1300", 149 .matches = { 150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 152 }, 153 }, 154 { /* Handle problems with rebooting on Dell 300's */ 155 .callback = set_bios_reboot, 156 .ident = "Dell PowerEdge 300", 157 .matches = { 158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 160 }, 161 }, 162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ 163 .callback = set_bios_reboot, 164 .ident = "Dell OptiPlex 745", 165 .matches = { 166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 168 }, 169 }, 170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ 171 .callback = set_bios_reboot, 172 .ident = "Dell OptiPlex 745", 173 .matches = { 174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"), 177 }, 178 }, 179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 180 .callback = set_bios_reboot, 181 .ident = "Dell OptiPlex 745", 182 .matches = { 183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"), 186 }, 187 }, 188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 189 .callback = set_bios_reboot, 190 .ident = "Dell OptiPlex 330", 191 .matches = { 192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"), 195 }, 196 }, 197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 198 .callback = set_bios_reboot, 199 .ident = "Dell OptiPlex 360", 200 .matches = { 201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"), 204 }, 205 }, 206 { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/ 207 .callback = set_bios_reboot, 208 .ident = "Dell OptiPlex 760", 209 .matches = { 210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 211 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"), 212 DMI_MATCH(DMI_BOARD_NAME, "0G919G"), 213 }, 214 }, 215 { /* Handle problems with rebooting on Dell 2400's */ 216 .callback = set_bios_reboot, 217 .ident = "Dell PowerEdge 2400", 218 .matches = { 219 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 220 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 221 }, 222 }, 223 { /* Handle problems with rebooting on Dell T5400's */ 224 .callback = set_bios_reboot, 225 .ident = "Dell Precision T5400", 226 .matches = { 227 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 228 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 229 }, 230 }, 231 { /* Handle problems with rebooting on Dell T7400's */ 232 .callback = set_bios_reboot, 233 .ident = "Dell Precision T7400", 234 .matches = { 235 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 236 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"), 237 }, 238 }, 239 { /* Handle problems with rebooting on HP laptops */ 240 .callback = set_bios_reboot, 241 .ident = "HP Compaq Laptop", 242 .matches = { 243 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 244 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 245 }, 246 }, 247 { /* Handle problems with rebooting on Dell XPS710 */ 248 .callback = set_bios_reboot, 249 .ident = "Dell XPS710", 250 .matches = { 251 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 252 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 253 }, 254 }, 255 { /* Handle problems with rebooting on Dell DXP061 */ 256 .callback = set_bios_reboot, 257 .ident = "Dell DXP061", 258 .matches = { 259 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 260 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 261 }, 262 }, 263 { /* Handle problems with rebooting on Sony VGN-Z540N */ 264 .callback = set_bios_reboot, 265 .ident = "Sony VGN-Z540N", 266 .matches = { 267 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 268 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 269 }, 270 }, 271 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 272 .callback = set_bios_reboot, 273 .ident = "CompuLab SBC-FITPC2", 274 .matches = { 275 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 276 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 277 }, 278 }, 279 { /* Handle problems with rebooting on ASUS P4S800 */ 280 .callback = set_bios_reboot, 281 .ident = "ASUS P4S800", 282 .matches = { 283 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 284 DMI_MATCH(DMI_BOARD_NAME, "P4S800"), 285 }, 286 }, 287 { } 288 }; 289 290 static int __init reboot_init(void) 291 { 292 dmi_check_system(reboot_dmi_table); 293 return 0; 294 } 295 core_initcall(reboot_init); 296 297 /* The following code and data reboots the machine by switching to real 298 mode and jumping to the BIOS reset entry point, as if the CPU has 299 really been reset. The previous version asked the keyboard 300 controller to pulse the CPU reset line, which is more thorough, but 301 doesn't work with at least one type of 486 motherboard. It is easy 302 to stop this code working; hence the copious comments. */ 303 static const unsigned long long 304 real_mode_gdt_entries [3] = 305 { 306 0x0000000000000000ULL, /* Null descriptor */ 307 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 308 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 309 }; 310 311 static const struct desc_ptr 312 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 313 real_mode_idt = { 0x3ff, 0 }; 314 315 /* This is 16-bit protected mode code to disable paging and the cache, 316 switch to real mode and jump to the BIOS reset code. 317 318 The instruction that switches to real mode by writing to CR0 must be 319 followed immediately by a far jump instruction, which set CS to a 320 valid value for real mode, and flushes the prefetch queue to avoid 321 running instructions that have already been decoded in protected 322 mode. 323 324 Clears all the flags except ET, especially PG (paging), PE 325 (protected-mode enable) and TS (task switch for coprocessor state 326 save). Flushes the TLB after paging has been disabled. Sets CD and 327 NW, to disable the cache on a 486, and invalidates the cache. This 328 is more like the state of a 486 after reset. I don't know if 329 something else should be done for other chips. 330 331 More could be done here to set up the registers as if a CPU reset had 332 occurred; hopefully real BIOSs don't assume much. */ 333 static const unsigned char real_mode_switch [] = 334 { 335 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 336 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 337 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ 338 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ 339 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ 340 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 341 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 342 0x74, 0x02, /* jz f */ 343 0x0f, 0x09, /* wbinvd */ 344 0x24, 0x10, /* f: andb $0x10,al */ 345 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 346 }; 347 static const unsigned char jump_to_bios [] = 348 { 349 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 350 }; 351 352 /* 353 * Switch to real mode and then execute the code 354 * specified by the code and length parameters. 355 * We assume that length will aways be less that 100! 356 */ 357 void machine_real_restart(const unsigned char *code, int length) 358 { 359 local_irq_disable(); 360 361 /* Write zero to CMOS register number 0x0f, which the BIOS POST 362 routine will recognize as telling it to do a proper reboot. (Well 363 that's what this book in front of me says -- it may only apply to 364 the Phoenix BIOS though, it's not clear). At the same time, 365 disable NMIs by setting the top bit in the CMOS address register, 366 as we're about to do peculiar things to the CPU. I'm not sure if 367 `outb_p' is needed instead of just `outb'. Use it to be on the 368 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) 369 */ 370 spin_lock(&rtc_lock); 371 CMOS_WRITE(0x00, 0x8f); 372 spin_unlock(&rtc_lock); 373 374 /* 375 * Switch back to the initial page table. 376 */ 377 load_cr3(initial_page_table); 378 379 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads 380 this on booting to tell it to "Bypass memory test (also warm 381 boot)". This seems like a fairly standard thing that gets set by 382 REBOOT.COM programs, and the previous reset routine did this 383 too. */ 384 *((unsigned short *)0x472) = reboot_mode; 385 386 /* For the switch to real mode, copy some code to low memory. It has 387 to be in the first 64k because it is running in 16-bit mode, and it 388 has to have the same physical and virtual address, because it turns 389 off paging. Copy it near the end of the first page, out of the way 390 of BIOS variables. */ 391 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), 392 real_mode_switch, sizeof (real_mode_switch)); 393 memcpy((void *)(0x1000 - 100), code, length); 394 395 /* Set up the IDT for real mode. */ 396 load_idt(&real_mode_idt); 397 398 /* Set up a GDT from which we can load segment descriptors for real 399 mode. The GDT is not used in real mode; it is just needed here to 400 prepare the descriptors. */ 401 load_gdt(&real_mode_gdt); 402 403 /* Load the data segment registers, and thus the descriptors ready for 404 real mode. The base address of each segment is 0x100, 16 times the 405 selector value being loaded here. This is so that the segment 406 registers don't have to be reloaded after switching to real mode: 407 the values are consistent for real mode operation already. */ 408 __asm__ __volatile__ ("movl $0x0010,%%eax\n" 409 "\tmovl %%eax,%%ds\n" 410 "\tmovl %%eax,%%es\n" 411 "\tmovl %%eax,%%fs\n" 412 "\tmovl %%eax,%%gs\n" 413 "\tmovl %%eax,%%ss" : : : "eax"); 414 415 /* Jump to the 16-bit code that we copied earlier. It disables paging 416 and the cache, switches to real mode, and jumps to the BIOS reset 417 entry point. */ 418 __asm__ __volatile__ ("ljmp $0x0008,%0" 419 : 420 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); 421 } 422 #ifdef CONFIG_APM_MODULE 423 EXPORT_SYMBOL(machine_real_restart); 424 #endif 425 426 #endif /* CONFIG_X86_32 */ 427 428 /* 429 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot 430 */ 431 static int __init set_pci_reboot(const struct dmi_system_id *d) 432 { 433 if (reboot_type != BOOT_CF9) { 434 reboot_type = BOOT_CF9; 435 printk(KERN_INFO "%s series board detected. " 436 "Selecting PCI-method for reboots.\n", d->ident); 437 } 438 return 0; 439 } 440 441 static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { 442 { /* Handle problems with rebooting on Apple MacBook5 */ 443 .callback = set_pci_reboot, 444 .ident = "Apple MacBook5", 445 .matches = { 446 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 447 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 448 }, 449 }, 450 { /* Handle problems with rebooting on Apple MacBookPro5 */ 451 .callback = set_pci_reboot, 452 .ident = "Apple MacBookPro5", 453 .matches = { 454 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 455 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 456 }, 457 }, 458 { /* Handle problems with rebooting on Apple Macmini3,1 */ 459 .callback = set_pci_reboot, 460 .ident = "Apple Macmini3,1", 461 .matches = { 462 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 463 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), 464 }, 465 }, 466 { /* Handle problems with rebooting on the iMac9,1. */ 467 .callback = set_pci_reboot, 468 .ident = "Apple iMac9,1", 469 .matches = { 470 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 471 DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), 472 }, 473 }, 474 { } 475 }; 476 477 static int __init pci_reboot_init(void) 478 { 479 dmi_check_system(pci_reboot_dmi_table); 480 return 0; 481 } 482 core_initcall(pci_reboot_init); 483 484 static inline void kb_wait(void) 485 { 486 int i; 487 488 for (i = 0; i < 0x10000; i++) { 489 if ((inb(0x64) & 0x02) == 0) 490 break; 491 udelay(2); 492 } 493 } 494 495 static void vmxoff_nmi(int cpu, struct die_args *args) 496 { 497 cpu_emergency_vmxoff(); 498 } 499 500 /* Use NMIs as IPIs to tell all CPUs to disable virtualization 501 */ 502 static void emergency_vmx_disable_all(void) 503 { 504 /* Just make sure we won't change CPUs while doing this */ 505 local_irq_disable(); 506 507 /* We need to disable VMX on all CPUs before rebooting, otherwise 508 * we risk hanging up the machine, because the CPU ignore INIT 509 * signals when VMX is enabled. 510 * 511 * We can't take any locks and we may be on an inconsistent 512 * state, so we use NMIs as IPIs to tell the other CPUs to disable 513 * VMX and halt. 514 * 515 * For safety, we will avoid running the nmi_shootdown_cpus() 516 * stuff unnecessarily, but we don't have a way to check 517 * if other CPUs have VMX enabled. So we will call it only if the 518 * CPU we are running on has VMX enabled. 519 * 520 * We will miss cases where VMX is not enabled on all CPUs. This 521 * shouldn't do much harm because KVM always enable VMX on all 522 * CPUs anyway. But we can miss it on the small window where KVM 523 * is still enabling VMX. 524 */ 525 if (cpu_has_vmx() && cpu_vmx_enabled()) { 526 /* Disable VMX on this CPU. 527 */ 528 cpu_vmxoff(); 529 530 /* Halt and disable VMX on the other CPUs */ 531 nmi_shootdown_cpus(vmxoff_nmi); 532 533 } 534 } 535 536 537 void __attribute__((weak)) mach_reboot_fixups(void) 538 { 539 } 540 541 static void native_machine_emergency_restart(void) 542 { 543 int i; 544 545 if (reboot_emergency) 546 emergency_vmx_disable_all(); 547 548 tboot_shutdown(TB_SHUTDOWN_REBOOT); 549 550 /* Tell the BIOS if we want cold or warm reboot */ 551 *((unsigned short *)__va(0x472)) = reboot_mode; 552 553 for (;;) { 554 /* Could also try the reset bit in the Hammer NB */ 555 switch (reboot_type) { 556 case BOOT_KBD: 557 mach_reboot_fixups(); /* for board specific fixups */ 558 559 for (i = 0; i < 10; i++) { 560 kb_wait(); 561 udelay(50); 562 outb(0xfe, 0x64); /* pulse reset low */ 563 udelay(50); 564 } 565 566 case BOOT_TRIPLE: 567 load_idt(&no_idt); 568 __asm__ __volatile__("int3"); 569 570 reboot_type = BOOT_KBD; 571 break; 572 573 #ifdef CONFIG_X86_32 574 case BOOT_BIOS: 575 machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); 576 577 reboot_type = BOOT_KBD; 578 break; 579 #endif 580 581 case BOOT_ACPI: 582 acpi_reboot(); 583 reboot_type = BOOT_KBD; 584 break; 585 586 case BOOT_EFI: 587 if (efi_enabled) 588 efi.reset_system(reboot_mode ? 589 EFI_RESET_WARM : 590 EFI_RESET_COLD, 591 EFI_SUCCESS, 0, NULL); 592 reboot_type = BOOT_KBD; 593 break; 594 595 case BOOT_CF9: 596 port_cf9_safe = true; 597 /* fall through */ 598 599 case BOOT_CF9_COND: 600 if (port_cf9_safe) { 601 u8 cf9 = inb(0xcf9) & ~6; 602 outb(cf9|2, 0xcf9); /* Request hard reset */ 603 udelay(50); 604 outb(cf9|6, 0xcf9); /* Actually do the reset */ 605 udelay(50); 606 } 607 reboot_type = BOOT_KBD; 608 break; 609 } 610 } 611 } 612 613 void native_machine_shutdown(void) 614 { 615 /* Stop the cpus and apics */ 616 #ifdef CONFIG_SMP 617 618 /* The boot cpu is always logical cpu 0 */ 619 int reboot_cpu_id = 0; 620 621 #ifdef CONFIG_X86_32 622 /* See if there has been given a command line override */ 623 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && 624 cpu_online(reboot_cpu)) 625 reboot_cpu_id = reboot_cpu; 626 #endif 627 628 /* Make certain the cpu I'm about to reboot on is online */ 629 if (!cpu_online(reboot_cpu_id)) 630 reboot_cpu_id = smp_processor_id(); 631 632 /* Make certain I only run on the appropriate processor */ 633 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 634 635 /* O.K Now that I'm on the appropriate processor, 636 * stop all of the others. 637 */ 638 smp_send_stop(); 639 #endif 640 641 lapic_shutdown(); 642 643 #ifdef CONFIG_X86_IO_APIC 644 disable_IO_APIC(); 645 #endif 646 647 #ifdef CONFIG_HPET_TIMER 648 hpet_disable(); 649 #endif 650 651 #ifdef CONFIG_X86_64 652 x86_platform.iommu_shutdown(); 653 #endif 654 } 655 656 static void __machine_emergency_restart(int emergency) 657 { 658 reboot_emergency = emergency; 659 machine_ops.emergency_restart(); 660 } 661 662 static void native_machine_restart(char *__unused) 663 { 664 printk("machine restart\n"); 665 666 if (!reboot_force) 667 machine_shutdown(); 668 __machine_emergency_restart(0); 669 } 670 671 static void native_machine_halt(void) 672 { 673 /* stop other cpus and apics */ 674 machine_shutdown(); 675 676 tboot_shutdown(TB_SHUTDOWN_HALT); 677 678 /* stop this cpu */ 679 stop_this_cpu(NULL); 680 } 681 682 static void native_machine_power_off(void) 683 { 684 if (pm_power_off) { 685 if (!reboot_force) 686 machine_shutdown(); 687 pm_power_off(); 688 } 689 /* a fallback in case there is no PM info available */ 690 tboot_shutdown(TB_SHUTDOWN_HALT); 691 } 692 693 struct machine_ops machine_ops = { 694 .power_off = native_machine_power_off, 695 .shutdown = native_machine_shutdown, 696 .emergency_restart = native_machine_emergency_restart, 697 .restart = native_machine_restart, 698 .halt = native_machine_halt, 699 #ifdef CONFIG_KEXEC 700 .crash_shutdown = native_machine_crash_shutdown, 701 #endif 702 }; 703 704 void machine_power_off(void) 705 { 706 machine_ops.power_off(); 707 } 708 709 void machine_shutdown(void) 710 { 711 machine_ops.shutdown(); 712 } 713 714 void machine_emergency_restart(void) 715 { 716 __machine_emergency_restart(1); 717 } 718 719 void machine_restart(char *cmd) 720 { 721 machine_ops.restart(cmd); 722 } 723 724 void machine_halt(void) 725 { 726 machine_ops.halt(); 727 } 728 729 #ifdef CONFIG_KEXEC 730 void machine_crash_shutdown(struct pt_regs *regs) 731 { 732 machine_ops.crash_shutdown(regs); 733 } 734 #endif 735 736 737 #if defined(CONFIG_SMP) 738 739 /* This keeps a track of which one is crashing cpu. */ 740 static int crashing_cpu; 741 static nmi_shootdown_cb shootdown_callback; 742 743 static atomic_t waiting_for_crash_ipi; 744 745 static int crash_nmi_callback(struct notifier_block *self, 746 unsigned long val, void *data) 747 { 748 int cpu; 749 750 if (val != DIE_NMI_IPI) 751 return NOTIFY_OK; 752 753 cpu = raw_smp_processor_id(); 754 755 /* Don't do anything if this handler is invoked on crashing cpu. 756 * Otherwise, system will completely hang. Crashing cpu can get 757 * an NMI if system was initially booted with nmi_watchdog parameter. 758 */ 759 if (cpu == crashing_cpu) 760 return NOTIFY_STOP; 761 local_irq_disable(); 762 763 shootdown_callback(cpu, (struct die_args *)data); 764 765 atomic_dec(&waiting_for_crash_ipi); 766 /* Assume hlt works */ 767 halt(); 768 for (;;) 769 cpu_relax(); 770 771 return 1; 772 } 773 774 static void smp_send_nmi_allbutself(void) 775 { 776 apic->send_IPI_allbutself(NMI_VECTOR); 777 } 778 779 static struct notifier_block crash_nmi_nb = { 780 .notifier_call = crash_nmi_callback, 781 }; 782 783 /* Halt all other CPUs, calling the specified function on each of them 784 * 785 * This function can be used to halt all other CPUs on crash 786 * or emergency reboot time. The function passed as parameter 787 * will be called inside a NMI handler on all CPUs. 788 */ 789 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 790 { 791 unsigned long msecs; 792 local_irq_disable(); 793 794 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 795 crashing_cpu = safe_smp_processor_id(); 796 797 shootdown_callback = callback; 798 799 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); 800 /* Would it be better to replace the trap vector here? */ 801 if (register_die_notifier(&crash_nmi_nb)) 802 return; /* return what? */ 803 /* Ensure the new callback function is set before sending 804 * out the NMI 805 */ 806 wmb(); 807 808 smp_send_nmi_allbutself(); 809 810 msecs = 1000; /* Wait at most a second for the other cpus to stop */ 811 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { 812 mdelay(1); 813 msecs--; 814 } 815 816 /* Leave the nmi callback set */ 817 } 818 #else /* !CONFIG_SMP */ 819 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 820 { 821 /* No other CPUs to shoot down */ 822 } 823 #endif 824