1 #include <linux/module.h> 2 #include <linux/reboot.h> 3 #include <linux/init.h> 4 #include <linux/pm.h> 5 #include <linux/efi.h> 6 #include <linux/dmi.h> 7 #include <linux/sched.h> 8 #include <linux/tboot.h> 9 #include <acpi/reboot.h> 10 #include <asm/io.h> 11 #include <asm/apic.h> 12 #include <asm/desc.h> 13 #include <asm/hpet.h> 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/reboot_fixups.h> 17 #include <asm/reboot.h> 18 #include <asm/pci_x86.h> 19 #include <asm/virtext.h> 20 #include <asm/cpu.h> 21 22 #ifdef CONFIG_X86_32 23 # include <linux/ctype.h> 24 # include <linux/mc146818rtc.h> 25 #else 26 # include <asm/iommu.h> 27 #endif 28 29 /* 30 * Power off function, if any 31 */ 32 void (*pm_power_off)(void); 33 EXPORT_SYMBOL(pm_power_off); 34 35 static const struct desc_ptr no_idt = {}; 36 static int reboot_mode; 37 enum reboot_type reboot_type = BOOT_KBD; 38 int reboot_force; 39 40 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 41 static int reboot_cpu = -1; 42 #endif 43 44 /* This is set if we need to go through the 'emergency' path. 45 * When machine_emergency_restart() is called, we may be on 46 * an inconsistent state and won't be able to do a clean cleanup 47 */ 48 static int reboot_emergency; 49 50 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ 51 bool port_cf9_safe = false; 52 53 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] 54 warm Don't set the cold reboot flag 55 cold Set the cold reboot flag 56 bios Reboot by jumping through the BIOS (only for X86_32) 57 smp Reboot by executing reset on BSP or other CPU (only for X86_32) 58 triple Force a triple fault (init) 59 kbd Use the keyboard controller. cold reset (default) 60 acpi Use the RESET_REG in the FADT 61 efi Use efi reset_system runtime service 62 pci Use the so-called "PCI reset register", CF9 63 force Avoid anything that could hang. 64 */ 65 static int __init reboot_setup(char *str) 66 { 67 for (;;) { 68 switch (*str) { 69 case 'w': 70 reboot_mode = 0x1234; 71 break; 72 73 case 'c': 74 reboot_mode = 0; 75 break; 76 77 #ifdef CONFIG_X86_32 78 #ifdef CONFIG_SMP 79 case 's': 80 if (isdigit(*(str+1))) { 81 reboot_cpu = (int) (*(str+1) - '0'); 82 if (isdigit(*(str+2))) 83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); 84 } 85 /* we will leave sorting out the final value 86 when we are ready to reboot, since we might not 87 have set up boot_cpu_id or smp_num_cpu */ 88 break; 89 #endif /* CONFIG_SMP */ 90 91 case 'b': 92 #endif 93 case 'a': 94 case 'k': 95 case 't': 96 case 'e': 97 case 'p': 98 reboot_type = *str; 99 break; 100 101 case 'f': 102 reboot_force = 1; 103 break; 104 } 105 106 str = strchr(str, ','); 107 if (str) 108 str++; 109 else 110 break; 111 } 112 return 1; 113 } 114 115 __setup("reboot=", reboot_setup); 116 117 118 #ifdef CONFIG_X86_32 119 /* 120 * Reboot options and system auto-detection code provided by 121 * Dell Inc. so their systems "just work". :-) 122 */ 123 124 /* 125 * Some machines require the "reboot=b" commandline option, 126 * this quirk makes that automatic. 127 */ 128 static int __init set_bios_reboot(const struct dmi_system_id *d) 129 { 130 if (reboot_type != BOOT_BIOS) { 131 reboot_type = BOOT_BIOS; 132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); 133 } 134 return 0; 135 } 136 137 static struct dmi_system_id __initdata reboot_dmi_table[] = { 138 { /* Handle problems with rebooting on Dell E520's */ 139 .callback = set_bios_reboot, 140 .ident = "Dell E520", 141 .matches = { 142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 144 }, 145 }, 146 { /* Handle problems with rebooting on Dell 1300's */ 147 .callback = set_bios_reboot, 148 .ident = "Dell PowerEdge 1300", 149 .matches = { 150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 152 }, 153 }, 154 { /* Handle problems with rebooting on Dell 300's */ 155 .callback = set_bios_reboot, 156 .ident = "Dell PowerEdge 300", 157 .matches = { 158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 160 }, 161 }, 162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ 163 .callback = set_bios_reboot, 164 .ident = "Dell OptiPlex 745", 165 .matches = { 166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 168 }, 169 }, 170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ 171 .callback = set_bios_reboot, 172 .ident = "Dell OptiPlex 745", 173 .matches = { 174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"), 177 }, 178 }, 179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 180 .callback = set_bios_reboot, 181 .ident = "Dell OptiPlex 745", 182 .matches = { 183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"), 186 }, 187 }, 188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 189 .callback = set_bios_reboot, 190 .ident = "Dell OptiPlex 330", 191 .matches = { 192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"), 195 }, 196 }, 197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 198 .callback = set_bios_reboot, 199 .ident = "Dell OptiPlex 360", 200 .matches = { 201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"), 204 }, 205 }, 206 { /* Handle problems with rebooting on Dell 2400's */ 207 .callback = set_bios_reboot, 208 .ident = "Dell PowerEdge 2400", 209 .matches = { 210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 211 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 212 }, 213 }, 214 { /* Handle problems with rebooting on Dell T5400's */ 215 .callback = set_bios_reboot, 216 .ident = "Dell Precision T5400", 217 .matches = { 218 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 219 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 220 }, 221 }, 222 { /* Handle problems with rebooting on HP laptops */ 223 .callback = set_bios_reboot, 224 .ident = "HP Compaq Laptop", 225 .matches = { 226 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 227 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 228 }, 229 }, 230 { /* Handle problems with rebooting on Dell XPS710 */ 231 .callback = set_bios_reboot, 232 .ident = "Dell XPS710", 233 .matches = { 234 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 235 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 236 }, 237 }, 238 { /* Handle problems with rebooting on Dell DXP061 */ 239 .callback = set_bios_reboot, 240 .ident = "Dell DXP061", 241 .matches = { 242 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 243 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 244 }, 245 }, 246 { /* Handle problems with rebooting on Sony VGN-Z540N */ 247 .callback = set_bios_reboot, 248 .ident = "Sony VGN-Z540N", 249 .matches = { 250 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 251 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 252 }, 253 }, 254 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 255 .callback = set_bios_reboot, 256 .ident = "CompuLab SBC-FITPC2", 257 .matches = { 258 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 259 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 260 }, 261 }, 262 { } 263 }; 264 265 static int __init reboot_init(void) 266 { 267 dmi_check_system(reboot_dmi_table); 268 return 0; 269 } 270 core_initcall(reboot_init); 271 272 /* The following code and data reboots the machine by switching to real 273 mode and jumping to the BIOS reset entry point, as if the CPU has 274 really been reset. The previous version asked the keyboard 275 controller to pulse the CPU reset line, which is more thorough, but 276 doesn't work with at least one type of 486 motherboard. It is easy 277 to stop this code working; hence the copious comments. */ 278 static const unsigned long long 279 real_mode_gdt_entries [3] = 280 { 281 0x0000000000000000ULL, /* Null descriptor */ 282 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 283 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 284 }; 285 286 static const struct desc_ptr 287 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 288 real_mode_idt = { 0x3ff, 0 }; 289 290 /* This is 16-bit protected mode code to disable paging and the cache, 291 switch to real mode and jump to the BIOS reset code. 292 293 The instruction that switches to real mode by writing to CR0 must be 294 followed immediately by a far jump instruction, which set CS to a 295 valid value for real mode, and flushes the prefetch queue to avoid 296 running instructions that have already been decoded in protected 297 mode. 298 299 Clears all the flags except ET, especially PG (paging), PE 300 (protected-mode enable) and TS (task switch for coprocessor state 301 save). Flushes the TLB after paging has been disabled. Sets CD and 302 NW, to disable the cache on a 486, and invalidates the cache. This 303 is more like the state of a 486 after reset. I don't know if 304 something else should be done for other chips. 305 306 More could be done here to set up the registers as if a CPU reset had 307 occurred; hopefully real BIOSs don't assume much. */ 308 static const unsigned char real_mode_switch [] = 309 { 310 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 311 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 312 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ 313 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ 314 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ 315 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 316 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 317 0x74, 0x02, /* jz f */ 318 0x0f, 0x09, /* wbinvd */ 319 0x24, 0x10, /* f: andb $0x10,al */ 320 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 321 }; 322 static const unsigned char jump_to_bios [] = 323 { 324 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 325 }; 326 327 /* 328 * Switch to real mode and then execute the code 329 * specified by the code and length parameters. 330 * We assume that length will aways be less that 100! 331 */ 332 void machine_real_restart(const unsigned char *code, int length) 333 { 334 local_irq_disable(); 335 336 /* Write zero to CMOS register number 0x0f, which the BIOS POST 337 routine will recognize as telling it to do a proper reboot. (Well 338 that's what this book in front of me says -- it may only apply to 339 the Phoenix BIOS though, it's not clear). At the same time, 340 disable NMIs by setting the top bit in the CMOS address register, 341 as we're about to do peculiar things to the CPU. I'm not sure if 342 `outb_p' is needed instead of just `outb'. Use it to be on the 343 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) 344 */ 345 spin_lock(&rtc_lock); 346 CMOS_WRITE(0x00, 0x8f); 347 spin_unlock(&rtc_lock); 348 349 /* Remap the kernel at virtual address zero, as well as offset zero 350 from the kernel segment. This assumes the kernel segment starts at 351 virtual address PAGE_OFFSET. */ 352 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 353 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); 354 355 /* 356 * Use `swapper_pg_dir' as our page directory. 357 */ 358 load_cr3(swapper_pg_dir); 359 360 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads 361 this on booting to tell it to "Bypass memory test (also warm 362 boot)". This seems like a fairly standard thing that gets set by 363 REBOOT.COM programs, and the previous reset routine did this 364 too. */ 365 *((unsigned short *)0x472) = reboot_mode; 366 367 /* For the switch to real mode, copy some code to low memory. It has 368 to be in the first 64k because it is running in 16-bit mode, and it 369 has to have the same physical and virtual address, because it turns 370 off paging. Copy it near the end of the first page, out of the way 371 of BIOS variables. */ 372 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), 373 real_mode_switch, sizeof (real_mode_switch)); 374 memcpy((void *)(0x1000 - 100), code, length); 375 376 /* Set up the IDT for real mode. */ 377 load_idt(&real_mode_idt); 378 379 /* Set up a GDT from which we can load segment descriptors for real 380 mode. The GDT is not used in real mode; it is just needed here to 381 prepare the descriptors. */ 382 load_gdt(&real_mode_gdt); 383 384 /* Load the data segment registers, and thus the descriptors ready for 385 real mode. The base address of each segment is 0x100, 16 times the 386 selector value being loaded here. This is so that the segment 387 registers don't have to be reloaded after switching to real mode: 388 the values are consistent for real mode operation already. */ 389 __asm__ __volatile__ ("movl $0x0010,%%eax\n" 390 "\tmovl %%eax,%%ds\n" 391 "\tmovl %%eax,%%es\n" 392 "\tmovl %%eax,%%fs\n" 393 "\tmovl %%eax,%%gs\n" 394 "\tmovl %%eax,%%ss" : : : "eax"); 395 396 /* Jump to the 16-bit code that we copied earlier. It disables paging 397 and the cache, switches to real mode, and jumps to the BIOS reset 398 entry point. */ 399 __asm__ __volatile__ ("ljmp $0x0008,%0" 400 : 401 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); 402 } 403 #ifdef CONFIG_APM_MODULE 404 EXPORT_SYMBOL(machine_real_restart); 405 #endif 406 407 #endif /* CONFIG_X86_32 */ 408 409 /* 410 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot 411 */ 412 static int __init set_pci_reboot(const struct dmi_system_id *d) 413 { 414 if (reboot_type != BOOT_CF9) { 415 reboot_type = BOOT_CF9; 416 printk(KERN_INFO "%s series board detected. " 417 "Selecting PCI-method for reboots.\n", d->ident); 418 } 419 return 0; 420 } 421 422 static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { 423 { /* Handle problems with rebooting on Apple MacBook5 */ 424 .callback = set_pci_reboot, 425 .ident = "Apple MacBook5", 426 .matches = { 427 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 428 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 429 }, 430 }, 431 { /* Handle problems with rebooting on Apple MacBookPro5 */ 432 .callback = set_pci_reboot, 433 .ident = "Apple MacBookPro5", 434 .matches = { 435 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 436 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 437 }, 438 }, 439 { } 440 }; 441 442 static int __init pci_reboot_init(void) 443 { 444 dmi_check_system(pci_reboot_dmi_table); 445 return 0; 446 } 447 core_initcall(pci_reboot_init); 448 449 static inline void kb_wait(void) 450 { 451 int i; 452 453 for (i = 0; i < 0x10000; i++) { 454 if ((inb(0x64) & 0x02) == 0) 455 break; 456 udelay(2); 457 } 458 } 459 460 static void vmxoff_nmi(int cpu, struct die_args *args) 461 { 462 cpu_emergency_vmxoff(); 463 } 464 465 /* Use NMIs as IPIs to tell all CPUs to disable virtualization 466 */ 467 static void emergency_vmx_disable_all(void) 468 { 469 /* Just make sure we won't change CPUs while doing this */ 470 local_irq_disable(); 471 472 /* We need to disable VMX on all CPUs before rebooting, otherwise 473 * we risk hanging up the machine, because the CPU ignore INIT 474 * signals when VMX is enabled. 475 * 476 * We can't take any locks and we may be on an inconsistent 477 * state, so we use NMIs as IPIs to tell the other CPUs to disable 478 * VMX and halt. 479 * 480 * For safety, we will avoid running the nmi_shootdown_cpus() 481 * stuff unnecessarily, but we don't have a way to check 482 * if other CPUs have VMX enabled. So we will call it only if the 483 * CPU we are running on has VMX enabled. 484 * 485 * We will miss cases where VMX is not enabled on all CPUs. This 486 * shouldn't do much harm because KVM always enable VMX on all 487 * CPUs anyway. But we can miss it on the small window where KVM 488 * is still enabling VMX. 489 */ 490 if (cpu_has_vmx() && cpu_vmx_enabled()) { 491 /* Disable VMX on this CPU. 492 */ 493 cpu_vmxoff(); 494 495 /* Halt and disable VMX on the other CPUs */ 496 nmi_shootdown_cpus(vmxoff_nmi); 497 498 } 499 } 500 501 502 void __attribute__((weak)) mach_reboot_fixups(void) 503 { 504 } 505 506 static void native_machine_emergency_restart(void) 507 { 508 int i; 509 510 if (reboot_emergency) 511 emergency_vmx_disable_all(); 512 513 tboot_shutdown(TB_SHUTDOWN_REBOOT); 514 515 /* Tell the BIOS if we want cold or warm reboot */ 516 *((unsigned short *)__va(0x472)) = reboot_mode; 517 518 for (;;) { 519 /* Could also try the reset bit in the Hammer NB */ 520 switch (reboot_type) { 521 case BOOT_KBD: 522 mach_reboot_fixups(); /* for board specific fixups */ 523 524 for (i = 0; i < 10; i++) { 525 kb_wait(); 526 udelay(50); 527 outb(0xfe, 0x64); /* pulse reset low */ 528 udelay(50); 529 } 530 531 case BOOT_TRIPLE: 532 load_idt(&no_idt); 533 __asm__ __volatile__("int3"); 534 535 reboot_type = BOOT_KBD; 536 break; 537 538 #ifdef CONFIG_X86_32 539 case BOOT_BIOS: 540 machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); 541 542 reboot_type = BOOT_KBD; 543 break; 544 #endif 545 546 case BOOT_ACPI: 547 acpi_reboot(); 548 reboot_type = BOOT_KBD; 549 break; 550 551 case BOOT_EFI: 552 if (efi_enabled) 553 efi.reset_system(reboot_mode ? 554 EFI_RESET_WARM : 555 EFI_RESET_COLD, 556 EFI_SUCCESS, 0, NULL); 557 reboot_type = BOOT_KBD; 558 break; 559 560 case BOOT_CF9: 561 port_cf9_safe = true; 562 /* fall through */ 563 564 case BOOT_CF9_COND: 565 if (port_cf9_safe) { 566 u8 cf9 = inb(0xcf9) & ~6; 567 outb(cf9|2, 0xcf9); /* Request hard reset */ 568 udelay(50); 569 outb(cf9|6, 0xcf9); /* Actually do the reset */ 570 udelay(50); 571 } 572 reboot_type = BOOT_KBD; 573 break; 574 } 575 } 576 } 577 578 void native_machine_shutdown(void) 579 { 580 /* Stop the cpus and apics */ 581 #ifdef CONFIG_SMP 582 583 /* The boot cpu is always logical cpu 0 */ 584 int reboot_cpu_id = 0; 585 586 #ifdef CONFIG_X86_32 587 /* See if there has been given a command line override */ 588 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && 589 cpu_online(reboot_cpu)) 590 reboot_cpu_id = reboot_cpu; 591 #endif 592 593 /* Make certain the cpu I'm about to reboot on is online */ 594 if (!cpu_online(reboot_cpu_id)) 595 reboot_cpu_id = smp_processor_id(); 596 597 /* Make certain I only run on the appropriate processor */ 598 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 599 600 /* O.K Now that I'm on the appropriate processor, 601 * stop all of the others. 602 */ 603 smp_send_stop(); 604 #endif 605 606 lapic_shutdown(); 607 608 #ifdef CONFIG_X86_IO_APIC 609 disable_IO_APIC(); 610 #endif 611 612 #ifdef CONFIG_HPET_TIMER 613 hpet_disable(); 614 #endif 615 616 #ifdef CONFIG_X86_64 617 pci_iommu_shutdown(); 618 #endif 619 } 620 621 static void __machine_emergency_restart(int emergency) 622 { 623 reboot_emergency = emergency; 624 machine_ops.emergency_restart(); 625 } 626 627 static void native_machine_restart(char *__unused) 628 { 629 printk("machine restart\n"); 630 631 if (!reboot_force) 632 machine_shutdown(); 633 __machine_emergency_restart(0); 634 } 635 636 static void native_machine_halt(void) 637 { 638 /* stop other cpus and apics */ 639 machine_shutdown(); 640 641 tboot_shutdown(TB_SHUTDOWN_HALT); 642 643 /* stop this cpu */ 644 stop_this_cpu(NULL); 645 } 646 647 static void native_machine_power_off(void) 648 { 649 if (pm_power_off) { 650 if (!reboot_force) 651 machine_shutdown(); 652 pm_power_off(); 653 } 654 /* a fallback in case there is no PM info available */ 655 tboot_shutdown(TB_SHUTDOWN_HALT); 656 } 657 658 struct machine_ops machine_ops = { 659 .power_off = native_machine_power_off, 660 .shutdown = native_machine_shutdown, 661 .emergency_restart = native_machine_emergency_restart, 662 .restart = native_machine_restart, 663 .halt = native_machine_halt, 664 #ifdef CONFIG_KEXEC 665 .crash_shutdown = native_machine_crash_shutdown, 666 #endif 667 }; 668 669 void machine_power_off(void) 670 { 671 machine_ops.power_off(); 672 } 673 674 void machine_shutdown(void) 675 { 676 machine_ops.shutdown(); 677 } 678 679 void machine_emergency_restart(void) 680 { 681 __machine_emergency_restart(1); 682 } 683 684 void machine_restart(char *cmd) 685 { 686 machine_ops.restart(cmd); 687 } 688 689 void machine_halt(void) 690 { 691 machine_ops.halt(); 692 } 693 694 #ifdef CONFIG_KEXEC 695 void machine_crash_shutdown(struct pt_regs *regs) 696 { 697 machine_ops.crash_shutdown(regs); 698 } 699 #endif 700 701 702 #if defined(CONFIG_SMP) 703 704 /* This keeps a track of which one is crashing cpu. */ 705 static int crashing_cpu; 706 static nmi_shootdown_cb shootdown_callback; 707 708 static atomic_t waiting_for_crash_ipi; 709 710 static int crash_nmi_callback(struct notifier_block *self, 711 unsigned long val, void *data) 712 { 713 int cpu; 714 715 if (val != DIE_NMI_IPI) 716 return NOTIFY_OK; 717 718 cpu = raw_smp_processor_id(); 719 720 /* Don't do anything if this handler is invoked on crashing cpu. 721 * Otherwise, system will completely hang. Crashing cpu can get 722 * an NMI if system was initially booted with nmi_watchdog parameter. 723 */ 724 if (cpu == crashing_cpu) 725 return NOTIFY_STOP; 726 local_irq_disable(); 727 728 shootdown_callback(cpu, (struct die_args *)data); 729 730 atomic_dec(&waiting_for_crash_ipi); 731 /* Assume hlt works */ 732 halt(); 733 for (;;) 734 cpu_relax(); 735 736 return 1; 737 } 738 739 static void smp_send_nmi_allbutself(void) 740 { 741 apic->send_IPI_allbutself(NMI_VECTOR); 742 } 743 744 static struct notifier_block crash_nmi_nb = { 745 .notifier_call = crash_nmi_callback, 746 }; 747 748 /* Halt all other CPUs, calling the specified function on each of them 749 * 750 * This function can be used to halt all other CPUs on crash 751 * or emergency reboot time. The function passed as parameter 752 * will be called inside a NMI handler on all CPUs. 753 */ 754 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 755 { 756 unsigned long msecs; 757 local_irq_disable(); 758 759 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 760 crashing_cpu = safe_smp_processor_id(); 761 762 shootdown_callback = callback; 763 764 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); 765 /* Would it be better to replace the trap vector here? */ 766 if (register_die_notifier(&crash_nmi_nb)) 767 return; /* return what? */ 768 /* Ensure the new callback function is set before sending 769 * out the NMI 770 */ 771 wmb(); 772 773 smp_send_nmi_allbutself(); 774 775 msecs = 1000; /* Wait at most a second for the other cpus to stop */ 776 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { 777 mdelay(1); 778 msecs--; 779 } 780 781 /* Leave the nmi callback set */ 782 } 783 #else /* !CONFIG_SMP */ 784 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 785 { 786 /* No other CPUs to shoot down */ 787 } 788 #endif 789