1 // SPDX-License-Identifier: GPL-2.0 2 #include <linux/dma-direct.h> 3 #include <linux/dma-debug.h> 4 #include <linux/dmar.h> 5 #include <linux/export.h> 6 #include <linux/bootmem.h> 7 #include <linux/gfp.h> 8 #include <linux/pci.h> 9 #include <linux/kmemleak.h> 10 11 #include <asm/proto.h> 12 #include <asm/dma.h> 13 #include <asm/iommu.h> 14 #include <asm/gart.h> 15 #include <asm/calgary.h> 16 #include <asm/x86_init.h> 17 #include <asm/iommu_table.h> 18 19 static int forbid_dac __read_mostly; 20 21 const struct dma_map_ops *dma_ops = &nommu_dma_ops; 22 EXPORT_SYMBOL(dma_ops); 23 24 static int iommu_sac_force __read_mostly; 25 26 #ifdef CONFIG_IOMMU_DEBUG 27 int panic_on_overflow __read_mostly = 1; 28 int force_iommu __read_mostly = 1; 29 #else 30 int panic_on_overflow __read_mostly = 0; 31 int force_iommu __read_mostly = 0; 32 #endif 33 34 int iommu_merge __read_mostly = 0; 35 36 int no_iommu __read_mostly; 37 /* Set this to 1 if there is a HW IOMMU in the system */ 38 int iommu_detected __read_mostly = 0; 39 40 /* 41 * This variable becomes 1 if iommu=pt is passed on the kernel command line. 42 * If this variable is 1, IOMMU implementations do no DMA translation for 43 * devices and allow every device to access to whole physical memory. This is 44 * useful if a user wants to use an IOMMU only for KVM device assignment to 45 * guests and not for driver dma translation. 46 */ 47 int iommu_pass_through __read_mostly; 48 49 extern struct iommu_table_entry __iommu_table[], __iommu_table_end[]; 50 51 /* Dummy device used for NULL arguments (normally ISA). */ 52 struct device x86_dma_fallback_dev = { 53 .init_name = "fallback device", 54 .coherent_dma_mask = ISA_DMA_BIT_MASK, 55 .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask, 56 }; 57 EXPORT_SYMBOL(x86_dma_fallback_dev); 58 59 /* Number of entries preallocated for DMA-API debugging */ 60 #define PREALLOC_DMA_DEBUG_ENTRIES 65536 61 62 void __init pci_iommu_alloc(void) 63 { 64 struct iommu_table_entry *p; 65 66 sort_iommu_table(__iommu_table, __iommu_table_end); 67 check_iommu_entries(__iommu_table, __iommu_table_end); 68 69 for (p = __iommu_table; p < __iommu_table_end; p++) { 70 if (p && p->detect && p->detect() > 0) { 71 p->flags |= IOMMU_DETECTED; 72 if (p->early_init) 73 p->early_init(); 74 if (p->flags & IOMMU_FINISH_IF_DETECTED) 75 break; 76 } 77 } 78 } 79 void *dma_generic_alloc_coherent(struct device *dev, size_t size, 80 dma_addr_t *dma_addr, gfp_t flag, 81 unsigned long attrs) 82 { 83 struct page *page; 84 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 85 dma_addr_t addr; 86 87 again: 88 page = NULL; 89 /* CMA can be used only in the context which permits sleeping */ 90 if (gfpflags_allow_blocking(flag)) { 91 page = dma_alloc_from_contiguous(dev, count, get_order(size), 92 flag); 93 if (page) { 94 addr = phys_to_dma(dev, page_to_phys(page)); 95 if (addr + size > dev->coherent_dma_mask) { 96 dma_release_from_contiguous(dev, page, count); 97 page = NULL; 98 } 99 } 100 } 101 /* fallback */ 102 if (!page) 103 page = alloc_pages_node(dev_to_node(dev), flag, get_order(size)); 104 if (!page) 105 return NULL; 106 107 addr = phys_to_dma(dev, page_to_phys(page)); 108 if (addr + size > dev->coherent_dma_mask) { 109 __free_pages(page, get_order(size)); 110 111 if (dev->coherent_dma_mask < DMA_BIT_MASK(32) && 112 !(flag & GFP_DMA)) { 113 flag = (flag & ~GFP_DMA32) | GFP_DMA; 114 goto again; 115 } 116 117 return NULL; 118 } 119 memset(page_address(page), 0, size); 120 *dma_addr = addr; 121 return page_address(page); 122 } 123 124 void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr, 125 dma_addr_t dma_addr, unsigned long attrs) 126 { 127 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 128 struct page *page = virt_to_page(vaddr); 129 130 if (!dma_release_from_contiguous(dev, page, count)) 131 free_pages((unsigned long)vaddr, get_order(size)); 132 } 133 134 bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp) 135 { 136 if (!*dev) 137 *dev = &x86_dma_fallback_dev; 138 139 *gfp = dma_alloc_coherent_gfp_flags(*dev, *gfp); 140 141 if (!is_device_dma_capable(*dev)) 142 return false; 143 return true; 144 145 } 146 EXPORT_SYMBOL(arch_dma_alloc_attrs); 147 148 /* 149 * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel 150 * parameter documentation. 151 */ 152 static __init int iommu_setup(char *p) 153 { 154 iommu_merge = 1; 155 156 if (!p) 157 return -EINVAL; 158 159 while (*p) { 160 if (!strncmp(p, "off", 3)) 161 no_iommu = 1; 162 /* gart_parse_options has more force support */ 163 if (!strncmp(p, "force", 5)) 164 force_iommu = 1; 165 if (!strncmp(p, "noforce", 7)) { 166 iommu_merge = 0; 167 force_iommu = 0; 168 } 169 170 if (!strncmp(p, "biomerge", 8)) { 171 iommu_merge = 1; 172 force_iommu = 1; 173 } 174 if (!strncmp(p, "panic", 5)) 175 panic_on_overflow = 1; 176 if (!strncmp(p, "nopanic", 7)) 177 panic_on_overflow = 0; 178 if (!strncmp(p, "merge", 5)) { 179 iommu_merge = 1; 180 force_iommu = 1; 181 } 182 if (!strncmp(p, "nomerge", 7)) 183 iommu_merge = 0; 184 if (!strncmp(p, "forcesac", 8)) 185 iommu_sac_force = 1; 186 if (!strncmp(p, "allowdac", 8)) 187 forbid_dac = 0; 188 if (!strncmp(p, "nodac", 5)) 189 forbid_dac = 1; 190 if (!strncmp(p, "usedac", 6)) { 191 forbid_dac = -1; 192 return 1; 193 } 194 #ifdef CONFIG_SWIOTLB 195 if (!strncmp(p, "soft", 4)) 196 swiotlb = 1; 197 #endif 198 if (!strncmp(p, "pt", 2)) 199 iommu_pass_through = 1; 200 201 gart_parse_options(p); 202 203 #ifdef CONFIG_CALGARY_IOMMU 204 if (!strncmp(p, "calgary", 7)) 205 use_calgary = 1; 206 #endif /* CONFIG_CALGARY_IOMMU */ 207 208 p += strcspn(p, ","); 209 if (*p == ',') 210 ++p; 211 } 212 return 0; 213 } 214 early_param("iommu", iommu_setup); 215 216 int arch_dma_supported(struct device *dev, u64 mask) 217 { 218 #ifdef CONFIG_PCI 219 if (mask > 0xffffffff && forbid_dac > 0) { 220 dev_info(dev, "PCI: Disallowing DAC for device\n"); 221 return 0; 222 } 223 #endif 224 225 /* Tell the device to use SAC when IOMMU force is on. This 226 allows the driver to use cheaper accesses in some cases. 227 228 Problem with this is that if we overflow the IOMMU area and 229 return DAC as fallback address the device may not handle it 230 correctly. 231 232 As a special case some controllers have a 39bit address 233 mode that is as efficient as 32bit (aic79xx). Don't force 234 SAC for these. Assume all masks <= 40 bits are of this 235 type. Normally this doesn't make any difference, but gives 236 more gentle handling of IOMMU overflow. */ 237 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) { 238 dev_info(dev, "Force SAC with mask %Lx\n", mask); 239 return 0; 240 } 241 242 return 1; 243 } 244 EXPORT_SYMBOL(arch_dma_supported); 245 246 int x86_dma_supported(struct device *dev, u64 mask) 247 { 248 /* Copied from i386. Doesn't make much sense, because it will 249 only work for pci_alloc_coherent. 250 The caller just has to use GFP_DMA in this case. */ 251 if (mask < DMA_BIT_MASK(24)) 252 return 0; 253 return 1; 254 } 255 256 static int __init pci_iommu_init(void) 257 { 258 struct iommu_table_entry *p; 259 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); 260 261 #ifdef CONFIG_PCI 262 dma_debug_add_bus(&pci_bus_type); 263 #endif 264 x86_init.iommu.iommu_init(); 265 266 for (p = __iommu_table; p < __iommu_table_end; p++) { 267 if (p && (p->flags & IOMMU_DETECTED) && p->late_init) 268 p->late_init(); 269 } 270 271 return 0; 272 } 273 /* Must execute after PCI subsystem */ 274 rootfs_initcall(pci_iommu_init); 275 276 #ifdef CONFIG_PCI 277 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */ 278 279 static void via_no_dac(struct pci_dev *dev) 280 { 281 if (forbid_dac == 0) { 282 dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n"); 283 forbid_dac = 1; 284 } 285 } 286 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, 287 PCI_CLASS_BRIDGE_PCI, 8, via_no_dac); 288 #endif 289