xref: /linux/arch/x86/kernel/paravirt.c (revision f85f5ae45ad945270a8884261de8249431e8b5a6)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*  Paravirtualization interfaces
3     Copyright (C) 2006 Rusty Russell IBM Corporation
4 
5 
6     2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
7 */
8 
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
12 #include <linux/efi.h>
13 #include <linux/bcd.h>
14 #include <linux/highmem.h>
15 #include <linux/kprobes.h>
16 #include <linux/pgtable.h>
17 #include <linux/static_call.h>
18 
19 #include <asm/bug.h>
20 #include <asm/paravirt.h>
21 #include <asm/debugreg.h>
22 #include <asm/desc.h>
23 #include <asm/setup.h>
24 #include <asm/time.h>
25 #include <asm/pgalloc.h>
26 #include <asm/irq.h>
27 #include <asm/delay.h>
28 #include <asm/fixmap.h>
29 #include <asm/apic.h>
30 #include <asm/tlbflush.h>
31 #include <asm/timer.h>
32 #include <asm/special_insns.h>
33 #include <asm/tlb.h>
34 #include <asm/io_bitmap.h>
35 #include <asm/gsseg.h>
36 
37 /*
38  * nop stub, which must not clobber anything *including the stack* to
39  * avoid confusing the entry prologues.
40  */
41 DEFINE_PARAVIRT_ASM(_paravirt_nop, "", .entry.text);
42 
43 /* stub always returning 0. */
44 DEFINE_PARAVIRT_ASM(paravirt_ret0, "xor %eax,%eax", .entry.text);
45 
46 void __init default_banner(void)
47 {
48 	printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
49 	       pv_info.name);
50 }
51 
52 /* Undefined instruction for dealing with missing ops pointers. */
53 noinstr void paravirt_BUG(void)
54 {
55 	BUG();
56 }
57 
58 static unsigned paravirt_patch_call(void *insn_buff, const void *target,
59 				    unsigned long addr, unsigned len)
60 {
61 	__text_gen_insn(insn_buff, CALL_INSN_OPCODE,
62 			(void *)addr, target, CALL_INSN_SIZE);
63 	return CALL_INSN_SIZE;
64 }
65 
66 #ifdef CONFIG_PARAVIRT_XXL
67 DEFINE_PARAVIRT_ASM(_paravirt_ident_64, "mov %rdi, %rax", .text);
68 DEFINE_PARAVIRT_ASM(pv_native_save_fl, "pushf; pop %rax", .noinstr.text);
69 DEFINE_PARAVIRT_ASM(pv_native_irq_disable, "cli", .noinstr.text);
70 DEFINE_PARAVIRT_ASM(pv_native_irq_enable, "sti", .noinstr.text);
71 DEFINE_PARAVIRT_ASM(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
72 #endif
73 
74 DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key);
75 
76 void __init native_pv_lock_init(void)
77 {
78 	if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) &&
79 	    !boot_cpu_has(X86_FEATURE_HYPERVISOR))
80 		static_branch_disable(&virt_spin_lock_key);
81 }
82 
83 static void native_tlb_remove_table(struct mmu_gather *tlb, void *table)
84 {
85 	tlb_remove_page(tlb, table);
86 }
87 
88 unsigned int paravirt_patch(u8 type, void *insn_buff, unsigned long addr,
89 			    unsigned int len)
90 {
91 	/*
92 	 * Neat trick to map patch type back to the call within the
93 	 * corresponding structure.
94 	 */
95 	void *opfunc = *((void **)&pv_ops + type);
96 	unsigned ret;
97 
98 	if (opfunc == NULL)
99 		/* If there's no function, patch it with paravirt_BUG() */
100 		ret = paravirt_patch_call(insn_buff, paravirt_BUG, addr, len);
101 	else if (opfunc == _paravirt_nop)
102 		ret = 0;
103 	else
104 		/* Otherwise call the function. */
105 		ret = paravirt_patch_call(insn_buff, opfunc, addr, len);
106 
107 	return ret;
108 }
109 
110 struct static_key paravirt_steal_enabled;
111 struct static_key paravirt_steal_rq_enabled;
112 
113 static u64 native_steal_clock(int cpu)
114 {
115 	return 0;
116 }
117 
118 DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
119 DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
120 
121 void paravirt_set_sched_clock(u64 (*func)(void))
122 {
123 	static_call_update(pv_sched_clock, func);
124 }
125 
126 /* These are in entry.S */
127 static struct resource reserve_ioports = {
128 	.start = 0,
129 	.end = IO_SPACE_LIMIT,
130 	.name = "paravirt-ioport",
131 	.flags = IORESOURCE_IO | IORESOURCE_BUSY,
132 };
133 
134 /*
135  * Reserve the whole legacy IO space to prevent any legacy drivers
136  * from wasting time probing for their hardware.  This is a fairly
137  * brute-force approach to disabling all non-virtual drivers.
138  *
139  * Note that this must be called very early to have any effect.
140  */
141 int paravirt_disable_iospace(void)
142 {
143 	return request_resource(&ioport_resource, &reserve_ioports);
144 }
145 
146 static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
147 
148 static inline void enter_lazy(enum paravirt_lazy_mode mode)
149 {
150 	BUG_ON(this_cpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
151 
152 	this_cpu_write(paravirt_lazy_mode, mode);
153 }
154 
155 static void leave_lazy(enum paravirt_lazy_mode mode)
156 {
157 	BUG_ON(this_cpu_read(paravirt_lazy_mode) != mode);
158 
159 	this_cpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
160 }
161 
162 void paravirt_enter_lazy_mmu(void)
163 {
164 	enter_lazy(PARAVIRT_LAZY_MMU);
165 }
166 
167 void paravirt_leave_lazy_mmu(void)
168 {
169 	leave_lazy(PARAVIRT_LAZY_MMU);
170 }
171 
172 void paravirt_flush_lazy_mmu(void)
173 {
174 	preempt_disable();
175 
176 	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
177 		arch_leave_lazy_mmu_mode();
178 		arch_enter_lazy_mmu_mode();
179 	}
180 
181 	preempt_enable();
182 }
183 
184 #ifdef CONFIG_PARAVIRT_XXL
185 void paravirt_start_context_switch(struct task_struct *prev)
186 {
187 	BUG_ON(preemptible());
188 
189 	if (this_cpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
190 		arch_leave_lazy_mmu_mode();
191 		set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
192 	}
193 	enter_lazy(PARAVIRT_LAZY_CPU);
194 }
195 
196 void paravirt_end_context_switch(struct task_struct *next)
197 {
198 	BUG_ON(preemptible());
199 
200 	leave_lazy(PARAVIRT_LAZY_CPU);
201 
202 	if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
203 		arch_enter_lazy_mmu_mode();
204 }
205 
206 static noinstr void pv_native_write_cr2(unsigned long val)
207 {
208 	native_write_cr2(val);
209 }
210 
211 static noinstr unsigned long pv_native_get_debugreg(int regno)
212 {
213 	return native_get_debugreg(regno);
214 }
215 
216 static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
217 {
218 	native_set_debugreg(regno, val);
219 }
220 
221 noinstr void pv_native_wbinvd(void)
222 {
223 	native_wbinvd();
224 }
225 
226 static noinstr void pv_native_safe_halt(void)
227 {
228 	native_safe_halt();
229 }
230 #endif
231 
232 enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
233 {
234 	if (in_interrupt())
235 		return PARAVIRT_LAZY_NONE;
236 
237 	return this_cpu_read(paravirt_lazy_mode);
238 }
239 
240 struct pv_info pv_info = {
241 	.name = "bare hardware",
242 #ifdef CONFIG_PARAVIRT_XXL
243 	.extra_user_64bit_cs = __USER_CS,
244 #endif
245 };
246 
247 /* 64-bit pagetable entries */
248 #define PTE_IDENT	__PV_IS_CALLEE_SAVE(_paravirt_ident_64)
249 
250 struct paravirt_patch_template pv_ops = {
251 	/* Cpu ops. */
252 	.cpu.io_delay		= native_io_delay,
253 
254 #ifdef CONFIG_PARAVIRT_XXL
255 	.cpu.cpuid		= native_cpuid,
256 	.cpu.get_debugreg	= pv_native_get_debugreg,
257 	.cpu.set_debugreg	= pv_native_set_debugreg,
258 	.cpu.read_cr0		= native_read_cr0,
259 	.cpu.write_cr0		= native_write_cr0,
260 	.cpu.write_cr4		= native_write_cr4,
261 	.cpu.wbinvd		= pv_native_wbinvd,
262 	.cpu.read_msr		= native_read_msr,
263 	.cpu.write_msr		= native_write_msr,
264 	.cpu.read_msr_safe	= native_read_msr_safe,
265 	.cpu.write_msr_safe	= native_write_msr_safe,
266 	.cpu.read_pmc		= native_read_pmc,
267 	.cpu.load_tr_desc	= native_load_tr_desc,
268 	.cpu.set_ldt		= native_set_ldt,
269 	.cpu.load_gdt		= native_load_gdt,
270 	.cpu.load_idt		= native_load_idt,
271 	.cpu.store_tr		= native_store_tr,
272 	.cpu.load_tls		= native_load_tls,
273 	.cpu.load_gs_index	= native_load_gs_index,
274 	.cpu.write_ldt_entry	= native_write_ldt_entry,
275 	.cpu.write_gdt_entry	= native_write_gdt_entry,
276 	.cpu.write_idt_entry	= native_write_idt_entry,
277 
278 	.cpu.alloc_ldt		= paravirt_nop,
279 	.cpu.free_ldt		= paravirt_nop,
280 
281 	.cpu.load_sp0		= native_load_sp0,
282 
283 #ifdef CONFIG_X86_IOPL_IOPERM
284 	.cpu.invalidate_io_bitmap	= native_tss_invalidate_io_bitmap,
285 	.cpu.update_io_bitmap		= native_tss_update_io_bitmap,
286 #endif
287 
288 	.cpu.start_context_switch	= paravirt_nop,
289 	.cpu.end_context_switch		= paravirt_nop,
290 
291 	/* Irq ops. */
292 	.irq.save_fl		= __PV_IS_CALLEE_SAVE(pv_native_save_fl),
293 	.irq.irq_disable	= __PV_IS_CALLEE_SAVE(pv_native_irq_disable),
294 	.irq.irq_enable		= __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
295 	.irq.safe_halt		= pv_native_safe_halt,
296 	.irq.halt		= native_halt,
297 #endif /* CONFIG_PARAVIRT_XXL */
298 
299 	/* Mmu ops. */
300 	.mmu.flush_tlb_user	= native_flush_tlb_local,
301 	.mmu.flush_tlb_kernel	= native_flush_tlb_global,
302 	.mmu.flush_tlb_one_user	= native_flush_tlb_one_user,
303 	.mmu.flush_tlb_multi	= native_flush_tlb_multi,
304 	.mmu.tlb_remove_table	= native_tlb_remove_table,
305 
306 	.mmu.exit_mmap		= paravirt_nop,
307 	.mmu.notify_page_enc_status_changed	= paravirt_nop,
308 
309 #ifdef CONFIG_PARAVIRT_XXL
310 	.mmu.read_cr2		= __PV_IS_CALLEE_SAVE(pv_native_read_cr2),
311 	.mmu.write_cr2		= pv_native_write_cr2,
312 	.mmu.read_cr3		= __native_read_cr3,
313 	.mmu.write_cr3		= native_write_cr3,
314 
315 	.mmu.pgd_alloc		= __paravirt_pgd_alloc,
316 	.mmu.pgd_free		= paravirt_nop,
317 
318 	.mmu.alloc_pte		= paravirt_nop,
319 	.mmu.alloc_pmd		= paravirt_nop,
320 	.mmu.alloc_pud		= paravirt_nop,
321 	.mmu.alloc_p4d		= paravirt_nop,
322 	.mmu.release_pte	= paravirt_nop,
323 	.mmu.release_pmd	= paravirt_nop,
324 	.mmu.release_pud	= paravirt_nop,
325 	.mmu.release_p4d	= paravirt_nop,
326 
327 	.mmu.set_pte		= native_set_pte,
328 	.mmu.set_pmd		= native_set_pmd,
329 
330 	.mmu.ptep_modify_prot_start	= __ptep_modify_prot_start,
331 	.mmu.ptep_modify_prot_commit	= __ptep_modify_prot_commit,
332 
333 	.mmu.set_pud		= native_set_pud,
334 
335 	.mmu.pmd_val		= PTE_IDENT,
336 	.mmu.make_pmd		= PTE_IDENT,
337 
338 	.mmu.pud_val		= PTE_IDENT,
339 	.mmu.make_pud		= PTE_IDENT,
340 
341 	.mmu.set_p4d		= native_set_p4d,
342 
343 #if CONFIG_PGTABLE_LEVELS >= 5
344 	.mmu.p4d_val		= PTE_IDENT,
345 	.mmu.make_p4d		= PTE_IDENT,
346 
347 	.mmu.set_pgd		= native_set_pgd,
348 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
349 
350 	.mmu.pte_val		= PTE_IDENT,
351 	.mmu.pgd_val		= PTE_IDENT,
352 
353 	.mmu.make_pte		= PTE_IDENT,
354 	.mmu.make_pgd		= PTE_IDENT,
355 
356 	.mmu.enter_mmap		= paravirt_nop,
357 
358 	.mmu.lazy_mode = {
359 		.enter		= paravirt_nop,
360 		.leave		= paravirt_nop,
361 		.flush		= paravirt_nop,
362 	},
363 
364 	.mmu.set_fixmap		= native_set_fixmap,
365 #endif /* CONFIG_PARAVIRT_XXL */
366 
367 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
368 	/* Lock ops. */
369 #ifdef CONFIG_SMP
370 	.lock.queued_spin_lock_slowpath	= native_queued_spin_lock_slowpath,
371 	.lock.queued_spin_unlock	=
372 				PV_CALLEE_SAVE(__native_queued_spin_unlock),
373 	.lock.wait			= paravirt_nop,
374 	.lock.kick			= paravirt_nop,
375 	.lock.vcpu_is_preempted		=
376 				PV_CALLEE_SAVE(__native_vcpu_is_preempted),
377 #endif /* SMP */
378 #endif
379 };
380 
381 #ifdef CONFIG_PARAVIRT_XXL
382 NOKPROBE_SYMBOL(native_load_idt);
383 #endif
384 
385 EXPORT_SYMBOL(pv_ops);
386 EXPORT_SYMBOL_GPL(pv_info);
387