1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* Paravirtualization interfaces 3 Copyright (C) 2006 Rusty Russell IBM Corporation 4 5 6 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc 7 */ 8 9 #include <linux/errno.h> 10 #include <linux/init.h> 11 #include <linux/export.h> 12 #include <linux/efi.h> 13 #include <linux/bcd.h> 14 #include <linux/highmem.h> 15 #include <linux/kprobes.h> 16 #include <linux/pgtable.h> 17 #include <linux/static_call.h> 18 19 #include <asm/bug.h> 20 #include <asm/paravirt.h> 21 #include <asm/debugreg.h> 22 #include <asm/desc.h> 23 #include <asm/setup.h> 24 #include <asm/time.h> 25 #include <asm/pgalloc.h> 26 #include <asm/irq.h> 27 #include <asm/delay.h> 28 #include <asm/fixmap.h> 29 #include <asm/apic.h> 30 #include <asm/tlbflush.h> 31 #include <asm/timer.h> 32 #include <asm/special_insns.h> 33 #include <asm/tlb.h> 34 #include <asm/io_bitmap.h> 35 #include <asm/gsseg.h> 36 37 /* stub always returning 0. */ 38 DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text); 39 40 void __init default_banner(void) 41 { 42 printk(KERN_INFO "Booting paravirtualized kernel on %s\n", 43 pv_info.name); 44 } 45 46 #ifdef CONFIG_PARAVIRT_XXL 47 DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text); 48 DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text); 49 DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text); 50 DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text); 51 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text); 52 #endif 53 54 DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); 55 56 void __init native_pv_lock_init(void) 57 { 58 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 59 static_branch_enable(&virt_spin_lock_key); 60 } 61 62 #ifndef CONFIG_PT_RECLAIM 63 static void native_tlb_remove_table(struct mmu_gather *tlb, void *table) 64 { 65 struct ptdesc *ptdesc = (struct ptdesc *)table; 66 67 pagetable_dtor(ptdesc); 68 tlb_remove_page(tlb, ptdesc_page(ptdesc)); 69 } 70 #else 71 static void native_tlb_remove_table(struct mmu_gather *tlb, void *table) 72 { 73 tlb_remove_table(tlb, table); 74 } 75 #endif 76 77 struct static_key paravirt_steal_enabled; 78 struct static_key paravirt_steal_rq_enabled; 79 80 static u64 native_steal_clock(int cpu) 81 { 82 return 0; 83 } 84 85 DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); 86 DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); 87 88 void paravirt_set_sched_clock(u64 (*func)(void)) 89 { 90 static_call_update(pv_sched_clock, func); 91 } 92 93 /* These are in entry.S */ 94 static struct resource reserve_ioports = { 95 .start = 0, 96 .end = IO_SPACE_LIMIT, 97 .name = "paravirt-ioport", 98 .flags = IORESOURCE_IO | IORESOURCE_BUSY, 99 }; 100 101 /* 102 * Reserve the whole legacy IO space to prevent any legacy drivers 103 * from wasting time probing for their hardware. This is a fairly 104 * brute-force approach to disabling all non-virtual drivers. 105 * 106 * Note that this must be called very early to have any effect. 107 */ 108 int paravirt_disable_iospace(void) 109 { 110 return request_resource(&ioport_resource, &reserve_ioports); 111 } 112 113 #ifdef CONFIG_PARAVIRT_XXL 114 static noinstr void pv_native_write_cr2(unsigned long val) 115 { 116 native_write_cr2(val); 117 } 118 119 static noinstr unsigned long pv_native_get_debugreg(int regno) 120 { 121 return native_get_debugreg(regno); 122 } 123 124 static noinstr void pv_native_set_debugreg(int regno, unsigned long val) 125 { 126 native_set_debugreg(regno, val); 127 } 128 129 static noinstr void pv_native_safe_halt(void) 130 { 131 native_safe_halt(); 132 } 133 #endif 134 135 struct pv_info pv_info = { 136 .name = "bare hardware", 137 #ifdef CONFIG_PARAVIRT_XXL 138 .extra_user_64bit_cs = __USER_CS, 139 #endif 140 }; 141 142 /* 64-bit pagetable entries */ 143 #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64) 144 145 struct paravirt_patch_template pv_ops = { 146 /* Cpu ops. */ 147 .cpu.io_delay = native_io_delay, 148 149 #ifdef CONFIG_PARAVIRT_XXL 150 .cpu.cpuid = native_cpuid, 151 .cpu.get_debugreg = pv_native_get_debugreg, 152 .cpu.set_debugreg = pv_native_set_debugreg, 153 .cpu.read_cr0 = native_read_cr0, 154 .cpu.write_cr0 = native_write_cr0, 155 .cpu.write_cr4 = native_write_cr4, 156 .cpu.read_msr = native_read_msr, 157 .cpu.write_msr = native_write_msr, 158 .cpu.read_msr_safe = native_read_msr_safe, 159 .cpu.write_msr_safe = native_write_msr_safe, 160 .cpu.read_pmc = native_read_pmc, 161 .cpu.load_tr_desc = native_load_tr_desc, 162 .cpu.set_ldt = native_set_ldt, 163 .cpu.load_gdt = native_load_gdt, 164 .cpu.load_idt = native_load_idt, 165 .cpu.store_tr = native_store_tr, 166 .cpu.load_tls = native_load_tls, 167 .cpu.load_gs_index = native_load_gs_index, 168 .cpu.write_ldt_entry = native_write_ldt_entry, 169 .cpu.write_gdt_entry = native_write_gdt_entry, 170 .cpu.write_idt_entry = native_write_idt_entry, 171 172 .cpu.alloc_ldt = paravirt_nop, 173 .cpu.free_ldt = paravirt_nop, 174 175 .cpu.load_sp0 = native_load_sp0, 176 177 #ifdef CONFIG_X86_IOPL_IOPERM 178 .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap, 179 .cpu.update_io_bitmap = native_tss_update_io_bitmap, 180 #endif 181 182 .cpu.start_context_switch = paravirt_nop, 183 .cpu.end_context_switch = paravirt_nop, 184 185 /* Irq ops. */ 186 .irq.save_fl = __PV_IS_CALLEE_SAVE(pv_native_save_fl), 187 .irq.irq_disable = __PV_IS_CALLEE_SAVE(pv_native_irq_disable), 188 .irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable), 189 .irq.safe_halt = pv_native_safe_halt, 190 .irq.halt = native_halt, 191 #endif /* CONFIG_PARAVIRT_XXL */ 192 193 /* Mmu ops. */ 194 .mmu.flush_tlb_user = native_flush_tlb_local, 195 .mmu.flush_tlb_kernel = native_flush_tlb_global, 196 .mmu.flush_tlb_one_user = native_flush_tlb_one_user, 197 .mmu.flush_tlb_multi = native_flush_tlb_multi, 198 .mmu.tlb_remove_table = native_tlb_remove_table, 199 200 .mmu.exit_mmap = paravirt_nop, 201 .mmu.notify_page_enc_status_changed = paravirt_nop, 202 203 #ifdef CONFIG_PARAVIRT_XXL 204 .mmu.read_cr2 = __PV_IS_CALLEE_SAVE(pv_native_read_cr2), 205 .mmu.write_cr2 = pv_native_write_cr2, 206 .mmu.read_cr3 = __native_read_cr3, 207 .mmu.write_cr3 = native_write_cr3, 208 209 .mmu.pgd_alloc = __paravirt_pgd_alloc, 210 .mmu.pgd_free = paravirt_nop, 211 212 .mmu.alloc_pte = paravirt_nop, 213 .mmu.alloc_pmd = paravirt_nop, 214 .mmu.alloc_pud = paravirt_nop, 215 .mmu.alloc_p4d = paravirt_nop, 216 .mmu.release_pte = paravirt_nop, 217 .mmu.release_pmd = paravirt_nop, 218 .mmu.release_pud = paravirt_nop, 219 .mmu.release_p4d = paravirt_nop, 220 221 .mmu.set_pte = native_set_pte, 222 .mmu.set_pmd = native_set_pmd, 223 224 .mmu.ptep_modify_prot_start = __ptep_modify_prot_start, 225 .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit, 226 227 .mmu.set_pud = native_set_pud, 228 229 .mmu.pmd_val = PTE_IDENT, 230 .mmu.make_pmd = PTE_IDENT, 231 232 .mmu.pud_val = PTE_IDENT, 233 .mmu.make_pud = PTE_IDENT, 234 235 .mmu.set_p4d = native_set_p4d, 236 237 #if CONFIG_PGTABLE_LEVELS >= 5 238 .mmu.p4d_val = PTE_IDENT, 239 .mmu.make_p4d = PTE_IDENT, 240 241 .mmu.set_pgd = native_set_pgd, 242 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 243 244 .mmu.pte_val = PTE_IDENT, 245 .mmu.pgd_val = PTE_IDENT, 246 247 .mmu.make_pte = PTE_IDENT, 248 .mmu.make_pgd = PTE_IDENT, 249 250 .mmu.enter_mmap = paravirt_nop, 251 252 .mmu.lazy_mode = { 253 .enter = paravirt_nop, 254 .leave = paravirt_nop, 255 .flush = paravirt_nop, 256 }, 257 258 .mmu.set_fixmap = native_set_fixmap, 259 #endif /* CONFIG_PARAVIRT_XXL */ 260 261 #if defined(CONFIG_PARAVIRT_SPINLOCKS) 262 /* Lock ops. */ 263 #ifdef CONFIG_SMP 264 .lock.queued_spin_lock_slowpath = native_queued_spin_lock_slowpath, 265 .lock.queued_spin_unlock = 266 PV_CALLEE_SAVE(__native_queued_spin_unlock), 267 .lock.wait = paravirt_nop, 268 .lock.kick = paravirt_nop, 269 .lock.vcpu_is_preempted = 270 PV_CALLEE_SAVE(__native_vcpu_is_preempted), 271 #endif /* SMP */ 272 #endif 273 }; 274 275 #ifdef CONFIG_PARAVIRT_XXL 276 NOKPROBE_SYMBOL(native_load_idt); 277 #endif 278 279 EXPORT_SYMBOL(pv_ops); 280 EXPORT_SYMBOL_GPL(pv_info); 281