xref: /linux/arch/x86/kernel/paravirt.c (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*  Paravirtualization interfaces
3     Copyright (C) 2006 Rusty Russell IBM Corporation
4 
5 
6     2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
7 */
8 
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
12 #include <linux/efi.h>
13 #include <linux/bcd.h>
14 #include <linux/highmem.h>
15 #include <linux/kprobes.h>
16 #include <linux/pgtable.h>
17 #include <linux/static_call.h>
18 
19 #include <asm/bug.h>
20 #include <asm/paravirt.h>
21 #include <asm/debugreg.h>
22 #include <asm/desc.h>
23 #include <asm/setup.h>
24 #include <asm/time.h>
25 #include <asm/pgalloc.h>
26 #include <asm/irq.h>
27 #include <asm/cpuid/api.h>
28 #include <asm/delay.h>
29 #include <asm/fixmap.h>
30 #include <asm/apic.h>
31 #include <asm/tlbflush.h>
32 #include <asm/timer.h>
33 #include <asm/special_insns.h>
34 #include <asm/tlb.h>
35 #include <asm/io_bitmap.h>
36 #include <asm/gsseg.h>
37 #include <asm/msr.h>
38 
39 /* stub always returning 0. */
40 DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text);
41 
42 void __init default_banner(void)
43 {
44 	printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
45 	       pv_info.name);
46 }
47 
48 #ifdef CONFIG_PARAVIRT_XXL
49 unsigned long pv_native_save_fl(void);
50 void pv_native_irq_disable(void);
51 void pv_native_irq_enable(void);
52 unsigned long pv_native_read_cr2(void);
53 
54 DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text);
55 DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text);
56 DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text);
57 DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text);
58 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
59 #endif
60 
61 static noinstr void pv_native_safe_halt(void)
62 {
63 	native_safe_halt();
64 }
65 
66 #ifdef CONFIG_PARAVIRT_XXL
67 static noinstr void pv_native_write_cr2(unsigned long val)
68 {
69 	native_write_cr2(val);
70 }
71 
72 static noinstr unsigned long pv_native_read_cr3(void)
73 {
74 	return __native_read_cr3();
75 }
76 
77 static noinstr void pv_native_write_cr3(unsigned long cr3)
78 {
79 	native_write_cr3(cr3);
80 }
81 
82 static noinstr unsigned long pv_native_get_debugreg(int regno)
83 {
84 	return native_get_debugreg(regno);
85 }
86 
87 static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
88 {
89 	native_set_debugreg(regno, val);
90 }
91 #endif
92 
93 struct pv_info pv_info = {
94 	.name = "bare hardware",
95 #ifdef CONFIG_PARAVIRT_XXL
96 	.extra_user_64bit_cs = __USER_CS,
97 #endif
98 	.io_delay = true,
99 };
100 
101 /* 64-bit pagetable entries */
102 #define PTE_IDENT	__PV_IS_CALLEE_SAVE(_paravirt_ident_64)
103 
104 struct paravirt_patch_template pv_ops = {
105 	/* Cpu ops. */
106 #ifdef CONFIG_PARAVIRT_XXL
107 	.cpu.cpuid		= native_cpuid,
108 	.cpu.get_debugreg	= pv_native_get_debugreg,
109 	.cpu.set_debugreg	= pv_native_set_debugreg,
110 	.cpu.read_cr0		= native_read_cr0,
111 	.cpu.write_cr0		= native_write_cr0,
112 	.cpu.write_cr4		= native_write_cr4,
113 	.cpu.read_msr		= native_read_msr,
114 	.cpu.write_msr		= native_write_msr,
115 	.cpu.read_msr_safe	= native_read_msr_safe,
116 	.cpu.write_msr_safe	= native_write_msr_safe,
117 	.cpu.read_pmc		= native_read_pmc,
118 	.cpu.load_tr_desc	= native_load_tr_desc,
119 	.cpu.set_ldt		= native_set_ldt,
120 	.cpu.load_gdt		= native_load_gdt,
121 	.cpu.load_idt		= native_load_idt,
122 	.cpu.store_tr		= native_store_tr,
123 	.cpu.load_tls		= native_load_tls,
124 	.cpu.load_gs_index	= native_load_gs_index,
125 	.cpu.write_ldt_entry	= native_write_ldt_entry,
126 	.cpu.write_gdt_entry	= native_write_gdt_entry,
127 	.cpu.write_idt_entry	= native_write_idt_entry,
128 
129 	.cpu.alloc_ldt		= paravirt_nop,
130 	.cpu.free_ldt		= paravirt_nop,
131 
132 	.cpu.load_sp0		= native_load_sp0,
133 
134 #ifdef CONFIG_X86_IOPL_IOPERM
135 	.cpu.invalidate_io_bitmap	= native_tss_invalidate_io_bitmap,
136 	.cpu.update_io_bitmap		= native_tss_update_io_bitmap,
137 #endif
138 
139 	.cpu.start_context_switch	= paravirt_nop,
140 	.cpu.end_context_switch		= paravirt_nop,
141 
142 	/* Irq ops. */
143 	.irq.save_fl		= __PV_IS_CALLEE_SAVE(pv_native_save_fl),
144 	.irq.irq_disable	= __PV_IS_CALLEE_SAVE(pv_native_irq_disable),
145 	.irq.irq_enable		= __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
146 #endif /* CONFIG_PARAVIRT_XXL */
147 
148 	/* Irq HLT ops. */
149 	.irq.safe_halt		= pv_native_safe_halt,
150 	.irq.halt		= native_halt,
151 
152 	/* Mmu ops. */
153 	.mmu.flush_tlb_user	= native_flush_tlb_local,
154 	.mmu.flush_tlb_kernel	= native_flush_tlb_global,
155 	.mmu.flush_tlb_one_user	= native_flush_tlb_one_user,
156 	.mmu.flush_tlb_multi	= native_flush_tlb_multi,
157 
158 	.mmu.exit_mmap		= paravirt_nop,
159 	.mmu.notify_page_enc_status_changed	= paravirt_nop,
160 
161 #ifdef CONFIG_PARAVIRT_XXL
162 	.mmu.read_cr2		= __PV_IS_CALLEE_SAVE(pv_native_read_cr2),
163 	.mmu.write_cr2		= pv_native_write_cr2,
164 	.mmu.read_cr3		= pv_native_read_cr3,
165 	.mmu.write_cr3		= pv_native_write_cr3,
166 
167 	.mmu.pgd_alloc		= __paravirt_pgd_alloc,
168 	.mmu.pgd_free		= paravirt_nop,
169 
170 	.mmu.alloc_pte		= paravirt_nop,
171 	.mmu.alloc_pmd		= paravirt_nop,
172 	.mmu.alloc_pud		= paravirt_nop,
173 	.mmu.alloc_p4d		= paravirt_nop,
174 	.mmu.release_pte	= paravirt_nop,
175 	.mmu.release_pmd	= paravirt_nop,
176 	.mmu.release_pud	= paravirt_nop,
177 	.mmu.release_p4d	= paravirt_nop,
178 
179 	.mmu.set_pte		= native_set_pte,
180 	.mmu.set_pmd		= native_set_pmd,
181 
182 	.mmu.ptep_modify_prot_start	= __ptep_modify_prot_start,
183 	.mmu.ptep_modify_prot_commit	= __ptep_modify_prot_commit,
184 
185 	.mmu.set_pud		= native_set_pud,
186 
187 	.mmu.pmd_val		= PTE_IDENT,
188 	.mmu.make_pmd		= PTE_IDENT,
189 
190 	.mmu.pud_val		= PTE_IDENT,
191 	.mmu.make_pud		= PTE_IDENT,
192 
193 	.mmu.set_p4d		= native_set_p4d,
194 
195 	.mmu.p4d_val		= PTE_IDENT,
196 	.mmu.make_p4d		= PTE_IDENT,
197 
198 	.mmu.set_pgd		= native_set_pgd,
199 
200 	.mmu.pte_val		= PTE_IDENT,
201 	.mmu.pgd_val		= PTE_IDENT,
202 
203 	.mmu.make_pte		= PTE_IDENT,
204 	.mmu.make_pgd		= PTE_IDENT,
205 
206 	.mmu.enter_mmap		= paravirt_nop,
207 
208 	.mmu.lazy_mode_flush	= paravirt_nop,
209 
210 	.mmu.set_fixmap		= native_set_fixmap,
211 #endif /* CONFIG_PARAVIRT_XXL */
212 };
213 
214 #ifdef CONFIG_PARAVIRT_XXL
215 NOKPROBE_SYMBOL(native_load_idt);
216 #endif
217 
218 EXPORT_SYMBOL(pv_ops);
219 EXPORT_SYMBOL_GPL(pv_info);
220