xref: /linux/arch/x86/kernel/mpparse.c (revision d39d0ed196aa1685bb24771e92f78633c66ac9cb)
1 /*
2  *	Intel Multiprocessor Specification 1.1 and 1.4
3  *	compliant MP-table parsing routines.
4  *
5  *	(c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6  *	(c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7  *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8  */
9 
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
21 
22 #include <asm/mtrr.h>
23 #include <asm/mpspec.h>
24 #include <asm/pgalloc.h>
25 #include <asm/io_apic.h>
26 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
28 #include <asm/e820.h>
29 #include <asm/trampoline.h>
30 #include <asm/setup.h>
31 #include <asm/smp.h>
32 
33 #include <asm/apic.h>
34 /*
35  * Checksum an MP configuration block.
36  */
37 
38 static int __init mpf_checksum(unsigned char *mp, int len)
39 {
40 	int sum = 0;
41 
42 	while (len--)
43 		sum += *mp++;
44 
45 	return sum & 0xFF;
46 }
47 
48 int __init default_mpc_apic_id(struct mpc_cpu *m)
49 {
50 	return m->apicid;
51 }
52 
53 static void __init MP_processor_info(struct mpc_cpu *m)
54 {
55 	int apicid;
56 	char *bootup_cpu = "";
57 
58 	if (!(m->cpuflag & CPU_ENABLED)) {
59 		disabled_cpus++;
60 		return;
61 	}
62 
63 	apicid = x86_init.mpparse.mpc_apic_id(m);
64 
65 	if (m->cpuflag & CPU_BOOTPROCESSOR) {
66 		bootup_cpu = " (Bootup-CPU)";
67 		boot_cpu_physical_apicid = m->apicid;
68 	}
69 
70 	printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
71 	generic_processor_info(apicid, m->apicver);
72 }
73 
74 #ifdef CONFIG_X86_IO_APIC
75 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
76 {
77 	memcpy(str, m->bustype, 6);
78 	str[6] = 0;
79 	apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
80 }
81 
82 static void __init MP_bus_info(struct mpc_bus *m)
83 {
84 	char str[7];
85 
86 	x86_init.mpparse.mpc_oem_bus_info(m, str);
87 
88 #if MAX_MP_BUSSES < 256
89 	if (m->busid >= MAX_MP_BUSSES) {
90 		printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
91 		       " is too large, max. supported is %d\n",
92 		       m->busid, str, MAX_MP_BUSSES - 1);
93 		return;
94 	}
95 #endif
96 
97 	if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
98 		set_bit(m->busid, mp_bus_not_pci);
99 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
100 		mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
101 #endif
102 	} else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
103 		if (x86_init.mpparse.mpc_oem_pci_bus)
104 			x86_init.mpparse.mpc_oem_pci_bus(m);
105 
106 		clear_bit(m->busid, mp_bus_not_pci);
107 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
108 		mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
109 	} else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
110 		mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
111 	} else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
112 		mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
113 #endif
114 	} else
115 		printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
116 }
117 
118 static void __init MP_ioapic_info(struct mpc_ioapic *m)
119 {
120 	if (!(m->flags & MPC_APIC_USABLE))
121 		return;
122 
123 	printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
124 	       m->apicid, m->apicver, m->apicaddr);
125 
126 	mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
127 }
128 
129 static void print_MP_intsrc_info(struct mpc_intsrc *m)
130 {
131 	apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
132 		" IRQ %02x, APIC ID %x, APIC INT %02x\n",
133 		m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
134 		m->srcbusirq, m->dstapic, m->dstirq);
135 }
136 
137 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
138 {
139 	apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
140 		" IRQ %02x, APIC ID %x, APIC INT %02x\n",
141 		mp_irq->irqtype, mp_irq->irqflag & 3,
142 		(mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
143 		mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
144 }
145 
146 static void __init assign_to_mp_irq(struct mpc_intsrc *m,
147 				    struct mpc_intsrc *mp_irq)
148 {
149 	mp_irq->dstapic = m->dstapic;
150 	mp_irq->type = m->type;
151 	mp_irq->irqtype = m->irqtype;
152 	mp_irq->irqflag = m->irqflag;
153 	mp_irq->srcbus = m->srcbus;
154 	mp_irq->srcbusirq = m->srcbusirq;
155 	mp_irq->dstirq = m->dstirq;
156 }
157 
158 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
159 					struct mpc_intsrc *m)
160 {
161 	m->dstapic = mp_irq->dstapic;
162 	m->type = mp_irq->type;
163 	m->irqtype = mp_irq->irqtype;
164 	m->irqflag = mp_irq->irqflag;
165 	m->srcbus = mp_irq->srcbus;
166 	m->srcbusirq = mp_irq->srcbusirq;
167 	m->dstirq = mp_irq->dstirq;
168 }
169 
170 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
171 					struct mpc_intsrc *m)
172 {
173 	if (mp_irq->dstapic != m->dstapic)
174 		return 1;
175 	if (mp_irq->type != m->type)
176 		return 2;
177 	if (mp_irq->irqtype != m->irqtype)
178 		return 3;
179 	if (mp_irq->irqflag != m->irqflag)
180 		return 4;
181 	if (mp_irq->srcbus != m->srcbus)
182 		return 5;
183 	if (mp_irq->srcbusirq != m->srcbusirq)
184 		return 6;
185 	if (mp_irq->dstirq != m->dstirq)
186 		return 7;
187 
188 	return 0;
189 }
190 
191 static void __init MP_intsrc_info(struct mpc_intsrc *m)
192 {
193 	int i;
194 
195 	print_MP_intsrc_info(m);
196 
197 	for (i = 0; i < mp_irq_entries; i++) {
198 		if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
199 			return;
200 	}
201 
202 	assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
203 	if (++mp_irq_entries == MAX_IRQ_SOURCES)
204 		panic("Max # of irq sources exceeded!!\n");
205 }
206 #else /* CONFIG_X86_IO_APIC */
207 static inline void __init MP_bus_info(struct mpc_bus *m) {}
208 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
209 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
210 #endif /* CONFIG_X86_IO_APIC */
211 
212 
213 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
214 {
215 	apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
216 		" IRQ %02x, APIC ID %x, APIC LINT %02x\n",
217 		m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
218 		m->srcbusirq, m->destapic, m->destapiclint);
219 }
220 
221 /*
222  * Read/parse the MPC
223  */
224 
225 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
226 {
227 
228 	if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
229 		printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
230 		       mpc->signature[0], mpc->signature[1],
231 		       mpc->signature[2], mpc->signature[3]);
232 		return 0;
233 	}
234 	if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
235 		printk(KERN_ERR "MPTABLE: checksum error!\n");
236 		return 0;
237 	}
238 	if (mpc->spec != 0x01 && mpc->spec != 0x04) {
239 		printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
240 		       mpc->spec);
241 		return 0;
242 	}
243 	if (!mpc->lapic) {
244 		printk(KERN_ERR "MPTABLE: null local APIC address!\n");
245 		return 0;
246 	}
247 	memcpy(oem, mpc->oem, 8);
248 	oem[8] = 0;
249 	printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
250 
251 	memcpy(str, mpc->productid, 12);
252 	str[12] = 0;
253 
254 	printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
255 
256 	printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
257 
258 	return 1;
259 }
260 
261 static void skip_entry(unsigned char **ptr, int *count, int size)
262 {
263 	*ptr += size;
264 	*count += size;
265 }
266 
267 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
268 {
269 	printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
270 		"type %x\n", *mpt);
271 	print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
272 			1, mpc, mpc->length, 1);
273 }
274 
275 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
276 
277 static void __init smp_register_lapic_address(unsigned long address)
278 {
279 	mp_lapic_addr = address;
280 
281 	set_fixmap_nocache(FIX_APIC_BASE, address);
282 	if (boot_cpu_physical_apicid == -1U) {
283 		boot_cpu_physical_apicid  = read_apic_id();
284 		apic_version[boot_cpu_physical_apicid] =
285 			 GET_APIC_VERSION(apic_read(APIC_LVR));
286 	}
287 }
288 
289 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
290 {
291 	char str[16];
292 	char oem[10];
293 
294 	int count = sizeof(*mpc);
295 	unsigned char *mpt = ((unsigned char *)mpc) + count;
296 
297 	if (!smp_check_mpc(mpc, oem, str))
298 		return 0;
299 
300 #ifdef CONFIG_X86_32
301 	generic_mps_oem_check(mpc, oem, str);
302 #endif
303 	/* save the local APIC address, it might be non-default */
304 	if (!acpi_lapic)
305 		mp_lapic_addr = mpc->lapic;
306 
307 	if (early)
308 		return 1;
309 
310 	/* Initialize the lapic mapping */
311 	if (!acpi_lapic)
312 		smp_register_lapic_address(mpc->lapic);
313 
314 	if (mpc->oemptr)
315 		x86_init.mpparse.smp_read_mpc_oem(mpc);
316 
317 	/*
318 	 *      Now process the configuration blocks.
319 	 */
320 	x86_init.mpparse.mpc_record(0);
321 
322 	while (count < mpc->length) {
323 		switch (*mpt) {
324 		case MP_PROCESSOR:
325 			/* ACPI may have already provided this data */
326 			if (!acpi_lapic)
327 				MP_processor_info((struct mpc_cpu *)mpt);
328 			skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
329 			break;
330 		case MP_BUS:
331 			MP_bus_info((struct mpc_bus *)mpt);
332 			skip_entry(&mpt, &count, sizeof(struct mpc_bus));
333 			break;
334 		case MP_IOAPIC:
335 			MP_ioapic_info((struct mpc_ioapic *)mpt);
336 			skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
337 			break;
338 		case MP_INTSRC:
339 			MP_intsrc_info((struct mpc_intsrc *)mpt);
340 			skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
341 			break;
342 		case MP_LINTSRC:
343 			MP_lintsrc_info((struct mpc_lintsrc *)mpt);
344 			skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
345 			break;
346 		default:
347 			/* wrong mptable */
348 			smp_dump_mptable(mpc, mpt);
349 			count = mpc->length;
350 			break;
351 		}
352 		x86_init.mpparse.mpc_record(1);
353 	}
354 
355 	if (!num_processors)
356 		printk(KERN_ERR "MPTABLE: no processors registered!\n");
357 	return num_processors;
358 }
359 
360 #ifdef CONFIG_X86_IO_APIC
361 
362 static int __init ELCR_trigger(unsigned int irq)
363 {
364 	unsigned int port;
365 
366 	port = 0x4d0 + (irq >> 3);
367 	return (inb(port) >> (irq & 7)) & 1;
368 }
369 
370 static void __init construct_default_ioirq_mptable(int mpc_default_type)
371 {
372 	struct mpc_intsrc intsrc;
373 	int i;
374 	int ELCR_fallback = 0;
375 
376 	intsrc.type = MP_INTSRC;
377 	intsrc.irqflag = 0;	/* conforming */
378 	intsrc.srcbus = 0;
379 	intsrc.dstapic = mp_ioapics[0].apicid;
380 
381 	intsrc.irqtype = mp_INT;
382 
383 	/*
384 	 *  If true, we have an ISA/PCI system with no IRQ entries
385 	 *  in the MP table. To prevent the PCI interrupts from being set up
386 	 *  incorrectly, we try to use the ELCR. The sanity check to see if
387 	 *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
388 	 *  never be level sensitive, so we simply see if the ELCR agrees.
389 	 *  If it does, we assume it's valid.
390 	 */
391 	if (mpc_default_type == 5) {
392 		printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
393 		       "falling back to ELCR\n");
394 
395 		if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
396 		    ELCR_trigger(13))
397 			printk(KERN_ERR "ELCR contains invalid data... "
398 			       "not using ELCR\n");
399 		else {
400 			printk(KERN_INFO
401 			       "Using ELCR to identify PCI interrupts\n");
402 			ELCR_fallback = 1;
403 		}
404 	}
405 
406 	for (i = 0; i < 16; i++) {
407 		switch (mpc_default_type) {
408 		case 2:
409 			if (i == 0 || i == 13)
410 				continue;	/* IRQ0 & IRQ13 not connected */
411 			/* fall through */
412 		default:
413 			if (i == 2)
414 				continue;	/* IRQ2 is never connected */
415 		}
416 
417 		if (ELCR_fallback) {
418 			/*
419 			 *  If the ELCR indicates a level-sensitive interrupt, we
420 			 *  copy that information over to the MP table in the
421 			 *  irqflag field (level sensitive, active high polarity).
422 			 */
423 			if (ELCR_trigger(i))
424 				intsrc.irqflag = 13;
425 			else
426 				intsrc.irqflag = 0;
427 		}
428 
429 		intsrc.srcbusirq = i;
430 		intsrc.dstirq = i ? i : 2;	/* IRQ0 to INTIN2 */
431 		MP_intsrc_info(&intsrc);
432 	}
433 
434 	intsrc.irqtype = mp_ExtINT;
435 	intsrc.srcbusirq = 0;
436 	intsrc.dstirq = 0;	/* 8259A to INTIN0 */
437 	MP_intsrc_info(&intsrc);
438 }
439 
440 
441 static void __init construct_ioapic_table(int mpc_default_type)
442 {
443 	struct mpc_ioapic ioapic;
444 	struct mpc_bus bus;
445 
446 	bus.type = MP_BUS;
447 	bus.busid = 0;
448 	switch (mpc_default_type) {
449 	default:
450 		printk(KERN_ERR "???\nUnknown standard configuration %d\n",
451 		       mpc_default_type);
452 		/* fall through */
453 	case 1:
454 	case 5:
455 		memcpy(bus.bustype, "ISA   ", 6);
456 		break;
457 	case 2:
458 	case 6:
459 	case 3:
460 		memcpy(bus.bustype, "EISA  ", 6);
461 		break;
462 	case 4:
463 	case 7:
464 		memcpy(bus.bustype, "MCA   ", 6);
465 	}
466 	MP_bus_info(&bus);
467 	if (mpc_default_type > 4) {
468 		bus.busid = 1;
469 		memcpy(bus.bustype, "PCI   ", 6);
470 		MP_bus_info(&bus);
471 	}
472 
473 	ioapic.type	= MP_IOAPIC;
474 	ioapic.apicid	= 2;
475 	ioapic.apicver	= mpc_default_type > 4 ? 0x10 : 0x01;
476 	ioapic.flags	= MPC_APIC_USABLE;
477 	ioapic.apicaddr	= IO_APIC_DEFAULT_PHYS_BASE;
478 	MP_ioapic_info(&ioapic);
479 
480 	/*
481 	 * We set up most of the low 16 IO-APIC pins according to MPS rules.
482 	 */
483 	construct_default_ioirq_mptable(mpc_default_type);
484 }
485 #else
486 static inline void __init construct_ioapic_table(int mpc_default_type) { }
487 #endif
488 
489 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
490 {
491 	struct mpc_cpu processor;
492 	struct mpc_lintsrc lintsrc;
493 	int linttypes[2] = { mp_ExtINT, mp_NMI };
494 	int i;
495 
496 	/*
497 	 * local APIC has default address
498 	 */
499 	mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
500 
501 	/*
502 	 * 2 CPUs, numbered 0 & 1.
503 	 */
504 	processor.type = MP_PROCESSOR;
505 	/* Either an integrated APIC or a discrete 82489DX. */
506 	processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
507 	processor.cpuflag = CPU_ENABLED;
508 	processor.cpufeature = (boot_cpu_data.x86 << 8) |
509 	    (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
510 	processor.featureflag = boot_cpu_data.x86_capability[0];
511 	processor.reserved[0] = 0;
512 	processor.reserved[1] = 0;
513 	for (i = 0; i < 2; i++) {
514 		processor.apicid = i;
515 		MP_processor_info(&processor);
516 	}
517 
518 	construct_ioapic_table(mpc_default_type);
519 
520 	lintsrc.type = MP_LINTSRC;
521 	lintsrc.irqflag = 0;		/* conforming */
522 	lintsrc.srcbusid = 0;
523 	lintsrc.srcbusirq = 0;
524 	lintsrc.destapic = MP_APIC_ALL;
525 	for (i = 0; i < 2; i++) {
526 		lintsrc.irqtype = linttypes[i];
527 		lintsrc.destapiclint = i;
528 		MP_lintsrc_info(&lintsrc);
529 	}
530 }
531 
532 static struct mpf_intel *mpf_found;
533 
534 static unsigned long __init get_mpc_size(unsigned long physptr)
535 {
536 	struct mpc_table *mpc;
537 	unsigned long size;
538 
539 	mpc = early_ioremap(physptr, PAGE_SIZE);
540 	size = mpc->length;
541 	early_iounmap(mpc, PAGE_SIZE);
542 	apic_printk(APIC_VERBOSE, "  mpc: %lx-%lx\n", physptr, physptr + size);
543 
544 	return size;
545 }
546 
547 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
548 {
549 	struct mpc_table *mpc;
550 	unsigned long size;
551 
552 	size = get_mpc_size(mpf->physptr);
553 	mpc = early_ioremap(mpf->physptr, size);
554 	/*
555 	 * Read the physical hardware table.  Anything here will
556 	 * override the defaults.
557 	 */
558 	if (!smp_read_mpc(mpc, early)) {
559 #ifdef CONFIG_X86_LOCAL_APIC
560 		smp_found_config = 0;
561 #endif
562 		printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
563 			"... disabling SMP support. (tell your hw vendor)\n");
564 		early_iounmap(mpc, size);
565 		return -1;
566 	}
567 	early_iounmap(mpc, size);
568 
569 	if (early)
570 		return -1;
571 
572 #ifdef CONFIG_X86_IO_APIC
573 	/*
574 	 * If there are no explicit MP IRQ entries, then we are
575 	 * broken.  We set up most of the low 16 IO-APIC pins to
576 	 * ISA defaults and hope it will work.
577 	 */
578 	if (!mp_irq_entries) {
579 		struct mpc_bus bus;
580 
581 		printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
582 		       "using default mptable. (tell your hw vendor)\n");
583 
584 		bus.type = MP_BUS;
585 		bus.busid = 0;
586 		memcpy(bus.bustype, "ISA   ", 6);
587 		MP_bus_info(&bus);
588 
589 		construct_default_ioirq_mptable(0);
590 	}
591 #endif
592 
593 	return 0;
594 }
595 
596 /*
597  * Scan the memory blocks for an SMP configuration block.
598  */
599 void __init default_get_smp_config(unsigned int early)
600 {
601 	struct mpf_intel *mpf = mpf_found;
602 
603 	if (!mpf)
604 		return;
605 
606 	if (acpi_lapic && early)
607 		return;
608 
609 	/*
610 	 * MPS doesn't support hyperthreading, aka only have
611 	 * thread 0 apic id in MPS table
612 	 */
613 	if (acpi_lapic && acpi_ioapic)
614 		return;
615 
616 	printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
617 	       mpf->specification);
618 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
619 	if (mpf->feature2 & (1 << 7)) {
620 		printk(KERN_INFO "    IMCR and PIC compatibility mode.\n");
621 		pic_mode = 1;
622 	} else {
623 		printk(KERN_INFO "    Virtual Wire compatibility mode.\n");
624 		pic_mode = 0;
625 	}
626 #endif
627 	/*
628 	 * Now see if we need to read further.
629 	 */
630 	if (mpf->feature1 != 0) {
631 		if (early) {
632 			/*
633 			 * local APIC has default address
634 			 */
635 			mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
636 			return;
637 		}
638 
639 		printk(KERN_INFO "Default MP configuration #%d\n",
640 		       mpf->feature1);
641 		construct_default_ISA_mptable(mpf->feature1);
642 
643 	} else if (mpf->physptr) {
644 		if (check_physptr(mpf, early))
645 			return;
646 	} else
647 		BUG();
648 
649 	if (!early)
650 		printk(KERN_INFO "Processors: %d\n", num_processors);
651 	/*
652 	 * Only use the first configuration found.
653 	 */
654 }
655 
656 static void __init smp_reserve_memory(struct mpf_intel *mpf)
657 {
658 	unsigned long size = get_mpc_size(mpf->physptr);
659 
660 	reserve_early_overlap_ok(mpf->physptr, mpf->physptr+size, "MP-table mpc");
661 }
662 
663 static int __init smp_scan_config(unsigned long base, unsigned long length)
664 {
665 	unsigned int *bp = phys_to_virt(base);
666 	struct mpf_intel *mpf;
667 	unsigned long mem;
668 
669 	apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
670 			bp, length);
671 	BUILD_BUG_ON(sizeof(*mpf) != 16);
672 
673 	while (length > 0) {
674 		mpf = (struct mpf_intel *)bp;
675 		if ((*bp == SMP_MAGIC_IDENT) &&
676 		    (mpf->length == 1) &&
677 		    !mpf_checksum((unsigned char *)bp, 16) &&
678 		    ((mpf->specification == 1)
679 		     || (mpf->specification == 4))) {
680 #ifdef CONFIG_X86_LOCAL_APIC
681 			smp_found_config = 1;
682 #endif
683 			mpf_found = mpf;
684 
685 			printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
686 			       mpf, (u64)virt_to_phys(mpf));
687 
688 			mem = virt_to_phys(mpf);
689 			reserve_early_overlap_ok(mem, mem + sizeof(*mpf), "MP-table mpf");
690 			if (mpf->physptr)
691 				smp_reserve_memory(mpf);
692 
693 			return 1;
694 		}
695 		bp += 4;
696 		length -= 16;
697 	}
698 	return 0;
699 }
700 
701 void __init default_find_smp_config(void)
702 {
703 	unsigned int address;
704 
705 	/*
706 	 * FIXME: Linux assumes you have 640K of base ram..
707 	 * this continues the error...
708 	 *
709 	 * 1) Scan the bottom 1K for a signature
710 	 * 2) Scan the top 1K of base RAM
711 	 * 3) Scan the 64K of bios
712 	 */
713 	if (smp_scan_config(0x0, 0x400) ||
714 	    smp_scan_config(639 * 0x400, 0x400) ||
715 	    smp_scan_config(0xF0000, 0x10000))
716 		return;
717 	/*
718 	 * If it is an SMP machine we should know now, unless the
719 	 * configuration is in an EISA/MCA bus machine with an
720 	 * extended bios data area.
721 	 *
722 	 * there is a real-mode segmented pointer pointing to the
723 	 * 4K EBDA area at 0x40E, calculate and scan it here.
724 	 *
725 	 * NOTE! There are Linux loaders that will corrupt the EBDA
726 	 * area, and as such this kind of SMP config may be less
727 	 * trustworthy, simply because the SMP table may have been
728 	 * stomped on during early boot. These loaders are buggy and
729 	 * should be fixed.
730 	 *
731 	 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
732 	 */
733 
734 	address = get_bios_ebda();
735 	if (address)
736 		smp_scan_config(address, 0x400);
737 }
738 
739 #ifdef CONFIG_X86_IO_APIC
740 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
741 
742 static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
743 {
744 	int i;
745 
746 	if (m->irqtype != mp_INT)
747 		return 0;
748 
749 	if (m->irqflag != 0x0f)
750 		return 0;
751 
752 	/* not legacy */
753 
754 	for (i = 0; i < mp_irq_entries; i++) {
755 		if (mp_irqs[i].irqtype != mp_INT)
756 			continue;
757 
758 		if (mp_irqs[i].irqflag != 0x0f)
759 			continue;
760 
761 		if (mp_irqs[i].srcbus != m->srcbus)
762 			continue;
763 		if (mp_irqs[i].srcbusirq != m->srcbusirq)
764 			continue;
765 		if (irq_used[i]) {
766 			/* already claimed */
767 			return -2;
768 		}
769 		irq_used[i] = 1;
770 		return i;
771 	}
772 
773 	/* not found */
774 	return -1;
775 }
776 
777 #define SPARE_SLOT_NUM 20
778 
779 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
780 
781 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
782 {
783 	int i;
784 
785 	apic_printk(APIC_VERBOSE, "OLD ");
786 	print_MP_intsrc_info(m);
787 
788 	i = get_MP_intsrc_index(m);
789 	if (i > 0) {
790 		assign_to_mpc_intsrc(&mp_irqs[i], m);
791 		apic_printk(APIC_VERBOSE, "NEW ");
792 		print_mp_irq_info(&mp_irqs[i]);
793 		return;
794 	}
795 	if (!i) {
796 		/* legacy, do nothing */
797 		return;
798 	}
799 	if (*nr_m_spare < SPARE_SLOT_NUM) {
800 		/*
801 		 * not found (-1), or duplicated (-2) are invalid entries,
802 		 * we need to use the slot later
803 		 */
804 		m_spare[*nr_m_spare] = m;
805 		*nr_m_spare += 1;
806 	}
807 }
808 #else /* CONFIG_X86_IO_APIC */
809 static
810 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
811 #endif /* CONFIG_X86_IO_APIC */
812 
813 static int
814 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
815 {
816 	int ret = 0;
817 
818 	if (!mpc_new_phys || count <= mpc_new_length) {
819 		WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
820 		return -1;
821 	}
822 
823 	return ret;
824 }
825 
826 static int  __init replace_intsrc_all(struct mpc_table *mpc,
827 					unsigned long mpc_new_phys,
828 					unsigned long mpc_new_length)
829 {
830 #ifdef CONFIG_X86_IO_APIC
831 	int i;
832 #endif
833 	int count = sizeof(*mpc);
834 	int nr_m_spare = 0;
835 	unsigned char *mpt = ((unsigned char *)mpc) + count;
836 
837 	printk(KERN_INFO "mpc_length %x\n", mpc->length);
838 	while (count < mpc->length) {
839 		switch (*mpt) {
840 		case MP_PROCESSOR:
841 			skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
842 			break;
843 		case MP_BUS:
844 			skip_entry(&mpt, &count, sizeof(struct mpc_bus));
845 			break;
846 		case MP_IOAPIC:
847 			skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
848 			break;
849 		case MP_INTSRC:
850 			check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
851 			skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
852 			break;
853 		case MP_LINTSRC:
854 			skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
855 			break;
856 		default:
857 			/* wrong mptable */
858 			smp_dump_mptable(mpc, mpt);
859 			goto out;
860 		}
861 	}
862 
863 #ifdef CONFIG_X86_IO_APIC
864 	for (i = 0; i < mp_irq_entries; i++) {
865 		if (irq_used[i])
866 			continue;
867 
868 		if (mp_irqs[i].irqtype != mp_INT)
869 			continue;
870 
871 		if (mp_irqs[i].irqflag != 0x0f)
872 			continue;
873 
874 		if (nr_m_spare > 0) {
875 			apic_printk(APIC_VERBOSE, "*NEW* found\n");
876 			nr_m_spare--;
877 			assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
878 			m_spare[nr_m_spare] = NULL;
879 		} else {
880 			struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
881 			count += sizeof(struct mpc_intsrc);
882 			if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
883 				goto out;
884 			assign_to_mpc_intsrc(&mp_irqs[i], m);
885 			mpc->length = count;
886 			mpt += sizeof(struct mpc_intsrc);
887 		}
888 		print_mp_irq_info(&mp_irqs[i]);
889 	}
890 #endif
891 out:
892 	/* update checksum */
893 	mpc->checksum = 0;
894 	mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
895 
896 	return 0;
897 }
898 
899 int enable_update_mptable;
900 
901 static int __init update_mptable_setup(char *str)
902 {
903 	enable_update_mptable = 1;
904 #ifdef CONFIG_PCI
905 	pci_routeirq = 1;
906 #endif
907 	return 0;
908 }
909 early_param("update_mptable", update_mptable_setup);
910 
911 static unsigned long __initdata mpc_new_phys;
912 static unsigned long mpc_new_length __initdata = 4096;
913 
914 /* alloc_mptable or alloc_mptable=4k */
915 static int __initdata alloc_mptable;
916 static int __init parse_alloc_mptable_opt(char *p)
917 {
918 	enable_update_mptable = 1;
919 #ifdef CONFIG_PCI
920 	pci_routeirq = 1;
921 #endif
922 	alloc_mptable = 1;
923 	if (!p)
924 		return 0;
925 	mpc_new_length = memparse(p, &p);
926 	return 0;
927 }
928 early_param("alloc_mptable", parse_alloc_mptable_opt);
929 
930 void __init early_reserve_e820_mpc_new(void)
931 {
932 	if (enable_update_mptable && alloc_mptable) {
933 		u64 startt = 0;
934 		mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
935 	}
936 }
937 
938 static int __init update_mp_table(void)
939 {
940 	char str[16];
941 	char oem[10];
942 	struct mpf_intel *mpf;
943 	struct mpc_table *mpc, *mpc_new;
944 
945 	if (!enable_update_mptable)
946 		return 0;
947 
948 	mpf = mpf_found;
949 	if (!mpf)
950 		return 0;
951 
952 	/*
953 	 * Now see if we need to go further.
954 	 */
955 	if (mpf->feature1 != 0)
956 		return 0;
957 
958 	if (!mpf->physptr)
959 		return 0;
960 
961 	mpc = phys_to_virt(mpf->physptr);
962 
963 	if (!smp_check_mpc(mpc, oem, str))
964 		return 0;
965 
966 	printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
967 	printk(KERN_INFO "physptr: %x\n", mpf->physptr);
968 
969 	if (mpc_new_phys && mpc->length > mpc_new_length) {
970 		mpc_new_phys = 0;
971 		printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
972 			 mpc_new_length);
973 	}
974 
975 	if (!mpc_new_phys) {
976 		unsigned char old, new;
977 		/* check if we can change the postion */
978 		mpc->checksum = 0;
979 		old = mpf_checksum((unsigned char *)mpc, mpc->length);
980 		mpc->checksum = 0xff;
981 		new = mpf_checksum((unsigned char *)mpc, mpc->length);
982 		if (old == new) {
983 			printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
984 			return 0;
985 		}
986 		printk(KERN_INFO "use in-positon replacing\n");
987 	} else {
988 		mpf->physptr = mpc_new_phys;
989 		mpc_new = phys_to_virt(mpc_new_phys);
990 		memcpy(mpc_new, mpc, mpc->length);
991 		mpc = mpc_new;
992 		/* check if we can modify that */
993 		if (mpc_new_phys - mpf->physptr) {
994 			struct mpf_intel *mpf_new;
995 			/* steal 16 bytes from [0, 1k) */
996 			printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
997 			mpf_new = phys_to_virt(0x400 - 16);
998 			memcpy(mpf_new, mpf, 16);
999 			mpf = mpf_new;
1000 			mpf->physptr = mpc_new_phys;
1001 		}
1002 		mpf->checksum = 0;
1003 		mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1004 		printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
1005 	}
1006 
1007 	/*
1008 	 * only replace the one with mp_INT and
1009 	 *	 MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1010 	 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1011 	 * may need pci=routeirq for all coverage
1012 	 */
1013 	replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1014 
1015 	return 0;
1016 }
1017 
1018 late_initcall(update_mp_table);
1019