xref: /linux/arch/x86/kernel/head_32.S (revision 71ca97da9d027009d318d319cbacf54a72f666c1) 
1/*
2 *
3 *  Copyright (C) 1991, 1992  Linus Torvalds
4 *
5 *  Enhanced CPU detection and feature setting code by Mike Jagdis
6 *  and Martin Mares, November 1997.
7 */
8
9.text
10#include <linux/threads.h>
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page_types.h>
15#include <asm/pgtable_types.h>
16#include <asm/cache.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/setup.h>
20#include <asm/processor-flags.h>
21#include <asm/msr-index.h>
22#include <asm/cpufeature.h>
23#include <asm/percpu.h>
24#include <asm/nops.h>
25
26/* Physical address */
27#define pa(X) ((X) - __PAGE_OFFSET)
28
29/*
30 * References to members of the new_cpu_data structure.
31 */
32
33#define X86		new_cpu_data+CPUINFO_x86
34#define X86_VENDOR	new_cpu_data+CPUINFO_x86_vendor
35#define X86_MODEL	new_cpu_data+CPUINFO_x86_model
36#define X86_MASK	new_cpu_data+CPUINFO_x86_mask
37#define X86_HARD_MATH	new_cpu_data+CPUINFO_hard_math
38#define X86_CPUID	new_cpu_data+CPUINFO_cpuid_level
39#define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability
40#define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id
41
42/*
43 * This is how much memory in addition to the memory covered up to
44 * and including _end we need mapped initially.
45 * We need:
46 *     (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
47 *     (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
48 *
49 * Modulo rounding, each megabyte assigned here requires a kilobyte of
50 * memory, which is currently unreclaimed.
51 *
52 * This should be a multiple of a page.
53 *
54 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
55 * and small than max_low_pfn, otherwise will waste some page table entries
56 */
57
58#if PTRS_PER_PMD > 1
59#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
60#else
61#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
62#endif
63
64/* Number of possible pages in the lowmem region */
65LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
66
67/* Enough space to fit pagetables for the low memory linear map */
68MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
69
70/*
71 * Worst-case size of the kernel mapping we need to make:
72 * a relocatable kernel can live anywhere in lowmem, so we need to be able
73 * to map all of lowmem.
74 */
75KERNEL_PAGES = LOWMEM_PAGES
76
77INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
78RESERVE_BRK(pagetables, INIT_MAP_SIZE)
79
80/*
81 * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
82 * %esi points to the real-mode code as a 32-bit pointer.
83 * CS and DS must be 4 GB flat segments, but we don't depend on
84 * any particular GDT layout, because we load our own as soon as we
85 * can.
86 */
87__HEAD
88ENTRY(startup_32)
89	movl pa(stack_start),%ecx
90
91	/* test KEEP_SEGMENTS flag to see if the bootloader is asking
92		us to not reload segments */
93	testb $(1<<6), BP_loadflags(%esi)
94	jnz 2f
95
96/*
97 * Set segments to known values.
98 */
99	lgdt pa(boot_gdt_descr)
100	movl $(__BOOT_DS),%eax
101	movl %eax,%ds
102	movl %eax,%es
103	movl %eax,%fs
104	movl %eax,%gs
105	movl %eax,%ss
1062:
107	leal -__PAGE_OFFSET(%ecx),%esp
108
109/*
110 * Clear BSS first so that there are no surprises...
111 */
112	cld
113	xorl %eax,%eax
114	movl $pa(__bss_start),%edi
115	movl $pa(__bss_stop),%ecx
116	subl %edi,%ecx
117	shrl $2,%ecx
118	rep ; stosl
119/*
120 * Copy bootup parameters out of the way.
121 * Note: %esi still has the pointer to the real-mode data.
122 * With the kexec as boot loader, parameter segment might be loaded beyond
123 * kernel image and might not even be addressable by early boot page tables.
124 * (kexec on panic case). Hence copy out the parameters before initializing
125 * page tables.
126 */
127	movl $pa(boot_params),%edi
128	movl $(PARAM_SIZE/4),%ecx
129	cld
130	rep
131	movsl
132	movl pa(boot_params) + NEW_CL_POINTER,%esi
133	andl %esi,%esi
134	jz 1f			# No command line
135	movl $pa(boot_command_line),%edi
136	movl $(COMMAND_LINE_SIZE/4),%ecx
137	rep
138	movsl
1391:
140
141#ifdef CONFIG_OLPC
142	/* save OFW's pgdir table for later use when calling into OFW */
143	movl %cr3, %eax
144	movl %eax, pa(olpc_ofw_pgd)
145#endif
146
147/*
148 * Initialize page tables.  This creates a PDE and a set of page
149 * tables, which are located immediately beyond __brk_base.  The variable
150 * _brk_end is set up to point to the first "safe" location.
151 * Mappings are created both at virtual address 0 (identity mapping)
152 * and PAGE_OFFSET for up to _end.
153 */
154#ifdef CONFIG_X86_PAE
155
156	/*
157	 * In PAE mode initial_page_table is statically defined to contain
158	 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
159	 * entries). The identity mapping is handled by pointing two PGD entries
160	 * to the first kernel PMD.
161	 *
162	 * Note the upper half of each PMD or PTE are always zero at this stage.
163	 */
164
165#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
166
167	xorl %ebx,%ebx				/* %ebx is kept at zero */
168
169	movl $pa(__brk_base), %edi
170	movl $pa(initial_pg_pmd), %edx
171	movl $PTE_IDENT_ATTR, %eax
17210:
173	leal PDE_IDENT_ATTR(%edi),%ecx		/* Create PMD entry */
174	movl %ecx,(%edx)			/* Store PMD entry */
175						/* Upper half already zero */
176	addl $8,%edx
177	movl $512,%ecx
17811:
179	stosl
180	xchgl %eax,%ebx
181	stosl
182	xchgl %eax,%ebx
183	addl $0x1000,%eax
184	loop 11b
185
186	/*
187	 * End condition: we must map up to the end + MAPPING_BEYOND_END.
188	 */
189	movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
190	cmpl %ebp,%eax
191	jb 10b
1921:
193	addl $__PAGE_OFFSET, %edi
194	movl %edi, pa(_brk_end)
195	shrl $12, %eax
196	movl %eax, pa(max_pfn_mapped)
197
198	/* Do early initialization of the fixmap area */
199	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
200	movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
201#else	/* Not PAE */
202
203page_pde_offset = (__PAGE_OFFSET >> 20);
204
205	movl $pa(__brk_base), %edi
206	movl $pa(initial_page_table), %edx
207	movl $PTE_IDENT_ATTR, %eax
20810:
209	leal PDE_IDENT_ATTR(%edi),%ecx		/* Create PDE entry */
210	movl %ecx,(%edx)			/* Store identity PDE entry */
211	movl %ecx,page_pde_offset(%edx)		/* Store kernel PDE entry */
212	addl $4,%edx
213	movl $1024, %ecx
21411:
215	stosl
216	addl $0x1000,%eax
217	loop 11b
218	/*
219	 * End condition: we must map up to the end + MAPPING_BEYOND_END.
220	 */
221	movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
222	cmpl %ebp,%eax
223	jb 10b
224	addl $__PAGE_OFFSET, %edi
225	movl %edi, pa(_brk_end)
226	shrl $12, %eax
227	movl %eax, pa(max_pfn_mapped)
228
229	/* Do early initialization of the fixmap area */
230	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
231	movl %eax,pa(initial_page_table+0xffc)
232#endif
233
234#ifdef CONFIG_PARAVIRT
235	/* This is can only trip for a broken bootloader... */
236	cmpw $0x207, pa(boot_params + BP_version)
237	jb default_entry
238
239	/* Paravirt-compatible boot parameters.  Look to see what architecture
240		we're booting under. */
241	movl pa(boot_params + BP_hardware_subarch), %eax
242	cmpl $num_subarch_entries, %eax
243	jae bad_subarch
244
245	movl pa(subarch_entries)(,%eax,4), %eax
246	subl $__PAGE_OFFSET, %eax
247	jmp *%eax
248
249bad_subarch:
250WEAK(lguest_entry)
251WEAK(xen_entry)
252	/* Unknown implementation; there's really
253	   nothing we can do at this point. */
254	ud2a
255
256	__INITDATA
257
258subarch_entries:
259	.long default_entry		/* normal x86/PC */
260	.long lguest_entry		/* lguest hypervisor */
261	.long xen_entry			/* Xen hypervisor */
262	.long default_entry		/* Moorestown MID */
263num_subarch_entries = (. - subarch_entries) / 4
264.previous
265#else
266	jmp default_entry
267#endif /* CONFIG_PARAVIRT */
268
269/*
270 * Non-boot CPU entry point; entered from trampoline.S
271 * We can't lgdt here, because lgdt itself uses a data segment, but
272 * we know the trampoline has already loaded the boot_gdt for us.
273 *
274 * If cpu hotplug is not supported then this code can go in init section
275 * which will be freed later
276 */
277
278__CPUINIT
279
280#ifdef CONFIG_SMP
281ENTRY(startup_32_smp)
282	cld
283	movl $(__BOOT_DS),%eax
284	movl %eax,%ds
285	movl %eax,%es
286	movl %eax,%fs
287	movl %eax,%gs
288	movl pa(stack_start),%ecx
289	movl %eax,%ss
290	leal -__PAGE_OFFSET(%ecx),%esp
291#endif /* CONFIG_SMP */
292default_entry:
293
294/*
295 *	New page tables may be in 4Mbyte page mode and may
296 *	be using the global pages.
297 *
298 *	NOTE! If we are on a 486 we may have no cr4 at all!
299 *	So we do not try to touch it unless we really have
300 *	some bits in it to set.  This won't work if the BSP
301 *	implements cr4 but this AP does not -- very unlikely
302 *	but be warned!  The same applies to the pse feature
303 *	if not equally supported. --macro
304 *
305 *	NOTE! We have to correct for the fact that we're
306 *	not yet offset PAGE_OFFSET..
307 */
308#define cr4_bits pa(mmu_cr4_features)
309	movl cr4_bits,%edx
310	andl %edx,%edx
311	jz 6f
312	movl %cr4,%eax		# Turn on paging options (PSE,PAE,..)
313	orl %edx,%eax
314	movl %eax,%cr4
315
316	testb $X86_CR4_PAE, %al		# check if PAE is enabled
317	jz 6f
318
319	/* Check if extended functions are implemented */
320	movl $0x80000000, %eax
321	cpuid
322	/* Value must be in the range 0x80000001 to 0x8000ffff */
323	subl $0x80000001, %eax
324	cmpl $(0x8000ffff-0x80000001), %eax
325	ja 6f
326
327	/* Clear bogus XD_DISABLE bits */
328	call verify_cpu
329
330	mov $0x80000001, %eax
331	cpuid
332	/* Execute Disable bit supported? */
333	btl $(X86_FEATURE_NX & 31), %edx
334	jnc 6f
335
336	/* Setup EFER (Extended Feature Enable Register) */
337	movl $MSR_EFER, %ecx
338	rdmsr
339
340	btsl $_EFER_NX, %eax
341	/* Make changes effective */
342	wrmsr
343
3446:
345
346/*
347 * Enable paging
348 */
349	movl $pa(initial_page_table), %eax
350	movl %eax,%cr3		/* set the page table pointer.. */
351	movl %cr0,%eax
352	orl  $X86_CR0_PG,%eax
353	movl %eax,%cr0		/* ..and set paging (PG) bit */
354	ljmp $__BOOT_CS,$1f	/* Clear prefetch and normalize %eip */
3551:
356	/* Shift the stack pointer to a virtual address */
357	addl $__PAGE_OFFSET, %esp
358
359/*
360 * Initialize eflags.  Some BIOS's leave bits like NT set.  This would
361 * confuse the debugger if this code is traced.
362 * XXX - best to initialize before switching to protected mode.
363 */
364	pushl $0
365	popfl
366
367/*
368 * start system 32-bit setup. We need to re-do some of the things done
369 * in 16-bit mode for the "real" operations.
370 */
371	movl setup_once_ref,%eax
372	andl %eax,%eax
373	jz 1f				# Did we do this already?
374	call *%eax
3751:
376
377/* check if it is 486 or 386. */
378/*
379 * XXX - this does a lot of unnecessary setup.  Alignment checks don't
380 * apply at our cpl of 0 and the stack ought to be aligned already, and
381 * we don't need to preserve eflags.
382 */
383	movl $-1,X86_CPUID	# -1 for no CPUID initially
384	movb $3,X86		# at least 386
385	pushfl			# push EFLAGS
386	popl %eax		# get EFLAGS
387	movl %eax,%ecx		# save original EFLAGS
388	xorl $0x240000,%eax	# flip AC and ID bits in EFLAGS
389	pushl %eax		# copy to EFLAGS
390	popfl			# set EFLAGS
391	pushfl			# get new EFLAGS
392	popl %eax		# put it in eax
393	xorl %ecx,%eax		# change in flags
394	pushl %ecx		# restore original EFLAGS
395	popfl
396	testl $0x40000,%eax	# check if AC bit changed
397	je is386
398
399	movb $4,X86		# at least 486
400	testl $0x200000,%eax	# check if ID bit changed
401	je is486
402
403	/* get vendor info */
404	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
405	cpuid
406	movl %eax,X86_CPUID		# save CPUID level
407	movl %ebx,X86_VENDOR_ID		# lo 4 chars
408	movl %edx,X86_VENDOR_ID+4	# next 4 chars
409	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
410
411	orl %eax,%eax			# do we have processor info as well?
412	je is486
413
414	movl $1,%eax		# Use the CPUID instruction to get CPU type
415	cpuid
416	movb %al,%cl		# save reg for future use
417	andb $0x0f,%ah		# mask processor family
418	movb %ah,X86
419	andb $0xf0,%al		# mask model
420	shrb $4,%al
421	movb %al,X86_MODEL
422	andb $0x0f,%cl		# mask mask revision
423	movb %cl,X86_MASK
424	movl %edx,X86_CAPABILITY
425
426is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
427	jmp 2f
428
429is386:	movl $2,%ecx		# set MP
4302:	movl %cr0,%eax
431	andl $0x80000011,%eax	# Save PG,PE,ET
432	orl %ecx,%eax
433	movl %eax,%cr0
434
435	call check_x87
436	lgdt early_gdt_descr
437	lidt idt_descr
438	ljmp $(__KERNEL_CS),$1f
4391:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
440	movl %eax,%ss			# after changing gdt.
441
442	movl $(__USER_DS),%eax		# DS/ES contains default USER segment
443	movl %eax,%ds
444	movl %eax,%es
445
446	movl $(__KERNEL_PERCPU), %eax
447	movl %eax,%fs			# set this cpu's percpu
448
449	movl $(__KERNEL_STACK_CANARY),%eax
450	movl %eax,%gs
451
452	xorl %eax,%eax			# Clear LDT
453	lldt %ax
454
455	cld			# gcc2 wants the direction flag cleared at all times
456	pushl $0		# fake return address for unwinder
457	jmp *(initial_code)
458
459/*
460 * We depend on ET to be correct. This checks for 287/387.
461 */
462check_x87:
463	movb $0,X86_HARD_MATH
464	clts
465	fninit
466	fstsw %ax
467	cmpb $0,%al
468	je 1f
469	movl %cr0,%eax		/* no coprocessor: have to set bits */
470	xorl $4,%eax		/* set EM */
471	movl %eax,%cr0
472	ret
473	ALIGN
4741:	movb $1,X86_HARD_MATH
475	.byte 0xDB,0xE4		/* fsetpm for 287, ignored by 387 */
476	ret
477
478
479#include "verify_cpu.S"
480
481/*
482 *  setup_once
483 *
484 *  The setup work we only want to run on the BSP.
485 *
486 *  Warning: %esi is live across this function.
487 */
488__INIT
489setup_once:
490	/*
491	 * Set up a idt with 256 entries pointing to ignore_int,
492	 * interrupt gates. It doesn't actually load idt - that needs
493	 * to be done on each CPU. Interrupts are enabled elsewhere,
494	 * when we can be relatively sure everything is ok.
495	 */
496
497	movl $idt_table,%edi
498	movl $early_idt_handlers,%eax
499	movl $NUM_EXCEPTION_VECTORS,%ecx
5001:
501	movl %eax,(%edi)
502	movl %eax,4(%edi)
503	/* interrupt gate, dpl=0, present */
504	movl $(0x8E000000 + __KERNEL_CS),2(%edi)
505	addl $9,%eax
506	addl $8,%edi
507	loop 1b
508
509	movl $256 - NUM_EXCEPTION_VECTORS,%ecx
510	movl $ignore_int,%edx
511	movl $(__KERNEL_CS << 16),%eax
512	movw %dx,%ax		/* selector = 0x0010 = cs */
513	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
5142:
515	movl %eax,(%edi)
516	movl %edx,4(%edi)
517	addl $8,%edi
518	loop 2b
519
520#ifdef CONFIG_CC_STACKPROTECTOR
521	/*
522	 * Configure the stack canary. The linker can't handle this by
523	 * relocation.  Manually set base address in stack canary
524	 * segment descriptor.
525	 */
526	movl $gdt_page,%eax
527	movl $stack_canary,%ecx
528	movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
529	shrl $16, %ecx
530	movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
531	movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
532#endif
533
534	andl $0,setup_once_ref	/* Once is enough, thanks */
535	ret
536
537ENTRY(early_idt_handlers)
538	# 36(%esp) %eflags
539	# 32(%esp) %cs
540	# 28(%esp) %eip
541	# 24(%rsp) error code
542	i = 0
543	.rept NUM_EXCEPTION_VECTORS
544	.if (EXCEPTION_ERRCODE_MASK >> i) & 1
545	ASM_NOP2
546	.else
547	pushl $0		# Dummy error code, to make stack frame uniform
548	.endif
549	pushl $i		# 20(%esp) Vector number
550	jmp early_idt_handler
551	i = i + 1
552	.endr
553ENDPROC(early_idt_handlers)
554
555	/* This is global to keep gas from relaxing the jumps */
556ENTRY(early_idt_handler)
557	cld
558	cmpl $2,%ss:early_recursion_flag
559	je hlt_loop
560	incl %ss:early_recursion_flag
561
562	push %eax		# 16(%esp)
563	push %ecx		# 12(%esp)
564	push %edx		#  8(%esp)
565	push %ds		#  4(%esp)
566	push %es		#  0(%esp)
567	movl $(__KERNEL_DS),%eax
568	movl %eax,%ds
569	movl %eax,%es
570
571	cmpl $(__KERNEL_CS),32(%esp)
572	jne 10f
573
574	leal 28(%esp),%eax	# Pointer to %eip
575	call early_fixup_exception
576	andl %eax,%eax
577	jnz ex_entry		/* found an exception entry */
578
57910:
580#ifdef CONFIG_PRINTK
581	xorl %eax,%eax
582	movw %ax,2(%esp)	/* clean up the segment values on some cpus */
583	movw %ax,6(%esp)
584	movw %ax,34(%esp)
585	leal  40(%esp),%eax
586	pushl %eax		/* %esp before the exception */
587	pushl %ebx
588	pushl %ebp
589	pushl %esi
590	pushl %edi
591	movl %cr2,%eax
592	pushl %eax
593	pushl (20+6*4)(%esp)	/* trapno */
594	pushl $fault_msg
595	call printk
596#endif
597	call dump_stack
598hlt_loop:
599	hlt
600	jmp hlt_loop
601
602ex_entry:
603	pop %es
604	pop %ds
605	pop %edx
606	pop %ecx
607	pop %eax
608	addl $8,%esp		/* drop vector number and error code */
609	decl %ss:early_recursion_flag
610	iret
611ENDPROC(early_idt_handler)
612
613/* This is the default interrupt "handler" :-) */
614	ALIGN
615ignore_int:
616	cld
617#ifdef CONFIG_PRINTK
618	pushl %eax
619	pushl %ecx
620	pushl %edx
621	pushl %es
622	pushl %ds
623	movl $(__KERNEL_DS),%eax
624	movl %eax,%ds
625	movl %eax,%es
626	cmpl $2,early_recursion_flag
627	je hlt_loop
628	incl early_recursion_flag
629	pushl 16(%esp)
630	pushl 24(%esp)
631	pushl 32(%esp)
632	pushl 40(%esp)
633	pushl $int_msg
634	call printk
635
636	call dump_stack
637
638	addl $(5*4),%esp
639	popl %ds
640	popl %es
641	popl %edx
642	popl %ecx
643	popl %eax
644#endif
645	iret
646ENDPROC(ignore_int)
647__INITDATA
648	.align 4
649early_recursion_flag:
650	.long 0
651
652__REFDATA
653	.align 4
654ENTRY(initial_code)
655	.long i386_start_kernel
656ENTRY(setup_once_ref)
657	.long setup_once
658
659/*
660 * BSS section
661 */
662__PAGE_ALIGNED_BSS
663	.align PAGE_SIZE
664#ifdef CONFIG_X86_PAE
665initial_pg_pmd:
666	.fill 1024*KPMDS,4,0
667#else
668ENTRY(initial_page_table)
669	.fill 1024,4,0
670#endif
671initial_pg_fixmap:
672	.fill 1024,4,0
673ENTRY(empty_zero_page)
674	.fill 4096,1,0
675ENTRY(swapper_pg_dir)
676	.fill 1024,4,0
677
678/*
679 * This starts the data section.
680 */
681#ifdef CONFIG_X86_PAE
682__PAGE_ALIGNED_DATA
683	/* Page-aligned for the benefit of paravirt? */
684	.align PAGE_SIZE
685ENTRY(initial_page_table)
686	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0	/* low identity map */
687# if KPMDS == 3
688	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
689	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
690	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
691# elif KPMDS == 2
692	.long	0,0
693	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
694	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
695# elif KPMDS == 1
696	.long	0,0
697	.long	0,0
698	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
699# else
700#  error "Kernel PMDs should be 1, 2 or 3"
701# endif
702	.align PAGE_SIZE		/* needs to be page-sized too */
703#endif
704
705.data
706.balign 4
707ENTRY(stack_start)
708	.long init_thread_union+THREAD_SIZE
709
710__INITRODATA
711int_msg:
712	.asciz "Unknown interrupt or fault at: %p %p %p\n"
713
714fault_msg:
715/* fault info: */
716	.ascii "BUG: Int %d: CR2 %p\n"
717/* regs pushed in early_idt_handler: */
718	.ascii "     EDI %p  ESI %p  EBP %p  EBX %p\n"
719	.ascii "     ESP %p   ES %p   DS %p\n"
720	.ascii "     EDX %p  ECX %p  EAX %p\n"
721/* fault frame: */
722	.ascii "     vec %p  err %p  EIP %p   CS %p  flg %p\n"
723	.ascii "Stack: %p %p %p %p %p %p %p %p\n"
724	.ascii "       %p %p %p %p %p %p %p %p\n"
725	.asciz "       %p %p %p %p %p %p %p %p\n"
726
727#include "../../x86/xen/xen-head.S"
728
729/*
730 * The IDT and GDT 'descriptors' are a strange 48-bit object
731 * only used by the lidt and lgdt instructions. They are not
732 * like usual segment descriptors - they consist of a 16-bit
733 * segment size, and 32-bit linear address value:
734 */
735
736	.data
737.globl boot_gdt_descr
738.globl idt_descr
739
740	ALIGN
741# early boot GDT descriptor (must use 1:1 address mapping)
742	.word 0				# 32 bit align gdt_desc.address
743boot_gdt_descr:
744	.word __BOOT_DS+7
745	.long boot_gdt - __PAGE_OFFSET
746
747	.word 0				# 32-bit align idt_desc.address
748idt_descr:
749	.word IDT_ENTRIES*8-1		# idt contains 256 entries
750	.long idt_table
751
752# boot GDT descriptor (later on used by CPU#0):
753	.word 0				# 32 bit align gdt_desc.address
754ENTRY(early_gdt_descr)
755	.word GDT_ENTRIES*8-1
756	.long gdt_page			/* Overwritten for secondary CPUs */
757
758/*
759 * The boot_gdt must mirror the equivalent in setup.S and is
760 * used only for booting.
761 */
762	.align L1_CACHE_BYTES
763ENTRY(boot_gdt)
764	.fill GDT_ENTRY_BOOT_CS,8,0
765	.quad 0x00cf9a000000ffff	/* kernel 4GB code at 0x00000000 */
766	.quad 0x00cf92000000ffff	/* kernel 4GB data at 0x00000000 */
767