1/* 2 * 3 * Copyright (C) 1991, 1992 Linus Torvalds 4 * 5 * Enhanced CPU detection and feature setting code by Mike Jagdis 6 * and Martin Mares, November 1997. 7 */ 8 9.text 10#include <linux/threads.h> 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/segment.h> 14#include <asm/page_types.h> 15#include <asm/pgtable_types.h> 16#include <asm/cache.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/setup.h> 20#include <asm/processor-flags.h> 21#include <asm/msr-index.h> 22#include <asm/cpufeature.h> 23#include <asm/percpu.h> 24#include <asm/nops.h> 25 26/* Physical address */ 27#define pa(X) ((X) - __PAGE_OFFSET) 28 29/* 30 * References to members of the new_cpu_data structure. 31 */ 32 33#define X86 new_cpu_data+CPUINFO_x86 34#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 35#define X86_MODEL new_cpu_data+CPUINFO_x86_model 36#define X86_MASK new_cpu_data+CPUINFO_x86_mask 37#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 38#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 39#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 40#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 41 42/* 43 * This is how much memory in addition to the memory covered up to 44 * and including _end we need mapped initially. 45 * We need: 46 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE) 47 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE) 48 * 49 * Modulo rounding, each megabyte assigned here requires a kilobyte of 50 * memory, which is currently unreclaimed. 51 * 52 * This should be a multiple of a page. 53 * 54 * KERNEL_IMAGE_SIZE should be greater than pa(_end) 55 * and small than max_low_pfn, otherwise will waste some page table entries 56 */ 57 58#if PTRS_PER_PMD > 1 59#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD) 60#else 61#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) 62#endif 63 64/* Number of possible pages in the lowmem region */ 65LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) 66 67/* Enough space to fit pagetables for the low memory linear map */ 68MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT 69 70/* 71 * Worst-case size of the kernel mapping we need to make: 72 * a relocatable kernel can live anywhere in lowmem, so we need to be able 73 * to map all of lowmem. 74 */ 75KERNEL_PAGES = LOWMEM_PAGES 76 77INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE 78RESERVE_BRK(pagetables, INIT_MAP_SIZE) 79 80/* 81 * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 82 * %esi points to the real-mode code as a 32-bit pointer. 83 * CS and DS must be 4 GB flat segments, but we don't depend on 84 * any particular GDT layout, because we load our own as soon as we 85 * can. 86 */ 87__HEAD 88ENTRY(startup_32) 89 movl pa(stack_start),%ecx 90 91 /* test KEEP_SEGMENTS flag to see if the bootloader is asking 92 us to not reload segments */ 93 testb $(1<<6), BP_loadflags(%esi) 94 jnz 2f 95 96/* 97 * Set segments to known values. 98 */ 99 lgdt pa(boot_gdt_descr) 100 movl $(__BOOT_DS),%eax 101 movl %eax,%ds 102 movl %eax,%es 103 movl %eax,%fs 104 movl %eax,%gs 105 movl %eax,%ss 1062: 107 leal -__PAGE_OFFSET(%ecx),%esp 108 109/* 110 * Clear BSS first so that there are no surprises... 111 */ 112 cld 113 xorl %eax,%eax 114 movl $pa(__bss_start),%edi 115 movl $pa(__bss_stop),%ecx 116 subl %edi,%ecx 117 shrl $2,%ecx 118 rep ; stosl 119/* 120 * Copy bootup parameters out of the way. 121 * Note: %esi still has the pointer to the real-mode data. 122 * With the kexec as boot loader, parameter segment might be loaded beyond 123 * kernel image and might not even be addressable by early boot page tables. 124 * (kexec on panic case). Hence copy out the parameters before initializing 125 * page tables. 126 */ 127 movl $pa(boot_params),%edi 128 movl $(PARAM_SIZE/4),%ecx 129 cld 130 rep 131 movsl 132 movl pa(boot_params) + NEW_CL_POINTER,%esi 133 andl %esi,%esi 134 jz 1f # No command line 135 movl $pa(boot_command_line),%edi 136 movl $(COMMAND_LINE_SIZE/4),%ecx 137 rep 138 movsl 1391: 140 141#ifdef CONFIG_OLPC 142 /* save OFW's pgdir table for later use when calling into OFW */ 143 movl %cr3, %eax 144 movl %eax, pa(olpc_ofw_pgd) 145#endif 146 147/* 148 * Initialize page tables. This creates a PDE and a set of page 149 * tables, which are located immediately beyond __brk_base. The variable 150 * _brk_end is set up to point to the first "safe" location. 151 * Mappings are created both at virtual address 0 (identity mapping) 152 * and PAGE_OFFSET for up to _end. 153 */ 154#ifdef CONFIG_X86_PAE 155 156 /* 157 * In PAE mode initial_page_table is statically defined to contain 158 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3 159 * entries). The identity mapping is handled by pointing two PGD entries 160 * to the first kernel PMD. 161 * 162 * Note the upper half of each PMD or PTE are always zero at this stage. 163 */ 164 165#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 166 167 xorl %ebx,%ebx /* %ebx is kept at zero */ 168 169 movl $pa(__brk_base), %edi 170 movl $pa(initial_pg_pmd), %edx 171 movl $PTE_IDENT_ATTR, %eax 17210: 173 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ 174 movl %ecx,(%edx) /* Store PMD entry */ 175 /* Upper half already zero */ 176 addl $8,%edx 177 movl $512,%ecx 17811: 179 stosl 180 xchgl %eax,%ebx 181 stosl 182 xchgl %eax,%ebx 183 addl $0x1000,%eax 184 loop 11b 185 186 /* 187 * End condition: we must map up to the end + MAPPING_BEYOND_END. 188 */ 189 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp 190 cmpl %ebp,%eax 191 jb 10b 1921: 193 addl $__PAGE_OFFSET, %edi 194 movl %edi, pa(_brk_end) 195 shrl $12, %eax 196 movl %eax, pa(max_pfn_mapped) 197 198 /* Do early initialization of the fixmap area */ 199 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 200 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) 201#else /* Not PAE */ 202 203page_pde_offset = (__PAGE_OFFSET >> 20); 204 205 movl $pa(__brk_base), %edi 206 movl $pa(initial_page_table), %edx 207 movl $PTE_IDENT_ATTR, %eax 20810: 209 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ 210 movl %ecx,(%edx) /* Store identity PDE entry */ 211 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ 212 addl $4,%edx 213 movl $1024, %ecx 21411: 215 stosl 216 addl $0x1000,%eax 217 loop 11b 218 /* 219 * End condition: we must map up to the end + MAPPING_BEYOND_END. 220 */ 221 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp 222 cmpl %ebp,%eax 223 jb 10b 224 addl $__PAGE_OFFSET, %edi 225 movl %edi, pa(_brk_end) 226 shrl $12, %eax 227 movl %eax, pa(max_pfn_mapped) 228 229 /* Do early initialization of the fixmap area */ 230 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 231 movl %eax,pa(initial_page_table+0xffc) 232#endif 233 234#ifdef CONFIG_PARAVIRT 235 /* This is can only trip for a broken bootloader... */ 236 cmpw $0x207, pa(boot_params + BP_version) 237 jb default_entry 238 239 /* Paravirt-compatible boot parameters. Look to see what architecture 240 we're booting under. */ 241 movl pa(boot_params + BP_hardware_subarch), %eax 242 cmpl $num_subarch_entries, %eax 243 jae bad_subarch 244 245 movl pa(subarch_entries)(,%eax,4), %eax 246 subl $__PAGE_OFFSET, %eax 247 jmp *%eax 248 249bad_subarch: 250WEAK(lguest_entry) 251WEAK(xen_entry) 252 /* Unknown implementation; there's really 253 nothing we can do at this point. */ 254 ud2a 255 256 __INITDATA 257 258subarch_entries: 259 .long default_entry /* normal x86/PC */ 260 .long lguest_entry /* lguest hypervisor */ 261 .long xen_entry /* Xen hypervisor */ 262 .long default_entry /* Moorestown MID */ 263num_subarch_entries = (. - subarch_entries) / 4 264.previous 265#else 266 jmp default_entry 267#endif /* CONFIG_PARAVIRT */ 268 269/* 270 * Non-boot CPU entry point; entered from trampoline.S 271 * We can't lgdt here, because lgdt itself uses a data segment, but 272 * we know the trampoline has already loaded the boot_gdt for us. 273 * 274 * If cpu hotplug is not supported then this code can go in init section 275 * which will be freed later 276 */ 277__CPUINIT 278ENTRY(startup_32_smp) 279 cld 280 movl $(__BOOT_DS),%eax 281 movl %eax,%ds 282 movl %eax,%es 283 movl %eax,%fs 284 movl %eax,%gs 285 movl pa(stack_start),%ecx 286 movl %eax,%ss 287 leal -__PAGE_OFFSET(%ecx),%esp 288 289default_entry: 290/* 291 * New page tables may be in 4Mbyte page mode and may 292 * be using the global pages. 293 * 294 * NOTE! If we are on a 486 we may have no cr4 at all! 295 * Specifically, cr4 exists if and only if CPUID exists, 296 * which in turn exists if and only if EFLAGS.ID exists. 297 */ 298 movl $X86_EFLAGS_ID,%ecx 299 pushl %ecx 300 popfl 301 pushfl 302 popl %eax 303 pushl $0 304 popfl 305 pushfl 306 popl %edx 307 xorl %edx,%eax 308 testl %ecx,%eax 309 jz 6f # No ID flag = no CPUID = no CR4 310 311 movl pa(mmu_cr4_features),%eax 312 movl %eax,%cr4 313 314 testb $X86_CR4_PAE, %al # check if PAE is enabled 315 jz 6f 316 317 /* Check if extended functions are implemented */ 318 movl $0x80000000, %eax 319 cpuid 320 /* Value must be in the range 0x80000001 to 0x8000ffff */ 321 subl $0x80000001, %eax 322 cmpl $(0x8000ffff-0x80000001), %eax 323 ja 6f 324 325 /* Clear bogus XD_DISABLE bits */ 326 call verify_cpu 327 328 mov $0x80000001, %eax 329 cpuid 330 /* Execute Disable bit supported? */ 331 btl $(X86_FEATURE_NX & 31), %edx 332 jnc 6f 333 334 /* Setup EFER (Extended Feature Enable Register) */ 335 movl $MSR_EFER, %ecx 336 rdmsr 337 338 btsl $_EFER_NX, %eax 339 /* Make changes effective */ 340 wrmsr 341 3426: 343 344/* 345 * Enable paging 346 */ 347 movl $pa(initial_page_table), %eax 348 movl %eax,%cr3 /* set the page table pointer.. */ 349 movl %cr0,%eax 350 orl $X86_CR0_PG,%eax 351 movl %eax,%cr0 /* ..and set paging (PG) bit */ 352 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 3531: 354 /* Shift the stack pointer to a virtual address */ 355 addl $__PAGE_OFFSET, %esp 356 357/* 358 * Initialize eflags. Some BIOS's leave bits like NT set. This would 359 * confuse the debugger if this code is traced. 360 * XXX - best to initialize before switching to protected mode. 361 */ 362 pushl $0 363 popfl 364 365/* 366 * start system 32-bit setup. We need to re-do some of the things done 367 * in 16-bit mode for the "real" operations. 368 */ 369 movl setup_once_ref,%eax 370 andl %eax,%eax 371 jz 1f # Did we do this already? 372 call *%eax 3731: 374 375/* check if it is 486 or 386. */ 376/* 377 * XXX - this does a lot of unnecessary setup. Alignment checks don't 378 * apply at our cpl of 0 and the stack ought to be aligned already, and 379 * we don't need to preserve eflags. 380 */ 381 movl $-1,X86_CPUID # -1 for no CPUID initially 382 movb $3,X86 # at least 386 383 pushfl # push EFLAGS 384 popl %eax # get EFLAGS 385 movl %eax,%ecx # save original EFLAGS 386 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS 387 pushl %eax # copy to EFLAGS 388 popfl # set EFLAGS 389 pushfl # get new EFLAGS 390 popl %eax # put it in eax 391 xorl %ecx,%eax # change in flags 392 pushl %ecx # restore original EFLAGS 393 popfl 394 testl $0x40000,%eax # check if AC bit changed 395 je is386 396 397 movb $4,X86 # at least 486 398 testl $0x200000,%eax # check if ID bit changed 399 je is486 400 401 /* get vendor info */ 402 xorl %eax,%eax # call CPUID with 0 -> return vendor ID 403 cpuid 404 movl %eax,X86_CPUID # save CPUID level 405 movl %ebx,X86_VENDOR_ID # lo 4 chars 406 movl %edx,X86_VENDOR_ID+4 # next 4 chars 407 movl %ecx,X86_VENDOR_ID+8 # last 4 chars 408 409 orl %eax,%eax # do we have processor info as well? 410 je is486 411 412 movl $1,%eax # Use the CPUID instruction to get CPU type 413 cpuid 414 movb %al,%cl # save reg for future use 415 andb $0x0f,%ah # mask processor family 416 movb %ah,X86 417 andb $0xf0,%al # mask model 418 shrb $4,%al 419 movb %al,X86_MODEL 420 andb $0x0f,%cl # mask mask revision 421 movb %cl,X86_MASK 422 movl %edx,X86_CAPABILITY 423 424is486: movl $0x50022,%ecx # set AM, WP, NE and MP 425 jmp 2f 426 427is386: movl $2,%ecx # set MP 4282: movl %cr0,%eax 429 andl $0x80000011,%eax # Save PG,PE,ET 430 orl %ecx,%eax 431 movl %eax,%cr0 432 433 call check_x87 434 lgdt early_gdt_descr 435 lidt idt_descr 436 ljmp $(__KERNEL_CS),$1f 4371: movl $(__KERNEL_DS),%eax # reload all the segment registers 438 movl %eax,%ss # after changing gdt. 439 440 movl $(__USER_DS),%eax # DS/ES contains default USER segment 441 movl %eax,%ds 442 movl %eax,%es 443 444 movl $(__KERNEL_PERCPU), %eax 445 movl %eax,%fs # set this cpu's percpu 446 447 movl $(__KERNEL_STACK_CANARY),%eax 448 movl %eax,%gs 449 450 xorl %eax,%eax # Clear LDT 451 lldt %ax 452 453 cld # gcc2 wants the direction flag cleared at all times 454 pushl $0 # fake return address for unwinder 455 jmp *(initial_code) 456 457/* 458 * We depend on ET to be correct. This checks for 287/387. 459 */ 460check_x87: 461 movb $0,X86_HARD_MATH 462 clts 463 fninit 464 fstsw %ax 465 cmpb $0,%al 466 je 1f 467 movl %cr0,%eax /* no coprocessor: have to set bits */ 468 xorl $4,%eax /* set EM */ 469 movl %eax,%cr0 470 ret 471 ALIGN 4721: movb $1,X86_HARD_MATH 473 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ 474 ret 475 476 477#include "verify_cpu.S" 478 479/* 480 * setup_once 481 * 482 * The setup work we only want to run on the BSP. 483 * 484 * Warning: %esi is live across this function. 485 */ 486__INIT 487setup_once: 488 /* 489 * Set up a idt with 256 entries pointing to ignore_int, 490 * interrupt gates. It doesn't actually load idt - that needs 491 * to be done on each CPU. Interrupts are enabled elsewhere, 492 * when we can be relatively sure everything is ok. 493 */ 494 495 movl $idt_table,%edi 496 movl $early_idt_handlers,%eax 497 movl $NUM_EXCEPTION_VECTORS,%ecx 4981: 499 movl %eax,(%edi) 500 movl %eax,4(%edi) 501 /* interrupt gate, dpl=0, present */ 502 movl $(0x8E000000 + __KERNEL_CS),2(%edi) 503 addl $9,%eax 504 addl $8,%edi 505 loop 1b 506 507 movl $256 - NUM_EXCEPTION_VECTORS,%ecx 508 movl $ignore_int,%edx 509 movl $(__KERNEL_CS << 16),%eax 510 movw %dx,%ax /* selector = 0x0010 = cs */ 511 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5122: 513 movl %eax,(%edi) 514 movl %edx,4(%edi) 515 addl $8,%edi 516 loop 2b 517 518#ifdef CONFIG_CC_STACKPROTECTOR 519 /* 520 * Configure the stack canary. The linker can't handle this by 521 * relocation. Manually set base address in stack canary 522 * segment descriptor. 523 */ 524 movl $gdt_page,%eax 525 movl $stack_canary,%ecx 526 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) 527 shrl $16, %ecx 528 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) 529 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) 530#endif 531 532 andl $0,setup_once_ref /* Once is enough, thanks */ 533 ret 534 535ENTRY(early_idt_handlers) 536 # 36(%esp) %eflags 537 # 32(%esp) %cs 538 # 28(%esp) %eip 539 # 24(%rsp) error code 540 i = 0 541 .rept NUM_EXCEPTION_VECTORS 542 .if (EXCEPTION_ERRCODE_MASK >> i) & 1 543 ASM_NOP2 544 .else 545 pushl $0 # Dummy error code, to make stack frame uniform 546 .endif 547 pushl $i # 20(%esp) Vector number 548 jmp early_idt_handler 549 i = i + 1 550 .endr 551ENDPROC(early_idt_handlers) 552 553 /* This is global to keep gas from relaxing the jumps */ 554ENTRY(early_idt_handler) 555 cld 556 cmpl $2,%ss:early_recursion_flag 557 je hlt_loop 558 incl %ss:early_recursion_flag 559 560 push %eax # 16(%esp) 561 push %ecx # 12(%esp) 562 push %edx # 8(%esp) 563 push %ds # 4(%esp) 564 push %es # 0(%esp) 565 movl $(__KERNEL_DS),%eax 566 movl %eax,%ds 567 movl %eax,%es 568 569 cmpl $(__KERNEL_CS),32(%esp) 570 jne 10f 571 572 leal 28(%esp),%eax # Pointer to %eip 573 call early_fixup_exception 574 andl %eax,%eax 575 jnz ex_entry /* found an exception entry */ 576 57710: 578#ifdef CONFIG_PRINTK 579 xorl %eax,%eax 580 movw %ax,2(%esp) /* clean up the segment values on some cpus */ 581 movw %ax,6(%esp) 582 movw %ax,34(%esp) 583 leal 40(%esp),%eax 584 pushl %eax /* %esp before the exception */ 585 pushl %ebx 586 pushl %ebp 587 pushl %esi 588 pushl %edi 589 movl %cr2,%eax 590 pushl %eax 591 pushl (20+6*4)(%esp) /* trapno */ 592 pushl $fault_msg 593 call printk 594#endif 595 call dump_stack 596hlt_loop: 597 hlt 598 jmp hlt_loop 599 600ex_entry: 601 pop %es 602 pop %ds 603 pop %edx 604 pop %ecx 605 pop %eax 606 addl $8,%esp /* drop vector number and error code */ 607 decl %ss:early_recursion_flag 608 iret 609ENDPROC(early_idt_handler) 610 611/* This is the default interrupt "handler" :-) */ 612 ALIGN 613ignore_int: 614 cld 615#ifdef CONFIG_PRINTK 616 pushl %eax 617 pushl %ecx 618 pushl %edx 619 pushl %es 620 pushl %ds 621 movl $(__KERNEL_DS),%eax 622 movl %eax,%ds 623 movl %eax,%es 624 cmpl $2,early_recursion_flag 625 je hlt_loop 626 incl early_recursion_flag 627 pushl 16(%esp) 628 pushl 24(%esp) 629 pushl 32(%esp) 630 pushl 40(%esp) 631 pushl $int_msg 632 call printk 633 634 call dump_stack 635 636 addl $(5*4),%esp 637 popl %ds 638 popl %es 639 popl %edx 640 popl %ecx 641 popl %eax 642#endif 643 iret 644ENDPROC(ignore_int) 645__INITDATA 646 .align 4 647early_recursion_flag: 648 .long 0 649 650__REFDATA 651 .align 4 652ENTRY(initial_code) 653 .long i386_start_kernel 654ENTRY(setup_once_ref) 655 .long setup_once 656 657/* 658 * BSS section 659 */ 660__PAGE_ALIGNED_BSS 661 .align PAGE_SIZE 662#ifdef CONFIG_X86_PAE 663initial_pg_pmd: 664 .fill 1024*KPMDS,4,0 665#else 666ENTRY(initial_page_table) 667 .fill 1024,4,0 668#endif 669initial_pg_fixmap: 670 .fill 1024,4,0 671ENTRY(empty_zero_page) 672 .fill 4096,1,0 673ENTRY(swapper_pg_dir) 674 .fill 1024,4,0 675 676/* 677 * This starts the data section. 678 */ 679#ifdef CONFIG_X86_PAE 680__PAGE_ALIGNED_DATA 681 /* Page-aligned for the benefit of paravirt? */ 682 .align PAGE_SIZE 683ENTRY(initial_page_table) 684 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 685# if KPMDS == 3 686 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 687 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 688 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 689# elif KPMDS == 2 690 .long 0,0 691 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 692 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 693# elif KPMDS == 1 694 .long 0,0 695 .long 0,0 696 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 697# else 698# error "Kernel PMDs should be 1, 2 or 3" 699# endif 700 .align PAGE_SIZE /* needs to be page-sized too */ 701#endif 702 703.data 704.balign 4 705ENTRY(stack_start) 706 .long init_thread_union+THREAD_SIZE 707 708__INITRODATA 709int_msg: 710 .asciz "Unknown interrupt or fault at: %p %p %p\n" 711 712fault_msg: 713/* fault info: */ 714 .ascii "BUG: Int %d: CR2 %p\n" 715/* regs pushed in early_idt_handler: */ 716 .ascii " EDI %p ESI %p EBP %p EBX %p\n" 717 .ascii " ESP %p ES %p DS %p\n" 718 .ascii " EDX %p ECX %p EAX %p\n" 719/* fault frame: */ 720 .ascii " vec %p err %p EIP %p CS %p flg %p\n" 721 .ascii "Stack: %p %p %p %p %p %p %p %p\n" 722 .ascii " %p %p %p %p %p %p %p %p\n" 723 .asciz " %p %p %p %p %p %p %p %p\n" 724 725#include "../../x86/xen/xen-head.S" 726 727/* 728 * The IDT and GDT 'descriptors' are a strange 48-bit object 729 * only used by the lidt and lgdt instructions. They are not 730 * like usual segment descriptors - they consist of a 16-bit 731 * segment size, and 32-bit linear address value: 732 */ 733 734 .data 735.globl boot_gdt_descr 736.globl idt_descr 737 738 ALIGN 739# early boot GDT descriptor (must use 1:1 address mapping) 740 .word 0 # 32 bit align gdt_desc.address 741boot_gdt_descr: 742 .word __BOOT_DS+7 743 .long boot_gdt - __PAGE_OFFSET 744 745 .word 0 # 32-bit align idt_desc.address 746idt_descr: 747 .word IDT_ENTRIES*8-1 # idt contains 256 entries 748 .long idt_table 749 750# boot GDT descriptor (later on used by CPU#0): 751 .word 0 # 32 bit align gdt_desc.address 752ENTRY(early_gdt_descr) 753 .word GDT_ENTRIES*8-1 754 .long gdt_page /* Overwritten for secondary CPUs */ 755 756/* 757 * The boot_gdt must mirror the equivalent in setup.S and is 758 * used only for booting. 759 */ 760 .align L1_CACHE_BYTES 761ENTRY(boot_gdt) 762 .fill GDT_ENTRY_BOOT_CS,8,0 763 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 764 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 765