xref: /linux/arch/x86/kernel/head_32.S (revision 2d6ffcca623a9a16df6cdfbe8250b7a5904a5f5e)
1/*
2 *
3 *  Copyright (C) 1991, 1992  Linus Torvalds
4 *
5 *  Enhanced CPU detection and feature setting code by Mike Jagdis
6 *  and Martin Mares, November 1997.
7 */
8
9.text
10#include <linux/threads.h>
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page.h>
15#include <asm/pgtable.h>
16#include <asm/desc.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21#include <asm/processor-flags.h>
22
23/* Physical address */
24#define pa(X) ((X) - __PAGE_OFFSET)
25
26/*
27 * References to members of the new_cpu_data structure.
28 */
29
30#define X86		new_cpu_data+CPUINFO_x86
31#define X86_VENDOR	new_cpu_data+CPUINFO_x86_vendor
32#define X86_MODEL	new_cpu_data+CPUINFO_x86_model
33#define X86_MASK	new_cpu_data+CPUINFO_x86_mask
34#define X86_HARD_MATH	new_cpu_data+CPUINFO_hard_math
35#define X86_CPUID	new_cpu_data+CPUINFO_cpuid_level
36#define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability
37#define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id
38
39/*
40 * This is how much memory *in addition to the memory covered up to
41 * and including _end* we need mapped initially.
42 * We need:
43 *  - one bit for each possible page, but only in low memory, which means
44 *     2^32/4096/8 = 128K worst case (4G/4G split.)
45 *  - enough space to map all low memory, which means
46 *     (2^32/4096) / 1024 pages (worst case, non PAE)
47 *     (2^32/4096) / 512 + 4 pages (worst case for PAE)
48 *  - a few pages for allocator use before the kernel pagetable has
49 *     been set up
50 *
51 * Modulo rounding, each megabyte assigned here requires a kilobyte of
52 * memory, which is currently unreclaimed.
53 *
54 * This should be a multiple of a page.
55 */
56LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
57
58/*
59 * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
60 * pagetables from above the 16MB DMA limit, so we'll have to set
61 * up pagetables 16MB more (worst-case):
62 */
63#ifdef CONFIG_DEBUG_PAGEALLOC
64LOW_PAGES = LOW_PAGES + 0x1000000
65#endif
66
67#if PTRS_PER_PMD > 1
68PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
69#else
70PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
71#endif
72BOOTBITMAP_SIZE = LOW_PAGES / 8
73ALLOCATOR_SLOP = 4
74
75INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
76
77/*
78 * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
79 * %esi points to the real-mode code as a 32-bit pointer.
80 * CS and DS must be 4 GB flat segments, but we don't depend on
81 * any particular GDT layout, because we load our own as soon as we
82 * can.
83 */
84.section .text.head,"ax",@progbits
85ENTRY(startup_32)
86	/* test KEEP_SEGMENTS flag to see if the bootloader is asking
87		us to not reload segments */
88	testb $(1<<6), BP_loadflags(%esi)
89	jnz 2f
90
91/*
92 * Set segments to known values.
93 */
94	lgdt pa(boot_gdt_descr)
95	movl $(__BOOT_DS),%eax
96	movl %eax,%ds
97	movl %eax,%es
98	movl %eax,%fs
99	movl %eax,%gs
1002:
101
102/*
103 * Clear BSS first so that there are no surprises...
104 */
105	cld
106	xorl %eax,%eax
107	movl $pa(__bss_start),%edi
108	movl $pa(__bss_stop),%ecx
109	subl %edi,%ecx
110	shrl $2,%ecx
111	rep ; stosl
112/*
113 * Copy bootup parameters out of the way.
114 * Note: %esi still has the pointer to the real-mode data.
115 * With the kexec as boot loader, parameter segment might be loaded beyond
116 * kernel image and might not even be addressable by early boot page tables.
117 * (kexec on panic case). Hence copy out the parameters before initializing
118 * page tables.
119 */
120	movl $pa(boot_params),%edi
121	movl $(PARAM_SIZE/4),%ecx
122	cld
123	rep
124	movsl
125	movl pa(boot_params) + NEW_CL_POINTER,%esi
126	andl %esi,%esi
127	jz 1f			# No comand line
128	movl $pa(boot_command_line),%edi
129	movl $(COMMAND_LINE_SIZE/4),%ecx
130	rep
131	movsl
1321:
133
134#ifdef CONFIG_PARAVIRT
135	/* This is can only trip for a broken bootloader... */
136	cmpw $0x207, pa(boot_params + BP_version)
137	jb default_entry
138
139	/* Paravirt-compatible boot parameters.  Look to see what architecture
140		we're booting under. */
141	movl pa(boot_params + BP_hardware_subarch), %eax
142	cmpl $num_subarch_entries, %eax
143	jae bad_subarch
144
145	movl pa(subarch_entries)(,%eax,4), %eax
146	subl $__PAGE_OFFSET, %eax
147	jmp *%eax
148
149bad_subarch:
150WEAK(lguest_entry)
151WEAK(xen_entry)
152	/* Unknown implementation; there's really
153	   nothing we can do at this point. */
154	ud2a
155
156	__INITDATA
157
158subarch_entries:
159	.long default_entry		/* normal x86/PC */
160	.long lguest_entry		/* lguest hypervisor */
161	.long xen_entry			/* Xen hypervisor */
162num_subarch_entries = (. - subarch_entries) / 4
163.previous
164#endif /* CONFIG_PARAVIRT */
165
166/*
167 * Initialize page tables.  This creates a PDE and a set of page
168 * tables, which are located immediately beyond _end.  The variable
169 * init_pg_tables_end is set up to point to the first "safe" location.
170 * Mappings are created both at virtual address 0 (identity mapping)
171 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
172 *
173 * Note that the stack is not yet set up!
174 */
175#define PTE_ATTR	0x007		/* PRESENT+RW+USER */
176#define PDE_ATTR	0x067		/* PRESENT+RW+USER+DIRTY+ACCESSED */
177#define PGD_ATTR	0x001		/* PRESENT (no other attributes) */
178
179default_entry:
180#ifdef CONFIG_X86_PAE
181
182	/*
183	 * In PAE mode swapper_pg_dir is statically defined to contain enough
184	 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
185	 * entries). The identity mapping is handled by pointing two PGD
186	 * entries to the first kernel PMD.
187	 *
188	 * Note the upper half of each PMD or PTE are always zero at
189	 * this stage.
190	 */
191
192#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
193
194	xorl %ebx,%ebx				/* %ebx is kept at zero */
195
196	movl $pa(pg0), %edi
197	movl %edi, pa(init_pg_tables_start)
198	movl $pa(swapper_pg_pmd), %edx
199	movl $PTE_ATTR, %eax
20010:
201	leal PDE_ATTR(%edi),%ecx		/* Create PMD entry */
202	movl %ecx,(%edx)			/* Store PMD entry */
203						/* Upper half already zero */
204	addl $8,%edx
205	movl $512,%ecx
20611:
207	stosl
208	xchgl %eax,%ebx
209	stosl
210	xchgl %eax,%ebx
211	addl $0x1000,%eax
212	loop 11b
213
214	/*
215	 * End condition: we must map up to and including INIT_MAP_BEYOND_END
216	 * bytes beyond the end of our own page tables.
217	 */
218	leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
219	cmpl %ebp,%eax
220	jb 10b
2211:
222	movl %edi,pa(init_pg_tables_end)
223	shrl $12, %eax
224	movl %eax, pa(max_pfn_mapped)
225
226	/* Do early initialization of the fixmap area */
227	movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
228	movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
229#else	/* Not PAE */
230
231page_pde_offset = (__PAGE_OFFSET >> 20);
232
233	movl $pa(pg0), %edi
234	movl %edi, pa(init_pg_tables_start)
235	movl $pa(swapper_pg_dir), %edx
236	movl $PTE_ATTR, %eax
23710:
238	leal PDE_ATTR(%edi),%ecx		/* Create PDE entry */
239	movl %ecx,(%edx)			/* Store identity PDE entry */
240	movl %ecx,page_pde_offset(%edx)		/* Store kernel PDE entry */
241	addl $4,%edx
242	movl $1024, %ecx
24311:
244	stosl
245	addl $0x1000,%eax
246	loop 11b
247	/*
248	 * End condition: we must map up to and including INIT_MAP_BEYOND_END
249	 * bytes beyond the end of our own page tables; the +0x007 is
250	 * the attribute bits
251	 */
252	leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
253	cmpl %ebp,%eax
254	jb 10b
255	movl %edi,pa(init_pg_tables_end)
256	shrl $12, %eax
257	movl %eax, pa(max_pfn_mapped)
258
259	/* Do early initialization of the fixmap area */
260	movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
261	movl %eax,pa(swapper_pg_dir+0xffc)
262#endif
263	jmp 3f
264/*
265 * Non-boot CPU entry point; entered from trampoline.S
266 * We can't lgdt here, because lgdt itself uses a data segment, but
267 * we know the trampoline has already loaded the boot_gdt for us.
268 *
269 * If cpu hotplug is not supported then this code can go in init section
270 * which will be freed later
271 */
272
273#ifndef CONFIG_HOTPLUG_CPU
274.section .init.text,"ax",@progbits
275#endif
276
277#ifdef CONFIG_SMP
278ENTRY(startup_32_smp)
279	cld
280	movl $(__BOOT_DS),%eax
281	movl %eax,%ds
282	movl %eax,%es
283	movl %eax,%fs
284	movl %eax,%gs
285#endif /* CONFIG_SMP */
2863:
287
288/*
289 *	New page tables may be in 4Mbyte page mode and may
290 *	be using the global pages.
291 *
292 *	NOTE! If we are on a 486 we may have no cr4 at all!
293 *	So we do not try to touch it unless we really have
294 *	some bits in it to set.  This won't work if the BSP
295 *	implements cr4 but this AP does not -- very unlikely
296 *	but be warned!  The same applies to the pse feature
297 *	if not equally supported. --macro
298 *
299 *	NOTE! We have to correct for the fact that we're
300 *	not yet offset PAGE_OFFSET..
301 */
302#define cr4_bits pa(mmu_cr4_features)
303	movl cr4_bits,%edx
304	andl %edx,%edx
305	jz 6f
306	movl %cr4,%eax		# Turn on paging options (PSE,PAE,..)
307	orl %edx,%eax
308	movl %eax,%cr4
309
310	btl $5, %eax		# check if PAE is enabled
311	jnc 6f
312
313	/* Check if extended functions are implemented */
314	movl $0x80000000, %eax
315	cpuid
316	cmpl $0x80000000, %eax
317	jbe 6f
318	mov $0x80000001, %eax
319	cpuid
320	/* Execute Disable bit supported? */
321	btl $20, %edx
322	jnc 6f
323
324	/* Setup EFER (Extended Feature Enable Register) */
325	movl $0xc0000080, %ecx
326	rdmsr
327
328	btsl $11, %eax
329	/* Make changes effective */
330	wrmsr
331
3326:
333
334/*
335 * Enable paging
336 */
337	movl $pa(swapper_pg_dir),%eax
338	movl %eax,%cr3		/* set the page table pointer.. */
339	movl %cr0,%eax
340	orl  $X86_CR0_PG,%eax
341	movl %eax,%cr0		/* ..and set paging (PG) bit */
342	ljmp $__BOOT_CS,$1f	/* Clear prefetch and normalize %eip */
3431:
344	/* Set up the stack pointer */
345	lss stack_start,%esp
346
347/*
348 * Initialize eflags.  Some BIOS's leave bits like NT set.  This would
349 * confuse the debugger if this code is traced.
350 * XXX - best to initialize before switching to protected mode.
351 */
352	pushl $0
353	popfl
354
355#ifdef CONFIG_SMP
356	cmpb $0, ready
357	jz  1f				/* Initial CPU cleans BSS */
358	jmp checkCPUtype
3591:
360#endif /* CONFIG_SMP */
361
362/*
363 * start system 32-bit setup. We need to re-do some of the things done
364 * in 16-bit mode for the "real" operations.
365 */
366	call setup_idt
367
368checkCPUtype:
369
370	movl $-1,X86_CPUID		#  -1 for no CPUID initially
371
372/* check if it is 486 or 386. */
373/*
374 * XXX - this does a lot of unnecessary setup.  Alignment checks don't
375 * apply at our cpl of 0 and the stack ought to be aligned already, and
376 * we don't need to preserve eflags.
377 */
378
379	movb $3,X86		# at least 386
380	pushfl			# push EFLAGS
381	popl %eax		# get EFLAGS
382	movl %eax,%ecx		# save original EFLAGS
383	xorl $0x240000,%eax	# flip AC and ID bits in EFLAGS
384	pushl %eax		# copy to EFLAGS
385	popfl			# set EFLAGS
386	pushfl			# get new EFLAGS
387	popl %eax		# put it in eax
388	xorl %ecx,%eax		# change in flags
389	pushl %ecx		# restore original EFLAGS
390	popfl
391	testl $0x40000,%eax	# check if AC bit changed
392	je is386
393
394	movb $4,X86		# at least 486
395	testl $0x200000,%eax	# check if ID bit changed
396	je is486
397
398	/* get vendor info */
399	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
400	cpuid
401	movl %eax,X86_CPUID		# save CPUID level
402	movl %ebx,X86_VENDOR_ID		# lo 4 chars
403	movl %edx,X86_VENDOR_ID+4	# next 4 chars
404	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
405
406	orl %eax,%eax			# do we have processor info as well?
407	je is486
408
409	movl $1,%eax		# Use the CPUID instruction to get CPU type
410	cpuid
411	movb %al,%cl		# save reg for future use
412	andb $0x0f,%ah		# mask processor family
413	movb %ah,X86
414	andb $0xf0,%al		# mask model
415	shrb $4,%al
416	movb %al,X86_MODEL
417	andb $0x0f,%cl		# mask mask revision
418	movb %cl,X86_MASK
419	movl %edx,X86_CAPABILITY
420
421is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
422	jmp 2f
423
424is386:	movl $2,%ecx		# set MP
4252:	movl %cr0,%eax
426	andl $0x80000011,%eax	# Save PG,PE,ET
427	orl %ecx,%eax
428	movl %eax,%cr0
429
430	call check_x87
431	lgdt early_gdt_descr
432	lidt idt_descr
433	ljmp $(__KERNEL_CS),$1f
4341:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
435	movl %eax,%ss			# after changing gdt.
436	movl %eax,%fs			# gets reset once there's real percpu
437
438	movl $(__USER_DS),%eax		# DS/ES contains default USER segment
439	movl %eax,%ds
440	movl %eax,%es
441
442	xorl %eax,%eax			# Clear GS and LDT
443	movl %eax,%gs
444	lldt %ax
445
446	cld			# gcc2 wants the direction flag cleared at all times
447	pushl $0		# fake return address for unwinder
448#ifdef CONFIG_SMP
449	movb ready, %cl
450	movb $1, ready
451	cmpb $0,%cl		# the first CPU calls start_kernel
452	je   1f
453	movl $(__KERNEL_PERCPU), %eax
454	movl %eax,%fs		# set this cpu's percpu
455	movl (stack_start), %esp
4561:
457#endif /* CONFIG_SMP */
458	jmp *(initial_code)
459.align 4
460ENTRY(initial_code)
461	.long i386_start_kernel
462
463/*
464 * We depend on ET to be correct. This checks for 287/387.
465 */
466check_x87:
467	movb $0,X86_HARD_MATH
468	clts
469	fninit
470	fstsw %ax
471	cmpb $0,%al
472	je 1f
473	movl %cr0,%eax		/* no coprocessor: have to set bits */
474	xorl $4,%eax		/* set EM */
475	movl %eax,%cr0
476	ret
477	ALIGN
4781:	movb $1,X86_HARD_MATH
479	.byte 0xDB,0xE4		/* fsetpm for 287, ignored by 387 */
480	ret
481
482/*
483 *  setup_idt
484 *
485 *  sets up a idt with 256 entries pointing to
486 *  ignore_int, interrupt gates. It doesn't actually load
487 *  idt - that can be done only after paging has been enabled
488 *  and the kernel moved to PAGE_OFFSET. Interrupts
489 *  are enabled elsewhere, when we can be relatively
490 *  sure everything is ok.
491 *
492 *  Warning: %esi is live across this function.
493 */
494setup_idt:
495	lea ignore_int,%edx
496	movl $(__KERNEL_CS << 16),%eax
497	movw %dx,%ax		/* selector = 0x0010 = cs */
498	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
499
500	lea idt_table,%edi
501	mov $256,%ecx
502rp_sidt:
503	movl %eax,(%edi)
504	movl %edx,4(%edi)
505	addl $8,%edi
506	dec %ecx
507	jne rp_sidt
508
509.macro	set_early_handler handler,trapno
510	lea \handler,%edx
511	movl $(__KERNEL_CS << 16),%eax
512	movw %dx,%ax
513	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
514	lea idt_table,%edi
515	movl %eax,8*\trapno(%edi)
516	movl %edx,8*\trapno+4(%edi)
517.endm
518
519	set_early_handler handler=early_divide_err,trapno=0
520	set_early_handler handler=early_illegal_opcode,trapno=6
521	set_early_handler handler=early_protection_fault,trapno=13
522	set_early_handler handler=early_page_fault,trapno=14
523
524	ret
525
526early_divide_err:
527	xor %edx,%edx
528	pushl $0	/* fake errcode */
529	jmp early_fault
530
531early_illegal_opcode:
532	movl $6,%edx
533	pushl $0	/* fake errcode */
534	jmp early_fault
535
536early_protection_fault:
537	movl $13,%edx
538	jmp early_fault
539
540early_page_fault:
541	movl $14,%edx
542	jmp early_fault
543
544early_fault:
545	cld
546#ifdef CONFIG_PRINTK
547	pusha
548	movl $(__KERNEL_DS),%eax
549	movl %eax,%ds
550	movl %eax,%es
551	cmpl $2,early_recursion_flag
552	je hlt_loop
553	incl early_recursion_flag
554	movl %cr2,%eax
555	pushl %eax
556	pushl %edx		/* trapno */
557	pushl $fault_msg
558#ifdef CONFIG_EARLY_PRINTK
559	call early_printk
560#else
561	call printk
562#endif
563#endif
564	call dump_stack
565hlt_loop:
566	hlt
567	jmp hlt_loop
568
569/* This is the default interrupt "handler" :-) */
570	ALIGN
571ignore_int:
572	cld
573#ifdef CONFIG_PRINTK
574	pushl %eax
575	pushl %ecx
576	pushl %edx
577	pushl %es
578	pushl %ds
579	movl $(__KERNEL_DS),%eax
580	movl %eax,%ds
581	movl %eax,%es
582	cmpl $2,early_recursion_flag
583	je hlt_loop
584	incl early_recursion_flag
585	pushl 16(%esp)
586	pushl 24(%esp)
587	pushl 32(%esp)
588	pushl 40(%esp)
589	pushl $int_msg
590#ifdef CONFIG_EARLY_PRINTK
591	call early_printk
592#else
593	call printk
594#endif
595	addl $(5*4),%esp
596	popl %ds
597	popl %es
598	popl %edx
599	popl %ecx
600	popl %eax
601#endif
602	iret
603
604.section .text
605/*
606 * Real beginning of normal "text" segment
607 */
608ENTRY(stext)
609ENTRY(_stext)
610
611/*
612 * BSS section
613 */
614.section ".bss.page_aligned","wa"
615	.align PAGE_SIZE_asm
616#ifdef CONFIG_X86_PAE
617swapper_pg_pmd:
618	.fill 1024*KPMDS,4,0
619#else
620ENTRY(swapper_pg_dir)
621	.fill 1024,4,0
622#endif
623swapper_pg_fixmap:
624	.fill 1024,4,0
625ENTRY(empty_zero_page)
626	.fill 4096,1,0
627/*
628 * This starts the data section.
629 */
630#ifdef CONFIG_X86_PAE
631.section ".data.page_aligned","wa"
632	/* Page-aligned for the benefit of paravirt? */
633	.align PAGE_SIZE_asm
634ENTRY(swapper_pg_dir)
635	.long	pa(swapper_pg_pmd+PGD_ATTR),0		/* low identity map */
636# if KPMDS == 3
637	.long	pa(swapper_pg_pmd+PGD_ATTR),0
638	.long	pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
639	.long	pa(swapper_pg_pmd+PGD_ATTR+0x2000),0
640# elif KPMDS == 2
641	.long	0,0
642	.long	pa(swapper_pg_pmd+PGD_ATTR),0
643	.long	pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
644# elif KPMDS == 1
645	.long	0,0
646	.long	0,0
647	.long	pa(swapper_pg_pmd+PGD_ATTR),0
648# else
649#  error "Kernel PMDs should be 1, 2 or 3"
650# endif
651	.align PAGE_SIZE_asm		/* needs to be page-sized too */
652#endif
653
654.data
655ENTRY(stack_start)
656	.long init_thread_union+THREAD_SIZE
657	.long __BOOT_DS
658
659ready:	.byte 0
660
661early_recursion_flag:
662	.long 0
663
664int_msg:
665	.asciz "Unknown interrupt or fault at EIP %p %p %p\n"
666
667fault_msg:
668/* fault info: */
669	.ascii "BUG: Int %d: CR2 %p\n"
670/* pusha regs: */
671	.ascii "     EDI %p  ESI %p  EBP %p  ESP %p\n"
672	.ascii "     EBX %p  EDX %p  ECX %p  EAX %p\n"
673/* fault frame: */
674	.ascii "     err %p  EIP %p   CS %p  flg %p\n"
675	.ascii "Stack: %p %p %p %p %p %p %p %p\n"
676	.ascii "       %p %p %p %p %p %p %p %p\n"
677	.asciz "       %p %p %p %p %p %p %p %p\n"
678
679#include "../../x86/xen/xen-head.S"
680
681/*
682 * The IDT and GDT 'descriptors' are a strange 48-bit object
683 * only used by the lidt and lgdt instructions. They are not
684 * like usual segment descriptors - they consist of a 16-bit
685 * segment size, and 32-bit linear address value:
686 */
687
688.globl boot_gdt_descr
689.globl idt_descr
690
691	ALIGN
692# early boot GDT descriptor (must use 1:1 address mapping)
693	.word 0				# 32 bit align gdt_desc.address
694boot_gdt_descr:
695	.word __BOOT_DS+7
696	.long boot_gdt - __PAGE_OFFSET
697
698	.word 0				# 32-bit align idt_desc.address
699idt_descr:
700	.word IDT_ENTRIES*8-1		# idt contains 256 entries
701	.long idt_table
702
703# boot GDT descriptor (later on used by CPU#0):
704	.word 0				# 32 bit align gdt_desc.address
705ENTRY(early_gdt_descr)
706	.word GDT_ENTRIES*8-1
707	.long per_cpu__gdt_page		/* Overwritten for secondary CPUs */
708
709/*
710 * The boot_gdt must mirror the equivalent in setup.S and is
711 * used only for booting.
712 */
713	.align L1_CACHE_BYTES
714ENTRY(boot_gdt)
715	.fill GDT_ENTRY_BOOT_CS,8,0
716	.quad 0x00cf9a000000ffff	/* kernel 4GB code at 0x00000000 */
717	.quad 0x00cf92000000ffff	/* kernel 4GB data at 0x00000000 */
718