1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * 6 * Enhanced CPU detection and feature setting code by Mike Jagdis 7 * and Martin Mares, November 1997. 8 */ 9 10.text 11#include <linux/threads.h> 12#include <linux/init.h> 13#include <linux/linkage.h> 14#include <asm/segment.h> 15#include <asm/page_types.h> 16#include <asm/pgtable_types.h> 17#include <asm/cache.h> 18#include <asm/thread_info.h> 19#include <asm/asm-offsets.h> 20#include <asm/setup.h> 21#include <asm/processor-flags.h> 22#include <asm/msr-index.h> 23#include <asm/cpufeatures.h> 24#include <asm/percpu.h> 25#include <asm/nops.h> 26#include <asm/bootparam.h> 27#include <asm/export.h> 28#include <asm/pgtable_32.h> 29 30/* Physical address */ 31#define pa(X) ((X) - __PAGE_OFFSET) 32 33/* 34 * References to members of the new_cpu_data structure. 35 */ 36 37#define X86 new_cpu_data+CPUINFO_x86 38#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 39#define X86_MODEL new_cpu_data+CPUINFO_x86_model 40#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping 41#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 42#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 43#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 44#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 45 46 47#define SIZEOF_PTREGS 17*4 48 49/* 50 * Worst-case size of the kernel mapping we need to make: 51 * a relocatable kernel can live anywhere in lowmem, so we need to be able 52 * to map all of lowmem. 53 */ 54KERNEL_PAGES = LOWMEM_PAGES 55 56INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE 57RESERVE_BRK(pagetables, INIT_MAP_SIZE) 58 59/* 60 * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 61 * %esi points to the real-mode code as a 32-bit pointer. 62 * CS and DS must be 4 GB flat segments, but we don't depend on 63 * any particular GDT layout, because we load our own as soon as we 64 * can. 65 */ 66__HEAD 67SYM_CODE_START(startup_32) 68 movl pa(initial_stack),%ecx 69 70/* 71 * Set segments to known values. 72 */ 73 lgdt pa(boot_gdt_descr) 74 movl $(__BOOT_DS),%eax 75 movl %eax,%ds 76 movl %eax,%es 77 movl %eax,%fs 78 movl %eax,%gs 79 movl %eax,%ss 80 leal -__PAGE_OFFSET(%ecx),%esp 81 82/* 83 * Clear BSS first so that there are no surprises... 84 */ 85 cld 86 xorl %eax,%eax 87 movl $pa(__bss_start),%edi 88 movl $pa(__bss_stop),%ecx 89 subl %edi,%ecx 90 shrl $2,%ecx 91 rep ; stosl 92/* 93 * Copy bootup parameters out of the way. 94 * Note: %esi still has the pointer to the real-mode data. 95 * With the kexec as boot loader, parameter segment might be loaded beyond 96 * kernel image and might not even be addressable by early boot page tables. 97 * (kexec on panic case). Hence copy out the parameters before initializing 98 * page tables. 99 */ 100 movl $pa(boot_params),%edi 101 movl $(PARAM_SIZE/4),%ecx 102 cld 103 rep 104 movsl 105 movl pa(boot_params) + NEW_CL_POINTER,%esi 106 andl %esi,%esi 107 jz 1f # No command line 108 movl $pa(boot_command_line),%edi 109 movl $(COMMAND_LINE_SIZE/4),%ecx 110 rep 111 movsl 1121: 113 114#ifdef CONFIG_OLPC 115 /* save OFW's pgdir table for later use when calling into OFW */ 116 movl %cr3, %eax 117 movl %eax, pa(olpc_ofw_pgd) 118#endif 119 120#ifdef CONFIG_MICROCODE 121 /* Early load ucode on BSP. */ 122 call load_ucode_bsp 123#endif 124 125 /* Create early pagetables. */ 126 call mk_early_pgtbl_32 127 128 /* Do early initialization of the fixmap area */ 129 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 130#ifdef CONFIG_X86_PAE 131#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 132 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) 133#else 134 movl %eax,pa(initial_page_table+0xffc) 135#endif 136 137 jmp .Ldefault_entry 138SYM_CODE_END(startup_32) 139 140#ifdef CONFIG_HOTPLUG_CPU 141/* 142 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 143 * up already except stack. We just set up stack here. Then call 144 * start_secondary(). 145 */ 146SYM_FUNC_START(start_cpu0) 147 movl initial_stack, %ecx 148 movl %ecx, %esp 149 call *(initial_code) 1501: jmp 1b 151SYM_FUNC_END(start_cpu0) 152#endif 153 154/* 155 * Non-boot CPU entry point; entered from trampoline.S 156 * We can't lgdt here, because lgdt itself uses a data segment, but 157 * we know the trampoline has already loaded the boot_gdt for us. 158 * 159 * If cpu hotplug is not supported then this code can go in init section 160 * which will be freed later 161 */ 162SYM_FUNC_START(startup_32_smp) 163 cld 164 movl $(__BOOT_DS),%eax 165 movl %eax,%ds 166 movl %eax,%es 167 movl %eax,%fs 168 movl %eax,%gs 169 movl pa(initial_stack),%ecx 170 movl %eax,%ss 171 leal -__PAGE_OFFSET(%ecx),%esp 172 173#ifdef CONFIG_MICROCODE 174 /* Early load ucode on AP. */ 175 call load_ucode_ap 176#endif 177 178.Ldefault_entry: 179 movl $(CR0_STATE & ~X86_CR0_PG),%eax 180 movl %eax,%cr0 181 182/* 183 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave 184 * bits like NT set. This would confuse the debugger if this code is traced. So 185 * initialize them properly now before switching to protected mode. That means 186 * DF in particular (even though we have cleared it earlier after copying the 187 * command line) because GCC expects it. 188 */ 189 pushl $0 190 popfl 191 192/* 193 * New page tables may be in 4Mbyte page mode and may be using the global pages. 194 * 195 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists 196 * if and only if CPUID exists and has flags other than the FPU flag set. 197 */ 198 movl $-1,pa(X86_CPUID) # preset CPUID level 199 movl $X86_EFLAGS_ID,%ecx 200 pushl %ecx 201 popfl # set EFLAGS=ID 202 pushfl 203 popl %eax # get EFLAGS 204 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set? 205 jz .Lenable_paging # hw disallowed setting of ID bit 206 # which means no CPUID and no CR4 207 208 xorl %eax,%eax 209 cpuid 210 movl %eax,pa(X86_CPUID) # save largest std CPUID function 211 212 movl $1,%eax 213 cpuid 214 andl $~1,%edx # Ignore CPUID.FPU 215 jz .Lenable_paging # No flags or only CPUID.FPU = no CR4 216 217 movl pa(mmu_cr4_features),%eax 218 movl %eax,%cr4 219 220 testb $X86_CR4_PAE, %al # check if PAE is enabled 221 jz .Lenable_paging 222 223 /* Check if extended functions are implemented */ 224 movl $0x80000000, %eax 225 cpuid 226 /* Value must be in the range 0x80000001 to 0x8000ffff */ 227 subl $0x80000001, %eax 228 cmpl $(0x8000ffff-0x80000001), %eax 229 ja .Lenable_paging 230 231 /* Clear bogus XD_DISABLE bits */ 232 call verify_cpu 233 234 mov $0x80000001, %eax 235 cpuid 236 /* Execute Disable bit supported? */ 237 btl $(X86_FEATURE_NX & 31), %edx 238 jnc .Lenable_paging 239 240 /* Setup EFER (Extended Feature Enable Register) */ 241 movl $MSR_EFER, %ecx 242 rdmsr 243 244 btsl $_EFER_NX, %eax 245 /* Make changes effective */ 246 wrmsr 247 248.Lenable_paging: 249 250/* 251 * Enable paging 252 */ 253 movl $pa(initial_page_table), %eax 254 movl %eax,%cr3 /* set the page table pointer.. */ 255 movl $CR0_STATE,%eax 256 movl %eax,%cr0 /* ..and set paging (PG) bit */ 257 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 2581: 259 /* Shift the stack pointer to a virtual address */ 260 addl $__PAGE_OFFSET, %esp 261 262/* 263 * start system 32-bit setup. We need to re-do some of the things done 264 * in 16-bit mode for the "real" operations. 265 */ 266 movl setup_once_ref,%eax 267 andl %eax,%eax 268 jz 1f # Did we do this already? 269 call *%eax 2701: 271 272/* 273 * Check if it is 486 274 */ 275 movb $4,X86 # at least 486 276 cmpl $-1,X86_CPUID 277 je .Lis486 278 279 /* get vendor info */ 280 xorl %eax,%eax # call CPUID with 0 -> return vendor ID 281 cpuid 282 movl %eax,X86_CPUID # save CPUID level 283 movl %ebx,X86_VENDOR_ID # lo 4 chars 284 movl %edx,X86_VENDOR_ID+4 # next 4 chars 285 movl %ecx,X86_VENDOR_ID+8 # last 4 chars 286 287 orl %eax,%eax # do we have processor info as well? 288 je .Lis486 289 290 movl $1,%eax # Use the CPUID instruction to get CPU type 291 cpuid 292 movb %al,%cl # save reg for future use 293 andb $0x0f,%ah # mask processor family 294 movb %ah,X86 295 andb $0xf0,%al # mask model 296 shrb $4,%al 297 movb %al,X86_MODEL 298 andb $0x0f,%cl # mask mask revision 299 movb %cl,X86_STEPPING 300 movl %edx,X86_CAPABILITY 301 302.Lis486: 303 movl $0x50022,%ecx # set AM, WP, NE and MP 304 movl %cr0,%eax 305 andl $0x80000011,%eax # Save PG,PE,ET 306 orl %ecx,%eax 307 movl %eax,%cr0 308 309 lgdt early_gdt_descr 310 ljmp $(__KERNEL_CS),$1f 3111: movl $(__KERNEL_DS),%eax # reload all the segment registers 312 movl %eax,%ss # after changing gdt. 313 314 movl $(__USER_DS),%eax # DS/ES contains default USER segment 315 movl %eax,%ds 316 movl %eax,%es 317 318 movl $(__KERNEL_PERCPU), %eax 319 movl %eax,%fs # set this cpu's percpu 320 321 xorl %eax,%eax 322 movl %eax,%gs # clear possible garbage in %gs 323 324 xorl %eax,%eax # Clear LDT 325 lldt %ax 326 327 call *(initial_code) 3281: jmp 1b 329SYM_FUNC_END(startup_32_smp) 330 331#include "verify_cpu.S" 332 333/* 334 * setup_once 335 * 336 * The setup work we only want to run on the BSP. 337 * 338 * Warning: %esi is live across this function. 339 */ 340__INIT 341setup_once: 342 andl $0,setup_once_ref /* Once is enough, thanks */ 343 ret 344 345SYM_FUNC_START(early_idt_handler_array) 346 # 36(%esp) %eflags 347 # 32(%esp) %cs 348 # 28(%esp) %eip 349 # 24(%rsp) error code 350 i = 0 351 .rept NUM_EXCEPTION_VECTORS 352 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 353 pushl $0 # Dummy error code, to make stack frame uniform 354 .endif 355 pushl $i # 20(%esp) Vector number 356 jmp early_idt_handler_common 357 i = i + 1 358 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 359 .endr 360SYM_FUNC_END(early_idt_handler_array) 361 362SYM_CODE_START_LOCAL(early_idt_handler_common) 363 /* 364 * The stack is the hardware frame, an error code or zero, and the 365 * vector number. 366 */ 367 cld 368 369 incl %ss:early_recursion_flag 370 371 /* The vector number is in pt_regs->gs */ 372 373 cld 374 pushl %fs /* pt_regs->fs (__fsh varies by model) */ 375 pushl %es /* pt_regs->es (__esh varies by model) */ 376 pushl %ds /* pt_regs->ds (__dsh varies by model) */ 377 pushl %eax /* pt_regs->ax */ 378 pushl %ebp /* pt_regs->bp */ 379 pushl %edi /* pt_regs->di */ 380 pushl %esi /* pt_regs->si */ 381 pushl %edx /* pt_regs->dx */ 382 pushl %ecx /* pt_regs->cx */ 383 pushl %ebx /* pt_regs->bx */ 384 385 /* Fix up DS and ES */ 386 movl $(__KERNEL_DS), %ecx 387 movl %ecx, %ds 388 movl %ecx, %es 389 390 /* Load the vector number into EDX */ 391 movl PT_GS(%esp), %edx 392 393 /* Load GS into pt_regs->gs (and maybe clobber __gsh) */ 394 movw %gs, PT_GS(%esp) 395 396 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */ 397 call early_fixup_exception 398 399 popl %ebx /* pt_regs->bx */ 400 popl %ecx /* pt_regs->cx */ 401 popl %edx /* pt_regs->dx */ 402 popl %esi /* pt_regs->si */ 403 popl %edi /* pt_regs->di */ 404 popl %ebp /* pt_regs->bp */ 405 popl %eax /* pt_regs->ax */ 406 popl %ds /* pt_regs->ds (always ignores __dsh) */ 407 popl %es /* pt_regs->es (always ignores __esh) */ 408 popl %fs /* pt_regs->fs (always ignores __fsh) */ 409 popl %gs /* pt_regs->gs (always ignores __gsh) */ 410 decl %ss:early_recursion_flag 411 addl $4, %esp /* pop pt_regs->orig_ax */ 412 iret 413SYM_CODE_END(early_idt_handler_common) 414 415/* This is the default interrupt "handler" :-) */ 416SYM_FUNC_START(early_ignore_irq) 417 cld 418#ifdef CONFIG_PRINTK 419 pushl %eax 420 pushl %ecx 421 pushl %edx 422 pushl %es 423 pushl %ds 424 movl $(__KERNEL_DS),%eax 425 movl %eax,%ds 426 movl %eax,%es 427 cmpl $2,early_recursion_flag 428 je hlt_loop 429 incl early_recursion_flag 430 pushl 16(%esp) 431 pushl 24(%esp) 432 pushl 32(%esp) 433 pushl 40(%esp) 434 pushl $int_msg 435 call printk 436 437 call dump_stack 438 439 addl $(5*4),%esp 440 popl %ds 441 popl %es 442 popl %edx 443 popl %ecx 444 popl %eax 445#endif 446 iret 447 448hlt_loop: 449 hlt 450 jmp hlt_loop 451SYM_FUNC_END(early_ignore_irq) 452 453__INITDATA 454 .align 4 455SYM_DATA(early_recursion_flag, .long 0) 456 457__REFDATA 458 .align 4 459SYM_DATA(initial_code, .long i386_start_kernel) 460SYM_DATA(setup_once_ref, .long setup_once) 461 462#ifdef CONFIG_PAGE_TABLE_ISOLATION 463#define PGD_ALIGN (2 * PAGE_SIZE) 464#define PTI_USER_PGD_FILL 1024 465#else 466#define PGD_ALIGN (PAGE_SIZE) 467#define PTI_USER_PGD_FILL 0 468#endif 469/* 470 * BSS section 471 */ 472__PAGE_ALIGNED_BSS 473 .align PGD_ALIGN 474#ifdef CONFIG_X86_PAE 475.globl initial_pg_pmd 476initial_pg_pmd: 477 .fill 1024*KPMDS,4,0 478#else 479.globl initial_page_table 480initial_page_table: 481 .fill 1024,4,0 482#endif 483 .align PGD_ALIGN 484initial_pg_fixmap: 485 .fill 1024,4,0 486.globl swapper_pg_dir 487 .align PGD_ALIGN 488swapper_pg_dir: 489 .fill 1024,4,0 490 .fill PTI_USER_PGD_FILL,4,0 491.globl empty_zero_page 492empty_zero_page: 493 .fill 4096,1,0 494EXPORT_SYMBOL(empty_zero_page) 495 496/* 497 * This starts the data section. 498 */ 499#ifdef CONFIG_X86_PAE 500__PAGE_ALIGNED_DATA 501 /* Page-aligned for the benefit of paravirt? */ 502 .align PGD_ALIGN 503SYM_DATA_START(initial_page_table) 504 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 505# if KPMDS == 3 506 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 507 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 508 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 509# elif KPMDS == 2 510 .long 0,0 511 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 512 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 513# elif KPMDS == 1 514 .long 0,0 515 .long 0,0 516 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 517# else 518# error "Kernel PMDs should be 1, 2 or 3" 519# endif 520 .align PAGE_SIZE /* needs to be page-sized too */ 521 522#ifdef CONFIG_PAGE_TABLE_ISOLATION 523 /* 524 * PTI needs another page so sync_initial_pagetable() works correctly 525 * and does not scribble over the data which is placed behind the 526 * actual initial_page_table. See clone_pgd_range(). 527 */ 528 .fill 1024, 4, 0 529#endif 530 531SYM_DATA_END(initial_page_table) 532#endif 533 534.data 535.balign 4 536/* 537 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 538 * reliably detect the end of the stack. 539 */ 540SYM_DATA(initial_stack, 541 .long init_thread_union + THREAD_SIZE - 542 SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING) 543 544__INITRODATA 545int_msg: 546 .asciz "Unknown interrupt or fault at: %p %p %p\n" 547 548#include "../../x86/xen/xen-head.S" 549 550/* 551 * The IDT and GDT 'descriptors' are a strange 48-bit object 552 * only used by the lidt and lgdt instructions. They are not 553 * like usual segment descriptors - they consist of a 16-bit 554 * segment size, and 32-bit linear address value: 555 */ 556 557 .data 558 ALIGN 559# early boot GDT descriptor (must use 1:1 address mapping) 560 .word 0 # 32 bit align gdt_desc.address 561SYM_DATA_START_LOCAL(boot_gdt_descr) 562 .word __BOOT_DS+7 563 .long boot_gdt - __PAGE_OFFSET 564SYM_DATA_END(boot_gdt_descr) 565 566# boot GDT descriptor (later on used by CPU#0): 567 .word 0 # 32 bit align gdt_desc.address 568SYM_DATA_START(early_gdt_descr) 569 .word GDT_ENTRIES*8-1 570 .long gdt_page /* Overwritten for secondary CPUs */ 571SYM_DATA_END(early_gdt_descr) 572 573/* 574 * The boot_gdt must mirror the equivalent in setup.S and is 575 * used only for booting. 576 */ 577 .align L1_CACHE_BYTES 578SYM_DATA_START(boot_gdt) 579 .fill GDT_ENTRY_BOOT_CS,8,0 580 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 581 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 582SYM_DATA_END(boot_gdt) 583