1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * prepare to run common code 4 * 5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6 */ 7 8 /* cpu_feature_enabled() cannot be used this early */ 9 #define USE_EARLY_PGTABLE_L5 10 11 #include <linux/init.h> 12 #include <linux/linkage.h> 13 #include <linux/types.h> 14 #include <linux/kernel.h> 15 #include <linux/string.h> 16 #include <linux/percpu.h> 17 #include <linux/start_kernel.h> 18 #include <linux/io.h> 19 #include <linux/memblock.h> 20 #include <linux/cc_platform.h> 21 #include <linux/pgtable.h> 22 23 #include <asm/asm.h> 24 #include <asm/page_64.h> 25 #include <asm/processor.h> 26 #include <asm/proto.h> 27 #include <asm/smp.h> 28 #include <asm/setup.h> 29 #include <asm/desc.h> 30 #include <asm/tlbflush.h> 31 #include <asm/sections.h> 32 #include <asm/kdebug.h> 33 #include <asm/e820/api.h> 34 #include <asm/bios_ebda.h> 35 #include <asm/bootparam_utils.h> 36 #include <asm/microcode.h> 37 #include <asm/kasan.h> 38 #include <asm/fixmap.h> 39 #include <asm/realmode.h> 40 #include <asm/extable.h> 41 #include <asm/trapnr.h> 42 #include <asm/sev.h> 43 #include <asm/tdx.h> 44 #include <asm/init.h> 45 46 /* 47 * Manage page tables very early on. 48 */ 49 extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD]; 50 unsigned int __initdata next_early_pgt; 51 SYM_PIC_ALIAS(next_early_pgt); 52 pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX); 53 54 unsigned int __pgtable_l5_enabled __ro_after_init; 55 unsigned int pgdir_shift __ro_after_init = 39; 56 EXPORT_SYMBOL(pgdir_shift); 57 unsigned int ptrs_per_p4d __ro_after_init = 1; 58 EXPORT_SYMBOL(ptrs_per_p4d); 59 60 unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4; 61 EXPORT_SYMBOL(page_offset_base); 62 unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4; 63 EXPORT_SYMBOL(vmalloc_base); 64 unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4; 65 EXPORT_SYMBOL(vmemmap_base); 66 67 /* Wipe all early page tables except for the kernel symbol map */ 68 static void __init reset_early_page_tables(void) 69 { 70 memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1)); 71 next_early_pgt = 0; 72 write_cr3(__sme_pa_nodebug(early_top_pgt)); 73 } 74 75 /* Create a new PMD entry */ 76 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd) 77 { 78 unsigned long physaddr = address - __PAGE_OFFSET; 79 pgdval_t pgd, *pgd_p; 80 p4dval_t p4d, *p4d_p; 81 pudval_t pud, *pud_p; 82 pmdval_t *pmd_p; 83 84 /* Invalid address or early pgt is done ? */ 85 if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt)) 86 return false; 87 88 again: 89 pgd_p = &early_top_pgt[pgd_index(address)].pgd; 90 pgd = *pgd_p; 91 92 /* 93 * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is 94 * critical -- __PAGE_OFFSET would point us back into the dynamic 95 * range and we might end up looping forever... 96 */ 97 if (!pgtable_l5_enabled()) 98 p4d_p = pgd_p; 99 else if (pgd) 100 p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 101 else { 102 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 103 reset_early_page_tables(); 104 goto again; 105 } 106 107 p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++]; 108 memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D); 109 *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 110 } 111 p4d_p += p4d_index(address); 112 p4d = *p4d_p; 113 114 if (p4d) 115 pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 116 else { 117 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 118 reset_early_page_tables(); 119 goto again; 120 } 121 122 pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++]; 123 memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD); 124 *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 125 } 126 pud_p += pud_index(address); 127 pud = *pud_p; 128 129 if (pud) 130 pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 131 else { 132 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 133 reset_early_page_tables(); 134 goto again; 135 } 136 137 pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++]; 138 memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD); 139 *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 140 } 141 pmd_p[pmd_index(address)] = pmd; 142 143 return true; 144 } 145 146 static bool __init early_make_pgtable(unsigned long address) 147 { 148 unsigned long physaddr = address - __PAGE_OFFSET; 149 pmdval_t pmd; 150 151 pmd = (physaddr & PMD_MASK) + early_pmd_flags; 152 153 return __early_make_pgtable(address, pmd); 154 } 155 156 void __init do_early_exception(struct pt_regs *regs, int trapnr) 157 { 158 if (trapnr == X86_TRAP_PF && 159 early_make_pgtable(native_read_cr2())) 160 return; 161 162 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) && 163 trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs)) 164 return; 165 166 if (trapnr == X86_TRAP_VE && tdx_early_handle_ve(regs)) 167 return; 168 169 early_fixup_exception(regs, trapnr); 170 } 171 172 /* Don't add a printk in there. printk relies on the PDA which is not initialized 173 yet. */ 174 void __init clear_bss(void) 175 { 176 memset(__bss_start, 0, 177 (unsigned long) __bss_stop - (unsigned long) __bss_start); 178 memset(__brk_base, 0, 179 (unsigned long) __brk_limit - (unsigned long) __brk_base); 180 } 181 182 static unsigned long get_cmd_line_ptr(void) 183 { 184 unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr; 185 186 cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32; 187 188 return cmd_line_ptr; 189 } 190 191 static void __init copy_bootdata(char *real_mode_data) 192 { 193 char * command_line; 194 unsigned long cmd_line_ptr; 195 196 /* 197 * If SME is active, this will create decrypted mappings of the 198 * boot data in advance of the copy operations. 199 */ 200 sme_map_bootdata(real_mode_data); 201 202 memcpy(&boot_params, real_mode_data, sizeof(boot_params)); 203 sanitize_boot_params(&boot_params); 204 cmd_line_ptr = get_cmd_line_ptr(); 205 if (cmd_line_ptr) { 206 command_line = __va(cmd_line_ptr); 207 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 208 } 209 210 /* 211 * The old boot data is no longer needed and won't be reserved, 212 * freeing up that memory for use by the system. If SME is active, 213 * we need to remove the mappings that were created so that the 214 * memory doesn't remain mapped as decrypted. 215 */ 216 sme_unmap_bootdata(real_mode_data); 217 } 218 219 asmlinkage __visible void __init __noreturn x86_64_start_kernel(char * real_mode_data) 220 { 221 /* 222 * Build-time sanity checks on the kernel image and module 223 * area mappings. (these are purely build-time and produce no code) 224 */ 225 BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map); 226 BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE); 227 BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE); 228 BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0); 229 BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0); 230 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL)); 231 MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) == 232 (__START_KERNEL & PGDIR_MASK))); 233 BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END); 234 235 cr4_init_shadow(); 236 237 /* Kill off the identity-map trampoline */ 238 reset_early_page_tables(); 239 240 if (pgtable_l5_enabled()) { 241 page_offset_base = __PAGE_OFFSET_BASE_L5; 242 vmalloc_base = __VMALLOC_BASE_L5; 243 vmemmap_base = __VMEMMAP_BASE_L5; 244 } 245 246 clear_bss(); 247 248 /* 249 * This needs to happen *before* kasan_early_init() because latter maps stuff 250 * into that page. 251 */ 252 clear_page(init_top_pgt); 253 254 /* 255 * SME support may update early_pmd_flags to include the memory 256 * encryption mask, so it needs to be called before anything 257 * that may generate a page fault. 258 */ 259 sme_early_init(); 260 261 kasan_early_init(); 262 263 /* 264 * Flush global TLB entries which could be left over from the trampoline page 265 * table. 266 * 267 * This needs to happen *after* kasan_early_init() as KASAN-enabled .configs 268 * instrument native_write_cr4() so KASAN must be initialized for that 269 * instrumentation to work. 270 */ 271 __native_tlb_flush_global(this_cpu_read(cpu_tlbstate.cr4)); 272 273 idt_setup_early_handler(); 274 275 /* Needed before cc_platform_has() can be used for TDX */ 276 tdx_early_init(); 277 278 copy_bootdata(__va(real_mode_data)); 279 280 /* 281 * Load microcode early on BSP. 282 */ 283 load_ucode_bsp(); 284 285 /* set init_top_pgt kernel high mapping*/ 286 init_top_pgt[511] = early_top_pgt[511]; 287 288 x86_64_start_reservations(real_mode_data); 289 } 290 291 void __init __noreturn x86_64_start_reservations(char *real_mode_data) 292 { 293 /* version is always not zero if it is copied */ 294 if (!boot_params.hdr.version) 295 copy_bootdata(__va(real_mode_data)); 296 297 x86_early_init_platform_quirks(); 298 299 switch (boot_params.hdr.hardware_subarch) { 300 case X86_SUBARCH_INTEL_MID: 301 x86_intel_mid_early_setup(); 302 break; 303 default: 304 break; 305 } 306 307 start_kernel(); 308 } 309 310 void early_setup_idt(void) 311 { 312 void *handler = NULL; 313 314 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) { 315 setup_ghcb(); 316 handler = vc_boot_ghcb; 317 } 318 319 startup_64_load_idt(handler); 320 } 321