xref: /linux/arch/x86/kernel/fpu/xstate.c (revision d195c39052d1da278a00a6744ce59c383b67b191)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * xsave/xrstor support.
4  *
5  * Author: Suresh Siddha <suresh.b.siddha@intel.com>
6  */
7 #include <linux/compat.h>
8 #include <linux/cpu.h>
9 #include <linux/mman.h>
10 #include <linux/pkeys.h>
11 #include <linux/seq_file.h>
12 #include <linux/proc_fs.h>
13 
14 #include <asm/fpu/api.h>
15 #include <asm/fpu/internal.h>
16 #include <asm/fpu/signal.h>
17 #include <asm/fpu/regset.h>
18 #include <asm/fpu/xstate.h>
19 
20 #include <asm/tlbflush.h>
21 #include <asm/cpufeature.h>
22 
23 /*
24  * Although we spell it out in here, the Processor Trace
25  * xfeature is completely unused.  We use other mechanisms
26  * to save/restore PT state in Linux.
27  */
28 static const char *xfeature_names[] =
29 {
30 	"x87 floating point registers"	,
31 	"SSE registers"			,
32 	"AVX registers"			,
33 	"MPX bounds registers"		,
34 	"MPX CSR"			,
35 	"AVX-512 opmask"		,
36 	"AVX-512 Hi256"			,
37 	"AVX-512 ZMM_Hi256"		,
38 	"Processor Trace (unused)"	,
39 	"Protection Keys User registers",
40 	"unknown xstate feature"	,
41 };
42 
43 static short xsave_cpuid_features[] __initdata = {
44 	X86_FEATURE_FPU,
45 	X86_FEATURE_XMM,
46 	X86_FEATURE_AVX,
47 	X86_FEATURE_MPX,
48 	X86_FEATURE_MPX,
49 	X86_FEATURE_AVX512F,
50 	X86_FEATURE_AVX512F,
51 	X86_FEATURE_AVX512F,
52 	X86_FEATURE_INTEL_PT,
53 	X86_FEATURE_PKU,
54 };
55 
56 /*
57  * Mask of xstate features supported by the CPU and the kernel:
58  */
59 u64 xfeatures_mask __read_mostly;
60 
61 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
62 static unsigned int xstate_sizes[XFEATURE_MAX]   = { [ 0 ... XFEATURE_MAX - 1] = -1};
63 static unsigned int xstate_comp_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
64 
65 /*
66  * The XSAVE area of kernel can be in standard or compacted format;
67  * it is always in standard format for user mode. This is the user
68  * mode standard format size used for signal and ptrace frames.
69  */
70 unsigned int fpu_user_xstate_size;
71 
72 /*
73  * Return whether the system supports a given xfeature.
74  *
75  * Also return the name of the (most advanced) feature that the caller requested:
76  */
77 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
78 {
79 	u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
80 
81 	if (unlikely(feature_name)) {
82 		long xfeature_idx, max_idx;
83 		u64 xfeatures_print;
84 		/*
85 		 * So we use FLS here to be able to print the most advanced
86 		 * feature that was requested but is missing. So if a driver
87 		 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
88 		 * missing AVX feature - this is the most informative message
89 		 * to users:
90 		 */
91 		if (xfeatures_missing)
92 			xfeatures_print = xfeatures_missing;
93 		else
94 			xfeatures_print = xfeatures_needed;
95 
96 		xfeature_idx = fls64(xfeatures_print)-1;
97 		max_idx = ARRAY_SIZE(xfeature_names)-1;
98 		xfeature_idx = min(xfeature_idx, max_idx);
99 
100 		*feature_name = xfeature_names[xfeature_idx];
101 	}
102 
103 	if (xfeatures_missing)
104 		return 0;
105 
106 	return 1;
107 }
108 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
109 
110 static bool xfeature_is_supervisor(int xfeature_nr)
111 {
112 	/*
113 	 * Extended State Enumeration Sub-leaves (EAX = 0DH, ECX = n, n > 1)
114 	 * returns ECX[0] set to (1) for a supervisor state, and cleared (0)
115 	 * for a user state.
116 	 */
117 	u32 eax, ebx, ecx, edx;
118 
119 	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
120 	return ecx & 1;
121 }
122 
123 /*
124  * When executing XSAVEOPT (or other optimized XSAVE instructions), if
125  * a processor implementation detects that an FPU state component is still
126  * (or is again) in its initialized state, it may clear the corresponding
127  * bit in the header.xfeatures field, and can skip the writeout of registers
128  * to the corresponding memory layout.
129  *
130  * This means that when the bit is zero, the state component might still contain
131  * some previous - non-initialized register state.
132  *
133  * Before writing xstate information to user-space we sanitize those components,
134  * to always ensure that the memory layout of a feature will be in the init state
135  * if the corresponding header bit is zero. This is to ensure that user-space doesn't
136  * see some stale state in the memory layout during signal handling, debugging etc.
137  */
138 void fpstate_sanitize_xstate(struct fpu *fpu)
139 {
140 	struct fxregs_state *fx = &fpu->state.fxsave;
141 	int feature_bit;
142 	u64 xfeatures;
143 
144 	if (!use_xsaveopt())
145 		return;
146 
147 	xfeatures = fpu->state.xsave.header.xfeatures;
148 
149 	/*
150 	 * None of the feature bits are in init state. So nothing else
151 	 * to do for us, as the memory layout is up to date.
152 	 */
153 	if ((xfeatures & xfeatures_mask) == xfeatures_mask)
154 		return;
155 
156 	/*
157 	 * FP is in init state
158 	 */
159 	if (!(xfeatures & XFEATURE_MASK_FP)) {
160 		fx->cwd = 0x37f;
161 		fx->swd = 0;
162 		fx->twd = 0;
163 		fx->fop = 0;
164 		fx->rip = 0;
165 		fx->rdp = 0;
166 		memset(&fx->st_space[0], 0, 128);
167 	}
168 
169 	/*
170 	 * SSE is in init state
171 	 */
172 	if (!(xfeatures & XFEATURE_MASK_SSE))
173 		memset(&fx->xmm_space[0], 0, 256);
174 
175 	/*
176 	 * First two features are FPU and SSE, which above we handled
177 	 * in a special way already:
178 	 */
179 	feature_bit = 0x2;
180 	xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
181 
182 	/*
183 	 * Update all the remaining memory layouts according to their
184 	 * standard xstate layout, if their header bit is in the init
185 	 * state:
186 	 */
187 	while (xfeatures) {
188 		if (xfeatures & 0x1) {
189 			int offset = xstate_comp_offsets[feature_bit];
190 			int size = xstate_sizes[feature_bit];
191 
192 			memcpy((void *)fx + offset,
193 			       (void *)&init_fpstate.xsave + offset,
194 			       size);
195 		}
196 
197 		xfeatures >>= 1;
198 		feature_bit++;
199 	}
200 }
201 
202 /*
203  * Enable the extended processor state save/restore feature.
204  * Called once per CPU onlining.
205  */
206 void fpu__init_cpu_xstate(void)
207 {
208 	if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
209 		return;
210 	/*
211 	 * Make it clear that XSAVES supervisor states are not yet
212 	 * implemented should anyone expect it to work by changing
213 	 * bits in XFEATURE_MASK_* macros and XCR0.
214 	 */
215 	WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR),
216 		"x86/fpu: XSAVES supervisor states are not yet implemented.\n");
217 
218 	xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR;
219 
220 	cr4_set_bits(X86_CR4_OSXSAVE);
221 	xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
222 }
223 
224 /*
225  * Note that in the future we will likely need a pair of
226  * functions here: one for user xstates and the other for
227  * system xstates.  For now, they are the same.
228  */
229 static int xfeature_enabled(enum xfeature xfeature)
230 {
231 	return !!(xfeatures_mask & (1UL << xfeature));
232 }
233 
234 /*
235  * Record the offsets and sizes of various xstates contained
236  * in the XSAVE state memory layout.
237  */
238 static void __init setup_xstate_features(void)
239 {
240 	u32 eax, ebx, ecx, edx, i;
241 	/* start at the beginnning of the "extended state" */
242 	unsigned int last_good_offset = offsetof(struct xregs_state,
243 						 extended_state_area);
244 	/*
245 	 * The FP xstates and SSE xstates are legacy states. They are always
246 	 * in the fixed offsets in the xsave area in either compacted form
247 	 * or standard form.
248 	 */
249 	xstate_offsets[XFEATURE_FP]	= 0;
250 	xstate_sizes[XFEATURE_FP]	= offsetof(struct fxregs_state,
251 						   xmm_space);
252 
253 	xstate_offsets[XFEATURE_SSE]	= xstate_sizes[XFEATURE_FP];
254 	xstate_sizes[XFEATURE_SSE]	= sizeof_field(struct fxregs_state,
255 						       xmm_space);
256 
257 	for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
258 		if (!xfeature_enabled(i))
259 			continue;
260 
261 		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
262 
263 		xstate_sizes[i] = eax;
264 
265 		/*
266 		 * If an xfeature is supervisor state, the offset in EBX is
267 		 * invalid, leave it to -1.
268 		 */
269 		if (xfeature_is_supervisor(i))
270 			continue;
271 
272 		xstate_offsets[i] = ebx;
273 
274 		/*
275 		 * In our xstate size checks, we assume that the highest-numbered
276 		 * xstate feature has the highest offset in the buffer.  Ensure
277 		 * it does.
278 		 */
279 		WARN_ONCE(last_good_offset > xstate_offsets[i],
280 			  "x86/fpu: misordered xstate at %d\n", last_good_offset);
281 
282 		last_good_offset = xstate_offsets[i];
283 	}
284 }
285 
286 static void __init print_xstate_feature(u64 xstate_mask)
287 {
288 	const char *feature_name;
289 
290 	if (cpu_has_xfeatures(xstate_mask, &feature_name))
291 		pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
292 }
293 
294 /*
295  * Print out all the supported xstate features:
296  */
297 static void __init print_xstate_features(void)
298 {
299 	print_xstate_feature(XFEATURE_MASK_FP);
300 	print_xstate_feature(XFEATURE_MASK_SSE);
301 	print_xstate_feature(XFEATURE_MASK_YMM);
302 	print_xstate_feature(XFEATURE_MASK_BNDREGS);
303 	print_xstate_feature(XFEATURE_MASK_BNDCSR);
304 	print_xstate_feature(XFEATURE_MASK_OPMASK);
305 	print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
306 	print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
307 	print_xstate_feature(XFEATURE_MASK_PKRU);
308 }
309 
310 /*
311  * This check is important because it is easy to get XSTATE_*
312  * confused with XSTATE_BIT_*.
313  */
314 #define CHECK_XFEATURE(nr) do {		\
315 	WARN_ON(nr < FIRST_EXTENDED_XFEATURE);	\
316 	WARN_ON(nr >= XFEATURE_MAX);	\
317 } while (0)
318 
319 /*
320  * We could cache this like xstate_size[], but we only use
321  * it here, so it would be a waste of space.
322  */
323 static int xfeature_is_aligned(int xfeature_nr)
324 {
325 	u32 eax, ebx, ecx, edx;
326 
327 	CHECK_XFEATURE(xfeature_nr);
328 
329 	if (!xfeature_enabled(xfeature_nr)) {
330 		WARN_ONCE(1, "Checking alignment of disabled xfeature %d\n",
331 			  xfeature_nr);
332 		return 0;
333 	}
334 
335 	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
336 	/*
337 	 * The value returned by ECX[1] indicates the alignment
338 	 * of state component 'i' when the compacted format
339 	 * of the extended region of an XSAVE area is used:
340 	 */
341 	return !!(ecx & 2);
342 }
343 
344 /*
345  * This function sets up offsets and sizes of all extended states in
346  * xsave area. This supports both standard format and compacted format
347  * of the xsave area.
348  */
349 static void __init setup_xstate_comp_offsets(void)
350 {
351 	unsigned int next_offset;
352 	int i;
353 
354 	/*
355 	 * The FP xstates and SSE xstates are legacy states. They are always
356 	 * in the fixed offsets in the xsave area in either compacted form
357 	 * or standard form.
358 	 */
359 	xstate_comp_offsets[XFEATURE_FP] = 0;
360 	xstate_comp_offsets[XFEATURE_SSE] = offsetof(struct fxregs_state,
361 						     xmm_space);
362 
363 	if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
364 		for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
365 			if (xfeature_enabled(i))
366 				xstate_comp_offsets[i] = xstate_offsets[i];
367 		}
368 		return;
369 	}
370 
371 	next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE;
372 
373 	for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
374 		if (!xfeature_enabled(i))
375 			continue;
376 
377 		if (xfeature_is_aligned(i))
378 			next_offset = ALIGN(next_offset, 64);
379 
380 		xstate_comp_offsets[i] = next_offset;
381 		next_offset += xstate_sizes[i];
382 	}
383 }
384 
385 /*
386  * Print out xstate component offsets and sizes
387  */
388 static void __init print_xstate_offset_size(void)
389 {
390 	int i;
391 
392 	for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
393 		if (!xfeature_enabled(i))
394 			continue;
395 		pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
396 			 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
397 	}
398 }
399 
400 /*
401  * setup the xstate image representing the init state
402  */
403 static void __init setup_init_fpu_buf(void)
404 {
405 	static int on_boot_cpu __initdata = 1;
406 
407 	WARN_ON_FPU(!on_boot_cpu);
408 	on_boot_cpu = 0;
409 
410 	if (!boot_cpu_has(X86_FEATURE_XSAVE))
411 		return;
412 
413 	setup_xstate_features();
414 	print_xstate_features();
415 
416 	if (boot_cpu_has(X86_FEATURE_XSAVES))
417 		init_fpstate.xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT |
418 						     xfeatures_mask;
419 
420 	/*
421 	 * Init all the features state with header.xfeatures being 0x0
422 	 */
423 	copy_kernel_to_xregs_booting(&init_fpstate.xsave);
424 
425 	/*
426 	 * Dump the init state again. This is to identify the init state
427 	 * of any feature which is not represented by all zero's.
428 	 */
429 	copy_xregs_to_kernel_booting(&init_fpstate.xsave);
430 }
431 
432 static int xfeature_uncompacted_offset(int xfeature_nr)
433 {
434 	u32 eax, ebx, ecx, edx;
435 
436 	/*
437 	 * Only XSAVES supports supervisor states and it uses compacted
438 	 * format. Checking a supervisor state's uncompacted offset is
439 	 * an error.
440 	 */
441 	if (XFEATURE_MASK_SUPERVISOR & BIT_ULL(xfeature_nr)) {
442 		WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
443 		return -1;
444 	}
445 
446 	CHECK_XFEATURE(xfeature_nr);
447 	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
448 	return ebx;
449 }
450 
451 static int xfeature_size(int xfeature_nr)
452 {
453 	u32 eax, ebx, ecx, edx;
454 
455 	CHECK_XFEATURE(xfeature_nr);
456 	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
457 	return eax;
458 }
459 
460 /*
461  * 'XSAVES' implies two different things:
462  * 1. saving of supervisor/system state
463  * 2. using the compacted format
464  *
465  * Use this function when dealing with the compacted format so
466  * that it is obvious which aspect of 'XSAVES' is being handled
467  * by the calling code.
468  */
469 int using_compacted_format(void)
470 {
471 	return boot_cpu_has(X86_FEATURE_XSAVES);
472 }
473 
474 /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
475 int validate_xstate_header(const struct xstate_header *hdr)
476 {
477 	/* No unknown or supervisor features may be set */
478 	if (hdr->xfeatures & (~xfeatures_mask | XFEATURE_MASK_SUPERVISOR))
479 		return -EINVAL;
480 
481 	/* Userspace must use the uncompacted format */
482 	if (hdr->xcomp_bv)
483 		return -EINVAL;
484 
485 	/*
486 	 * If 'reserved' is shrunken to add a new field, make sure to validate
487 	 * that new field here!
488 	 */
489 	BUILD_BUG_ON(sizeof(hdr->reserved) != 48);
490 
491 	/* No reserved bits may be set */
492 	if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved)))
493 		return -EINVAL;
494 
495 	return 0;
496 }
497 
498 static void __xstate_dump_leaves(void)
499 {
500 	int i;
501 	u32 eax, ebx, ecx, edx;
502 	static int should_dump = 1;
503 
504 	if (!should_dump)
505 		return;
506 	should_dump = 0;
507 	/*
508 	 * Dump out a few leaves past the ones that we support
509 	 * just in case there are some goodies up there
510 	 */
511 	for (i = 0; i < XFEATURE_MAX + 10; i++) {
512 		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
513 		pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
514 			XSTATE_CPUID, i, eax, ebx, ecx, edx);
515 	}
516 }
517 
518 #define XSTATE_WARN_ON(x) do {							\
519 	if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) {	\
520 		__xstate_dump_leaves();						\
521 	}									\
522 } while (0)
523 
524 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do {			\
525 	if ((nr == nr_macro) &&						\
526 	    WARN_ONCE(sz != sizeof(__struct),				\
527 		"%s: struct is %zu bytes, cpu state %d bytes\n",	\
528 		__stringify(nr_macro), sizeof(__struct), sz)) {		\
529 		__xstate_dump_leaves();					\
530 	}								\
531 } while (0)
532 
533 /*
534  * We have a C struct for each 'xstate'.  We need to ensure
535  * that our software representation matches what the CPU
536  * tells us about the state's size.
537  */
538 static void check_xstate_against_struct(int nr)
539 {
540 	/*
541 	 * Ask the CPU for the size of the state.
542 	 */
543 	int sz = xfeature_size(nr);
544 	/*
545 	 * Match each CPU state with the corresponding software
546 	 * structure.
547 	 */
548 	XCHECK_SZ(sz, nr, XFEATURE_YMM,       struct ymmh_struct);
549 	XCHECK_SZ(sz, nr, XFEATURE_BNDREGS,   struct mpx_bndreg_state);
550 	XCHECK_SZ(sz, nr, XFEATURE_BNDCSR,    struct mpx_bndcsr_state);
551 	XCHECK_SZ(sz, nr, XFEATURE_OPMASK,    struct avx_512_opmask_state);
552 	XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
553 	XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM,  struct avx_512_hi16_state);
554 	XCHECK_SZ(sz, nr, XFEATURE_PKRU,      struct pkru_state);
555 
556 	/*
557 	 * Make *SURE* to add any feature numbers in below if
558 	 * there are "holes" in the xsave state component
559 	 * numbers.
560 	 */
561 	if ((nr < XFEATURE_YMM) ||
562 	    (nr >= XFEATURE_MAX) ||
563 	    (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
564 		WARN_ONCE(1, "no structure for xstate: %d\n", nr);
565 		XSTATE_WARN_ON(1);
566 	}
567 }
568 
569 /*
570  * This essentially double-checks what the cpu told us about
571  * how large the XSAVE buffer needs to be.  We are recalculating
572  * it to be safe.
573  */
574 static void do_extra_xstate_size_checks(void)
575 {
576 	int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
577 	int i;
578 
579 	for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
580 		if (!xfeature_enabled(i))
581 			continue;
582 
583 		check_xstate_against_struct(i);
584 		/*
585 		 * Supervisor state components can be managed only by
586 		 * XSAVES, which is compacted-format only.
587 		 */
588 		if (!using_compacted_format())
589 			XSTATE_WARN_ON(xfeature_is_supervisor(i));
590 
591 		/* Align from the end of the previous feature */
592 		if (xfeature_is_aligned(i))
593 			paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
594 		/*
595 		 * The offset of a given state in the non-compacted
596 		 * format is given to us in a CPUID leaf.  We check
597 		 * them for being ordered (increasing offsets) in
598 		 * setup_xstate_features().
599 		 */
600 		if (!using_compacted_format())
601 			paranoid_xstate_size = xfeature_uncompacted_offset(i);
602 		/*
603 		 * The compacted-format offset always depends on where
604 		 * the previous state ended.
605 		 */
606 		paranoid_xstate_size += xfeature_size(i);
607 	}
608 	XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
609 }
610 
611 
612 /*
613  * Get total size of enabled xstates in XCR0/xfeatures_mask.
614  *
615  * Note the SDM's wording here.  "sub-function 0" only enumerates
616  * the size of the *user* states.  If we use it to size a buffer
617  * that we use 'XSAVES' on, we could potentially overflow the
618  * buffer because 'XSAVES' saves system states too.
619  *
620  * Note that we do not currently set any bits on IA32_XSS so
621  * 'XCR0 | IA32_XSS == XCR0' for now.
622  */
623 static unsigned int __init get_xsaves_size(void)
624 {
625 	unsigned int eax, ebx, ecx, edx;
626 	/*
627 	 * - CPUID function 0DH, sub-function 1:
628 	 *    EBX enumerates the size (in bytes) required by
629 	 *    the XSAVES instruction for an XSAVE area
630 	 *    containing all the state components
631 	 *    corresponding to bits currently set in
632 	 *    XCR0 | IA32_XSS.
633 	 */
634 	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
635 	return ebx;
636 }
637 
638 static unsigned int __init get_xsave_size(void)
639 {
640 	unsigned int eax, ebx, ecx, edx;
641 	/*
642 	 * - CPUID function 0DH, sub-function 0:
643 	 *    EBX enumerates the size (in bytes) required by
644 	 *    the XSAVE instruction for an XSAVE area
645 	 *    containing all the *user* state components
646 	 *    corresponding to bits currently set in XCR0.
647 	 */
648 	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
649 	return ebx;
650 }
651 
652 /*
653  * Will the runtime-enumerated 'xstate_size' fit in the init
654  * task's statically-allocated buffer?
655  */
656 static bool is_supported_xstate_size(unsigned int test_xstate_size)
657 {
658 	if (test_xstate_size <= sizeof(union fpregs_state))
659 		return true;
660 
661 	pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
662 			sizeof(union fpregs_state), test_xstate_size);
663 	return false;
664 }
665 
666 static int __init init_xstate_size(void)
667 {
668 	/* Recompute the context size for enabled features: */
669 	unsigned int possible_xstate_size;
670 	unsigned int xsave_size;
671 
672 	xsave_size = get_xsave_size();
673 
674 	if (boot_cpu_has(X86_FEATURE_XSAVES))
675 		possible_xstate_size = get_xsaves_size();
676 	else
677 		possible_xstate_size = xsave_size;
678 
679 	/* Ensure we have the space to store all enabled: */
680 	if (!is_supported_xstate_size(possible_xstate_size))
681 		return -EINVAL;
682 
683 	/*
684 	 * The size is OK, we are definitely going to use xsave,
685 	 * make it known to the world that we need more space.
686 	 */
687 	fpu_kernel_xstate_size = possible_xstate_size;
688 	do_extra_xstate_size_checks();
689 
690 	/*
691 	 * User space is always in standard format.
692 	 */
693 	fpu_user_xstate_size = xsave_size;
694 	return 0;
695 }
696 
697 /*
698  * We enabled the XSAVE hardware, but something went wrong and
699  * we can not use it.  Disable it.
700  */
701 static void fpu__init_disable_system_xstate(void)
702 {
703 	xfeatures_mask = 0;
704 	cr4_clear_bits(X86_CR4_OSXSAVE);
705 	setup_clear_cpu_cap(X86_FEATURE_XSAVE);
706 }
707 
708 /*
709  * Enable and initialize the xsave feature.
710  * Called once per system bootup.
711  */
712 void __init fpu__init_system_xstate(void)
713 {
714 	unsigned int eax, ebx, ecx, edx;
715 	static int on_boot_cpu __initdata = 1;
716 	int err;
717 	int i;
718 
719 	WARN_ON_FPU(!on_boot_cpu);
720 	on_boot_cpu = 0;
721 
722 	if (!boot_cpu_has(X86_FEATURE_FPU)) {
723 		pr_info("x86/fpu: No FPU detected\n");
724 		return;
725 	}
726 
727 	if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
728 		pr_info("x86/fpu: x87 FPU will use %s\n",
729 			boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE");
730 		return;
731 	}
732 
733 	if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
734 		WARN_ON_FPU(1);
735 		return;
736 	}
737 
738 	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
739 	xfeatures_mask = eax + ((u64)edx << 32);
740 
741 	if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
742 		/*
743 		 * This indicates that something really unexpected happened
744 		 * with the enumeration.  Disable XSAVE and try to continue
745 		 * booting without it.  This is too early to BUG().
746 		 */
747 		pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
748 		goto out_disable;
749 	}
750 
751 	/*
752 	 * Clear XSAVE features that are disabled in the normal CPUID.
753 	 */
754 	for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
755 		if (!boot_cpu_has(xsave_cpuid_features[i]))
756 			xfeatures_mask &= ~BIT(i);
757 	}
758 
759 	xfeatures_mask &= fpu__get_supported_xfeatures_mask();
760 
761 	/* Enable xstate instructions to be able to continue with initialization: */
762 	fpu__init_cpu_xstate();
763 	err = init_xstate_size();
764 	if (err)
765 		goto out_disable;
766 
767 	/*
768 	 * Update info used for ptrace frames; use standard-format size and no
769 	 * supervisor xstates:
770 	 */
771 	update_regset_xstate_info(fpu_user_xstate_size,	xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
772 
773 	fpu__init_prepare_fx_sw_frame();
774 	setup_init_fpu_buf();
775 	setup_xstate_comp_offsets();
776 	print_xstate_offset_size();
777 
778 	pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
779 		xfeatures_mask,
780 		fpu_kernel_xstate_size,
781 		boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
782 	return;
783 
784 out_disable:
785 	/* something went wrong, try to boot without any XSAVE support */
786 	fpu__init_disable_system_xstate();
787 }
788 
789 /*
790  * Restore minimal FPU state after suspend:
791  */
792 void fpu__resume_cpu(void)
793 {
794 	/*
795 	 * Restore XCR0 on xsave capable CPUs:
796 	 */
797 	if (boot_cpu_has(X86_FEATURE_XSAVE))
798 		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
799 }
800 
801 /*
802  * Given an xstate feature nr, calculate where in the xsave
803  * buffer the state is.  Callers should ensure that the buffer
804  * is valid.
805  */
806 static void *__raw_xsave_addr(struct xregs_state *xsave, int xfeature_nr)
807 {
808 	if (!xfeature_enabled(xfeature_nr)) {
809 		WARN_ON_FPU(1);
810 		return NULL;
811 	}
812 
813 	return (void *)xsave + xstate_comp_offsets[xfeature_nr];
814 }
815 /*
816  * Given the xsave area and a state inside, this function returns the
817  * address of the state.
818  *
819  * This is the API that is called to get xstate address in either
820  * standard format or compacted format of xsave area.
821  *
822  * Note that if there is no data for the field in the xsave buffer
823  * this will return NULL.
824  *
825  * Inputs:
826  *	xstate: the thread's storage area for all FPU data
827  *	xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP,
828  *	XFEATURE_SSE, etc...)
829  * Output:
830  *	address of the state in the xsave area, or NULL if the
831  *	field is not present in the xsave buffer.
832  */
833 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr)
834 {
835 	/*
836 	 * Do we even *have* xsave state?
837 	 */
838 	if (!boot_cpu_has(X86_FEATURE_XSAVE))
839 		return NULL;
840 
841 	/*
842 	 * We should not ever be requesting features that we
843 	 * have not enabled.  Remember that xfeatures_mask is
844 	 * what we write to the XCR0 register.
845 	 */
846 	WARN_ONCE(!(xfeatures_mask & BIT_ULL(xfeature_nr)),
847 		  "get of unsupported state");
848 	/*
849 	 * This assumes the last 'xsave*' instruction to
850 	 * have requested that 'xfeature_nr' be saved.
851 	 * If it did not, we might be seeing and old value
852 	 * of the field in the buffer.
853 	 *
854 	 * This can happen because the last 'xsave' did not
855 	 * request that this feature be saved (unlikely)
856 	 * or because the "init optimization" caused it
857 	 * to not be saved.
858 	 */
859 	if (!(xsave->header.xfeatures & BIT_ULL(xfeature_nr)))
860 		return NULL;
861 
862 	return __raw_xsave_addr(xsave, xfeature_nr);
863 }
864 EXPORT_SYMBOL_GPL(get_xsave_addr);
865 
866 /*
867  * This wraps up the common operations that need to occur when retrieving
868  * data from xsave state.  It first ensures that the current task was
869  * using the FPU and retrieves the data in to a buffer.  It then calculates
870  * the offset of the requested field in the buffer.
871  *
872  * This function is safe to call whether the FPU is in use or not.
873  *
874  * Note that this only works on the current task.
875  *
876  * Inputs:
877  *	@xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP,
878  *	XFEATURE_SSE, etc...)
879  * Output:
880  *	address of the state in the xsave area or NULL if the state
881  *	is not present or is in its 'init state'.
882  */
883 const void *get_xsave_field_ptr(int xfeature_nr)
884 {
885 	struct fpu *fpu = &current->thread.fpu;
886 
887 	/*
888 	 * fpu__save() takes the CPU's xstate registers
889 	 * and saves them off to the 'fpu memory buffer.
890 	 */
891 	fpu__save(fpu);
892 
893 	return get_xsave_addr(&fpu->state.xsave, xfeature_nr);
894 }
895 
896 #ifdef CONFIG_ARCH_HAS_PKEYS
897 
898 /*
899  * This will go out and modify PKRU register to set the access
900  * rights for @pkey to @init_val.
901  */
902 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
903 		unsigned long init_val)
904 {
905 	u32 old_pkru;
906 	int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
907 	u32 new_pkru_bits = 0;
908 
909 	/*
910 	 * This check implies XSAVE support.  OSPKE only gets
911 	 * set if we enable XSAVE and we enable PKU in XCR0.
912 	 */
913 	if (!boot_cpu_has(X86_FEATURE_OSPKE))
914 		return -EINVAL;
915 
916 	/*
917 	 * This code should only be called with valid 'pkey'
918 	 * values originating from in-kernel users.  Complain
919 	 * if a bad value is observed.
920 	 */
921 	WARN_ON_ONCE(pkey >= arch_max_pkey());
922 
923 	/* Set the bits we need in PKRU:  */
924 	if (init_val & PKEY_DISABLE_ACCESS)
925 		new_pkru_bits |= PKRU_AD_BIT;
926 	if (init_val & PKEY_DISABLE_WRITE)
927 		new_pkru_bits |= PKRU_WD_BIT;
928 
929 	/* Shift the bits in to the correct place in PKRU for pkey: */
930 	new_pkru_bits <<= pkey_shift;
931 
932 	/* Get old PKRU and mask off any old bits in place: */
933 	old_pkru = read_pkru();
934 	old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
935 
936 	/* Write old part along with new part: */
937 	write_pkru(old_pkru | new_pkru_bits);
938 
939 	return 0;
940 }
941 #endif /* ! CONFIG_ARCH_HAS_PKEYS */
942 
943 /*
944  * Weird legacy quirk: SSE and YMM states store information in the
945  * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP
946  * area is marked as unused in the xfeatures header, we need to copy
947  * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use.
948  */
949 static inline bool xfeatures_mxcsr_quirk(u64 xfeatures)
950 {
951 	if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM)))
952 		return false;
953 
954 	if (xfeatures & XFEATURE_MASK_FP)
955 		return false;
956 
957 	return true;
958 }
959 
960 /*
961  * This is similar to user_regset_copyout(), but will not add offset to
962  * the source data pointer or increment pos, count, kbuf, and ubuf.
963  */
964 static inline void
965 __copy_xstate_to_kernel(void *kbuf, const void *data,
966 			unsigned int offset, unsigned int size, unsigned int size_total)
967 {
968 	if (offset < size_total) {
969 		unsigned int copy = min(size, size_total - offset);
970 
971 		memcpy(kbuf + offset, data, copy);
972 	}
973 }
974 
975 /*
976  * Convert from kernel XSAVES compacted format to standard format and copy
977  * to a kernel-space ptrace buffer.
978  *
979  * It supports partial copy but pos always starts from zero. This is called
980  * from xstateregs_get() and there we check the CPU has XSAVES.
981  */
982 int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
983 {
984 	unsigned int offset, size;
985 	struct xstate_header header;
986 	int i;
987 
988 	/*
989 	 * Currently copy_regset_to_user() starts from pos 0:
990 	 */
991 	if (unlikely(offset_start != 0))
992 		return -EFAULT;
993 
994 	/*
995 	 * The destination is a ptrace buffer; we put in only user xstates:
996 	 */
997 	memset(&header, 0, sizeof(header));
998 	header.xfeatures = xsave->header.xfeatures;
999 	header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1000 
1001 	/*
1002 	 * Copy xregs_state->header:
1003 	 */
1004 	offset = offsetof(struct xregs_state, header);
1005 	size = sizeof(header);
1006 
1007 	__copy_xstate_to_kernel(kbuf, &header, offset, size, size_total);
1008 
1009 	for (i = 0; i < XFEATURE_MAX; i++) {
1010 		/*
1011 		 * Copy only in-use xstates:
1012 		 */
1013 		if ((header.xfeatures >> i) & 1) {
1014 			void *src = __raw_xsave_addr(xsave, i);
1015 
1016 			offset = xstate_offsets[i];
1017 			size = xstate_sizes[i];
1018 
1019 			/* The next component has to fit fully into the output buffer: */
1020 			if (offset + size > size_total)
1021 				break;
1022 
1023 			__copy_xstate_to_kernel(kbuf, src, offset, size, size_total);
1024 		}
1025 
1026 	}
1027 
1028 	if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1029 		offset = offsetof(struct fxregs_state, mxcsr);
1030 		size = MXCSR_AND_FLAGS_SIZE;
1031 		__copy_xstate_to_kernel(kbuf, &xsave->i387.mxcsr, offset, size, size_total);
1032 	}
1033 
1034 	/*
1035 	 * Fill xsave->i387.sw_reserved value for ptrace frame:
1036 	 */
1037 	offset = offsetof(struct fxregs_state, sw_reserved);
1038 	size = sizeof(xstate_fx_sw_bytes);
1039 
1040 	__copy_xstate_to_kernel(kbuf, xstate_fx_sw_bytes, offset, size, size_total);
1041 
1042 	return 0;
1043 }
1044 
1045 static inline int
1046 __copy_xstate_to_user(void __user *ubuf, const void *data, unsigned int offset, unsigned int size, unsigned int size_total)
1047 {
1048 	if (!size)
1049 		return 0;
1050 
1051 	if (offset < size_total) {
1052 		unsigned int copy = min(size, size_total - offset);
1053 
1054 		if (__copy_to_user(ubuf + offset, data, copy))
1055 			return -EFAULT;
1056 	}
1057 	return 0;
1058 }
1059 
1060 /*
1061  * Convert from kernel XSAVES compacted format to standard format and copy
1062  * to a user-space buffer. It supports partial copy but pos always starts from
1063  * zero. This is called from xstateregs_get() and there we check the CPU
1064  * has XSAVES.
1065  */
1066 int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
1067 {
1068 	unsigned int offset, size;
1069 	int ret, i;
1070 	struct xstate_header header;
1071 
1072 	/*
1073 	 * Currently copy_regset_to_user() starts from pos 0:
1074 	 */
1075 	if (unlikely(offset_start != 0))
1076 		return -EFAULT;
1077 
1078 	/*
1079 	 * The destination is a ptrace buffer; we put in only user xstates:
1080 	 */
1081 	memset(&header, 0, sizeof(header));
1082 	header.xfeatures = xsave->header.xfeatures;
1083 	header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1084 
1085 	/*
1086 	 * Copy xregs_state->header:
1087 	 */
1088 	offset = offsetof(struct xregs_state, header);
1089 	size = sizeof(header);
1090 
1091 	ret = __copy_xstate_to_user(ubuf, &header, offset, size, size_total);
1092 	if (ret)
1093 		return ret;
1094 
1095 	for (i = 0; i < XFEATURE_MAX; i++) {
1096 		/*
1097 		 * Copy only in-use xstates:
1098 		 */
1099 		if ((header.xfeatures >> i) & 1) {
1100 			void *src = __raw_xsave_addr(xsave, i);
1101 
1102 			offset = xstate_offsets[i];
1103 			size = xstate_sizes[i];
1104 
1105 			/* The next component has to fit fully into the output buffer: */
1106 			if (offset + size > size_total)
1107 				break;
1108 
1109 			ret = __copy_xstate_to_user(ubuf, src, offset, size, size_total);
1110 			if (ret)
1111 				return ret;
1112 		}
1113 
1114 	}
1115 
1116 	if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1117 		offset = offsetof(struct fxregs_state, mxcsr);
1118 		size = MXCSR_AND_FLAGS_SIZE;
1119 		__copy_xstate_to_user(ubuf, &xsave->i387.mxcsr, offset, size, size_total);
1120 	}
1121 
1122 	/*
1123 	 * Fill xsave->i387.sw_reserved value for ptrace frame:
1124 	 */
1125 	offset = offsetof(struct fxregs_state, sw_reserved);
1126 	size = sizeof(xstate_fx_sw_bytes);
1127 
1128 	ret = __copy_xstate_to_user(ubuf, xstate_fx_sw_bytes, offset, size, size_total);
1129 	if (ret)
1130 		return ret;
1131 
1132 	return 0;
1133 }
1134 
1135 /*
1136  * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format
1137  * and copy to the target thread. This is called from xstateregs_set().
1138  */
1139 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
1140 {
1141 	unsigned int offset, size;
1142 	int i;
1143 	struct xstate_header hdr;
1144 
1145 	offset = offsetof(struct xregs_state, header);
1146 	size = sizeof(hdr);
1147 
1148 	memcpy(&hdr, kbuf + offset, size);
1149 
1150 	if (validate_xstate_header(&hdr))
1151 		return -EINVAL;
1152 
1153 	for (i = 0; i < XFEATURE_MAX; i++) {
1154 		u64 mask = ((u64)1 << i);
1155 
1156 		if (hdr.xfeatures & mask) {
1157 			void *dst = __raw_xsave_addr(xsave, i);
1158 
1159 			offset = xstate_offsets[i];
1160 			size = xstate_sizes[i];
1161 
1162 			memcpy(dst, kbuf + offset, size);
1163 		}
1164 	}
1165 
1166 	if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1167 		offset = offsetof(struct fxregs_state, mxcsr);
1168 		size = MXCSR_AND_FLAGS_SIZE;
1169 		memcpy(&xsave->i387.mxcsr, kbuf + offset, size);
1170 	}
1171 
1172 	/*
1173 	 * The state that came in from userspace was user-state only.
1174 	 * Mask all the user states out of 'xfeatures':
1175 	 */
1176 	xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1177 
1178 	/*
1179 	 * Add back in the features that came in from userspace:
1180 	 */
1181 	xsave->header.xfeatures |= hdr.xfeatures;
1182 
1183 	return 0;
1184 }
1185 
1186 /*
1187  * Convert from a ptrace or sigreturn standard-format user-space buffer to
1188  * kernel XSAVES format and copy to the target thread. This is called from
1189  * xstateregs_set(), as well as potentially from the sigreturn() and
1190  * rt_sigreturn() system calls.
1191  */
1192 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf)
1193 {
1194 	unsigned int offset, size;
1195 	int i;
1196 	struct xstate_header hdr;
1197 
1198 	offset = offsetof(struct xregs_state, header);
1199 	size = sizeof(hdr);
1200 
1201 	if (__copy_from_user(&hdr, ubuf + offset, size))
1202 		return -EFAULT;
1203 
1204 	if (validate_xstate_header(&hdr))
1205 		return -EINVAL;
1206 
1207 	for (i = 0; i < XFEATURE_MAX; i++) {
1208 		u64 mask = ((u64)1 << i);
1209 
1210 		if (hdr.xfeatures & mask) {
1211 			void *dst = __raw_xsave_addr(xsave, i);
1212 
1213 			offset = xstate_offsets[i];
1214 			size = xstate_sizes[i];
1215 
1216 			if (__copy_from_user(dst, ubuf + offset, size))
1217 				return -EFAULT;
1218 		}
1219 	}
1220 
1221 	if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1222 		offset = offsetof(struct fxregs_state, mxcsr);
1223 		size = MXCSR_AND_FLAGS_SIZE;
1224 		if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size))
1225 			return -EFAULT;
1226 	}
1227 
1228 	/*
1229 	 * The state that came in from userspace was user-state only.
1230 	 * Mask all the user states out of 'xfeatures':
1231 	 */
1232 	xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1233 
1234 	/*
1235 	 * Add back in the features that came in from userspace:
1236 	 */
1237 	xsave->header.xfeatures |= hdr.xfeatures;
1238 
1239 	return 0;
1240 }
1241 
1242 #ifdef CONFIG_PROC_PID_ARCH_STATUS
1243 /*
1244  * Report the amount of time elapsed in millisecond since last AVX512
1245  * use in the task.
1246  */
1247 static void avx512_status(struct seq_file *m, struct task_struct *task)
1248 {
1249 	unsigned long timestamp = READ_ONCE(task->thread.fpu.avx512_timestamp);
1250 	long delta;
1251 
1252 	if (!timestamp) {
1253 		/*
1254 		 * Report -1 if no AVX512 usage
1255 		 */
1256 		delta = -1;
1257 	} else {
1258 		delta = (long)(jiffies - timestamp);
1259 		/*
1260 		 * Cap to LONG_MAX if time difference > LONG_MAX
1261 		 */
1262 		if (delta < 0)
1263 			delta = LONG_MAX;
1264 		delta = jiffies_to_msecs(delta);
1265 	}
1266 
1267 	seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta);
1268 	seq_putc(m, '\n');
1269 }
1270 
1271 /*
1272  * Report architecture specific information
1273  */
1274 int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns,
1275 			struct pid *pid, struct task_struct *task)
1276 {
1277 	/*
1278 	 * Report AVX512 state if the processor and build option supported.
1279 	 */
1280 	if (cpu_feature_enabled(X86_FEATURE_AVX512F))
1281 		avx512_status(m, task);
1282 
1283 	return 0;
1284 }
1285 #endif /* CONFIG_PROC_PID_ARCH_STATUS */
1286