1 /* 2 * xsave/xrstor support. 3 * 4 * Author: Suresh Siddha <suresh.b.siddha@intel.com> 5 */ 6 #include <linux/compat.h> 7 #include <linux/cpu.h> 8 #include <linux/pkeys.h> 9 10 #include <asm/fpu/api.h> 11 #include <asm/fpu/internal.h> 12 #include <asm/fpu/signal.h> 13 #include <asm/fpu/regset.h> 14 #include <asm/fpu/xstate.h> 15 16 #include <asm/tlbflush.h> 17 18 /* 19 * Although we spell it out in here, the Processor Trace 20 * xfeature is completely unused. We use other mechanisms 21 * to save/restore PT state in Linux. 22 */ 23 static const char *xfeature_names[] = 24 { 25 "x87 floating point registers" , 26 "SSE registers" , 27 "AVX registers" , 28 "MPX bounds registers" , 29 "MPX CSR" , 30 "AVX-512 opmask" , 31 "AVX-512 Hi256" , 32 "AVX-512 ZMM_Hi256" , 33 "Processor Trace (unused)" , 34 "Protection Keys User registers", 35 "unknown xstate feature" , 36 }; 37 38 /* 39 * Mask of xstate features supported by the CPU and the kernel: 40 */ 41 u64 xfeatures_mask __read_mostly; 42 43 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 44 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 45 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8]; 46 47 /* 48 * The XSAVE area of kernel can be in standard or compacted format; 49 * it is always in standard format for user mode. This is the user 50 * mode standard format size used for signal and ptrace frames. 51 */ 52 unsigned int fpu_user_xstate_size; 53 54 /* 55 * Clear all of the X86_FEATURE_* bits that are unavailable 56 * when the CPU has no XSAVE support. 57 */ 58 void fpu__xstate_clear_all_cpu_caps(void) 59 { 60 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 61 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); 62 setup_clear_cpu_cap(X86_FEATURE_XSAVEC); 63 setup_clear_cpu_cap(X86_FEATURE_XSAVES); 64 setup_clear_cpu_cap(X86_FEATURE_AVX); 65 setup_clear_cpu_cap(X86_FEATURE_AVX2); 66 setup_clear_cpu_cap(X86_FEATURE_AVX512F); 67 setup_clear_cpu_cap(X86_FEATURE_AVX512PF); 68 setup_clear_cpu_cap(X86_FEATURE_AVX512ER); 69 setup_clear_cpu_cap(X86_FEATURE_AVX512CD); 70 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ); 71 setup_clear_cpu_cap(X86_FEATURE_AVX512BW); 72 setup_clear_cpu_cap(X86_FEATURE_AVX512VL); 73 setup_clear_cpu_cap(X86_FEATURE_MPX); 74 setup_clear_cpu_cap(X86_FEATURE_XGETBV1); 75 setup_clear_cpu_cap(X86_FEATURE_PKU); 76 } 77 78 /* 79 * Return whether the system supports a given xfeature. 80 * 81 * Also return the name of the (most advanced) feature that the caller requested: 82 */ 83 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) 84 { 85 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask; 86 87 if (unlikely(feature_name)) { 88 long xfeature_idx, max_idx; 89 u64 xfeatures_print; 90 /* 91 * So we use FLS here to be able to print the most advanced 92 * feature that was requested but is missing. So if a driver 93 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the 94 * missing AVX feature - this is the most informative message 95 * to users: 96 */ 97 if (xfeatures_missing) 98 xfeatures_print = xfeatures_missing; 99 else 100 xfeatures_print = xfeatures_needed; 101 102 xfeature_idx = fls64(xfeatures_print)-1; 103 max_idx = ARRAY_SIZE(xfeature_names)-1; 104 xfeature_idx = min(xfeature_idx, max_idx); 105 106 *feature_name = xfeature_names[xfeature_idx]; 107 } 108 109 if (xfeatures_missing) 110 return 0; 111 112 return 1; 113 } 114 EXPORT_SYMBOL_GPL(cpu_has_xfeatures); 115 116 static int xfeature_is_supervisor(int xfeature_nr) 117 { 118 /* 119 * We currently do not support supervisor states, but if 120 * we did, we could find out like this. 121 * 122 * SDM says: If state component 'i' is a user state component, 123 * ECX[0] return 0; if state component i is a supervisor 124 * state component, ECX[0] returns 1. 125 */ 126 u32 eax, ebx, ecx, edx; 127 128 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 129 return !!(ecx & 1); 130 } 131 132 static int xfeature_is_user(int xfeature_nr) 133 { 134 return !xfeature_is_supervisor(xfeature_nr); 135 } 136 137 /* 138 * When executing XSAVEOPT (or other optimized XSAVE instructions), if 139 * a processor implementation detects that an FPU state component is still 140 * (or is again) in its initialized state, it may clear the corresponding 141 * bit in the header.xfeatures field, and can skip the writeout of registers 142 * to the corresponding memory layout. 143 * 144 * This means that when the bit is zero, the state component might still contain 145 * some previous - non-initialized register state. 146 * 147 * Before writing xstate information to user-space we sanitize those components, 148 * to always ensure that the memory layout of a feature will be in the init state 149 * if the corresponding header bit is zero. This is to ensure that user-space doesn't 150 * see some stale state in the memory layout during signal handling, debugging etc. 151 */ 152 void fpstate_sanitize_xstate(struct fpu *fpu) 153 { 154 struct fxregs_state *fx = &fpu->state.fxsave; 155 int feature_bit; 156 u64 xfeatures; 157 158 if (!use_xsaveopt()) 159 return; 160 161 xfeatures = fpu->state.xsave.header.xfeatures; 162 163 /* 164 * None of the feature bits are in init state. So nothing else 165 * to do for us, as the memory layout is up to date. 166 */ 167 if ((xfeatures & xfeatures_mask) == xfeatures_mask) 168 return; 169 170 /* 171 * FP is in init state 172 */ 173 if (!(xfeatures & XFEATURE_MASK_FP)) { 174 fx->cwd = 0x37f; 175 fx->swd = 0; 176 fx->twd = 0; 177 fx->fop = 0; 178 fx->rip = 0; 179 fx->rdp = 0; 180 memset(&fx->st_space[0], 0, 128); 181 } 182 183 /* 184 * SSE is in init state 185 */ 186 if (!(xfeatures & XFEATURE_MASK_SSE)) 187 memset(&fx->xmm_space[0], 0, 256); 188 189 /* 190 * First two features are FPU and SSE, which above we handled 191 * in a special way already: 192 */ 193 feature_bit = 0x2; 194 xfeatures = (xfeatures_mask & ~xfeatures) >> 2; 195 196 /* 197 * Update all the remaining memory layouts according to their 198 * standard xstate layout, if their header bit is in the init 199 * state: 200 */ 201 while (xfeatures) { 202 if (xfeatures & 0x1) { 203 int offset = xstate_comp_offsets[feature_bit]; 204 int size = xstate_sizes[feature_bit]; 205 206 memcpy((void *)fx + offset, 207 (void *)&init_fpstate.xsave + offset, 208 size); 209 } 210 211 xfeatures >>= 1; 212 feature_bit++; 213 } 214 } 215 216 /* 217 * Enable the extended processor state save/restore feature. 218 * Called once per CPU onlining. 219 */ 220 void fpu__init_cpu_xstate(void) 221 { 222 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask) 223 return; 224 /* 225 * Make it clear that XSAVES supervisor states are not yet 226 * implemented should anyone expect it to work by changing 227 * bits in XFEATURE_MASK_* macros and XCR0. 228 */ 229 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR), 230 "x86/fpu: XSAVES supervisor states are not yet implemented.\n"); 231 232 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR; 233 234 cr4_set_bits(X86_CR4_OSXSAVE); 235 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); 236 } 237 238 /* 239 * Note that in the future we will likely need a pair of 240 * functions here: one for user xstates and the other for 241 * system xstates. For now, they are the same. 242 */ 243 static int xfeature_enabled(enum xfeature xfeature) 244 { 245 return !!(xfeatures_mask & (1UL << xfeature)); 246 } 247 248 /* 249 * Record the offsets and sizes of various xstates contained 250 * in the XSAVE state memory layout. 251 */ 252 static void __init setup_xstate_features(void) 253 { 254 u32 eax, ebx, ecx, edx, i; 255 /* start at the beginnning of the "extended state" */ 256 unsigned int last_good_offset = offsetof(struct xregs_state, 257 extended_state_area); 258 /* 259 * The FP xstates and SSE xstates are legacy states. They are always 260 * in the fixed offsets in the xsave area in either compacted form 261 * or standard form. 262 */ 263 xstate_offsets[0] = 0; 264 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space); 265 xstate_offsets[1] = xstate_sizes[0]; 266 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space); 267 268 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 269 if (!xfeature_enabled(i)) 270 continue; 271 272 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 273 274 /* 275 * If an xfeature is supervisor state, the offset 276 * in EBX is invalid. We leave it to -1. 277 */ 278 if (xfeature_is_user(i)) 279 xstate_offsets[i] = ebx; 280 281 xstate_sizes[i] = eax; 282 /* 283 * In our xstate size checks, we assume that the 284 * highest-numbered xstate feature has the 285 * highest offset in the buffer. Ensure it does. 286 */ 287 WARN_ONCE(last_good_offset > xstate_offsets[i], 288 "x86/fpu: misordered xstate at %d\n", last_good_offset); 289 last_good_offset = xstate_offsets[i]; 290 } 291 } 292 293 static void __init print_xstate_feature(u64 xstate_mask) 294 { 295 const char *feature_name; 296 297 if (cpu_has_xfeatures(xstate_mask, &feature_name)) 298 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name); 299 } 300 301 /* 302 * Print out all the supported xstate features: 303 */ 304 static void __init print_xstate_features(void) 305 { 306 print_xstate_feature(XFEATURE_MASK_FP); 307 print_xstate_feature(XFEATURE_MASK_SSE); 308 print_xstate_feature(XFEATURE_MASK_YMM); 309 print_xstate_feature(XFEATURE_MASK_BNDREGS); 310 print_xstate_feature(XFEATURE_MASK_BNDCSR); 311 print_xstate_feature(XFEATURE_MASK_OPMASK); 312 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256); 313 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM); 314 print_xstate_feature(XFEATURE_MASK_PKRU); 315 } 316 317 /* 318 * This check is important because it is easy to get XSTATE_* 319 * confused with XSTATE_BIT_*. 320 */ 321 #define CHECK_XFEATURE(nr) do { \ 322 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \ 323 WARN_ON(nr >= XFEATURE_MAX); \ 324 } while (0) 325 326 /* 327 * We could cache this like xstate_size[], but we only use 328 * it here, so it would be a waste of space. 329 */ 330 static int xfeature_is_aligned(int xfeature_nr) 331 { 332 u32 eax, ebx, ecx, edx; 333 334 CHECK_XFEATURE(xfeature_nr); 335 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 336 /* 337 * The value returned by ECX[1] indicates the alignment 338 * of state component 'i' when the compacted format 339 * of the extended region of an XSAVE area is used: 340 */ 341 return !!(ecx & 2); 342 } 343 344 /* 345 * This function sets up offsets and sizes of all extended states in 346 * xsave area. This supports both standard format and compacted format 347 * of the xsave aread. 348 */ 349 static void __init setup_xstate_comp(void) 350 { 351 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8]; 352 int i; 353 354 /* 355 * The FP xstates and SSE xstates are legacy states. They are always 356 * in the fixed offsets in the xsave area in either compacted form 357 * or standard form. 358 */ 359 xstate_comp_offsets[0] = 0; 360 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space); 361 362 if (!boot_cpu_has(X86_FEATURE_XSAVES)) { 363 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 364 if (xfeature_enabled(i)) { 365 xstate_comp_offsets[i] = xstate_offsets[i]; 366 xstate_comp_sizes[i] = xstate_sizes[i]; 367 } 368 } 369 return; 370 } 371 372 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] = 373 FXSAVE_SIZE + XSAVE_HDR_SIZE; 374 375 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 376 if (xfeature_enabled(i)) 377 xstate_comp_sizes[i] = xstate_sizes[i]; 378 else 379 xstate_comp_sizes[i] = 0; 380 381 if (i > FIRST_EXTENDED_XFEATURE) { 382 xstate_comp_offsets[i] = xstate_comp_offsets[i-1] 383 + xstate_comp_sizes[i-1]; 384 385 if (xfeature_is_aligned(i)) 386 xstate_comp_offsets[i] = 387 ALIGN(xstate_comp_offsets[i], 64); 388 } 389 } 390 } 391 392 /* 393 * Print out xstate component offsets and sizes 394 */ 395 static void __init print_xstate_offset_size(void) 396 { 397 int i; 398 399 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 400 if (!xfeature_enabled(i)) 401 continue; 402 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", 403 i, xstate_comp_offsets[i], i, xstate_sizes[i]); 404 } 405 } 406 407 /* 408 * setup the xstate image representing the init state 409 */ 410 static void __init setup_init_fpu_buf(void) 411 { 412 static int on_boot_cpu __initdata = 1; 413 414 WARN_ON_FPU(!on_boot_cpu); 415 on_boot_cpu = 0; 416 417 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 418 return; 419 420 setup_xstate_features(); 421 print_xstate_features(); 422 423 if (boot_cpu_has(X86_FEATURE_XSAVES)) 424 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask; 425 426 /* 427 * Init all the features state with header.xfeatures being 0x0 428 */ 429 copy_kernel_to_xregs_booting(&init_fpstate.xsave); 430 431 /* 432 * Dump the init state again. This is to identify the init state 433 * of any feature which is not represented by all zero's. 434 */ 435 copy_xregs_to_kernel_booting(&init_fpstate.xsave); 436 } 437 438 static int xfeature_uncompacted_offset(int xfeature_nr) 439 { 440 u32 eax, ebx, ecx, edx; 441 442 /* 443 * Only XSAVES supports supervisor states and it uses compacted 444 * format. Checking a supervisor state's uncompacted offset is 445 * an error. 446 */ 447 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) { 448 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr); 449 return -1; 450 } 451 452 CHECK_XFEATURE(xfeature_nr); 453 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 454 return ebx; 455 } 456 457 static int xfeature_size(int xfeature_nr) 458 { 459 u32 eax, ebx, ecx, edx; 460 461 CHECK_XFEATURE(xfeature_nr); 462 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 463 return eax; 464 } 465 466 /* 467 * 'XSAVES' implies two different things: 468 * 1. saving of supervisor/system state 469 * 2. using the compacted format 470 * 471 * Use this function when dealing with the compacted format so 472 * that it is obvious which aspect of 'XSAVES' is being handled 473 * by the calling code. 474 */ 475 int using_compacted_format(void) 476 { 477 return boot_cpu_has(X86_FEATURE_XSAVES); 478 } 479 480 static void __xstate_dump_leaves(void) 481 { 482 int i; 483 u32 eax, ebx, ecx, edx; 484 static int should_dump = 1; 485 486 if (!should_dump) 487 return; 488 should_dump = 0; 489 /* 490 * Dump out a few leaves past the ones that we support 491 * just in case there are some goodies up there 492 */ 493 for (i = 0; i < XFEATURE_MAX + 10; i++) { 494 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 495 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n", 496 XSTATE_CPUID, i, eax, ebx, ecx, edx); 497 } 498 } 499 500 #define XSTATE_WARN_ON(x) do { \ 501 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ 502 __xstate_dump_leaves(); \ 503 } \ 504 } while (0) 505 506 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \ 507 if ((nr == nr_macro) && \ 508 WARN_ONCE(sz != sizeof(__struct), \ 509 "%s: struct is %zu bytes, cpu state %d bytes\n", \ 510 __stringify(nr_macro), sizeof(__struct), sz)) { \ 511 __xstate_dump_leaves(); \ 512 } \ 513 } while (0) 514 515 /* 516 * We have a C struct for each 'xstate'. We need to ensure 517 * that our software representation matches what the CPU 518 * tells us about the state's size. 519 */ 520 static void check_xstate_against_struct(int nr) 521 { 522 /* 523 * Ask the CPU for the size of the state. 524 */ 525 int sz = xfeature_size(nr); 526 /* 527 * Match each CPU state with the corresponding software 528 * structure. 529 */ 530 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct); 531 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state); 532 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state); 533 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state); 534 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state); 535 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state); 536 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state); 537 538 /* 539 * Make *SURE* to add any feature numbers in below if 540 * there are "holes" in the xsave state component 541 * numbers. 542 */ 543 if ((nr < XFEATURE_YMM) || 544 (nr >= XFEATURE_MAX) || 545 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) { 546 WARN_ONCE(1, "no structure for xstate: %d\n", nr); 547 XSTATE_WARN_ON(1); 548 } 549 } 550 551 /* 552 * This essentially double-checks what the cpu told us about 553 * how large the XSAVE buffer needs to be. We are recalculating 554 * it to be safe. 555 */ 556 static void do_extra_xstate_size_checks(void) 557 { 558 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE; 559 int i; 560 561 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 562 if (!xfeature_enabled(i)) 563 continue; 564 565 check_xstate_against_struct(i); 566 /* 567 * Supervisor state components can be managed only by 568 * XSAVES, which is compacted-format only. 569 */ 570 if (!using_compacted_format()) 571 XSTATE_WARN_ON(xfeature_is_supervisor(i)); 572 573 /* Align from the end of the previous feature */ 574 if (xfeature_is_aligned(i)) 575 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64); 576 /* 577 * The offset of a given state in the non-compacted 578 * format is given to us in a CPUID leaf. We check 579 * them for being ordered (increasing offsets) in 580 * setup_xstate_features(). 581 */ 582 if (!using_compacted_format()) 583 paranoid_xstate_size = xfeature_uncompacted_offset(i); 584 /* 585 * The compacted-format offset always depends on where 586 * the previous state ended. 587 */ 588 paranoid_xstate_size += xfeature_size(i); 589 } 590 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size); 591 } 592 593 594 /* 595 * Get total size of enabled xstates in XCR0/xfeatures_mask. 596 * 597 * Note the SDM's wording here. "sub-function 0" only enumerates 598 * the size of the *user* states. If we use it to size a buffer 599 * that we use 'XSAVES' on, we could potentially overflow the 600 * buffer because 'XSAVES' saves system states too. 601 * 602 * Note that we do not currently set any bits on IA32_XSS so 603 * 'XCR0 | IA32_XSS == XCR0' for now. 604 */ 605 static unsigned int __init get_xsaves_size(void) 606 { 607 unsigned int eax, ebx, ecx, edx; 608 /* 609 * - CPUID function 0DH, sub-function 1: 610 * EBX enumerates the size (in bytes) required by 611 * the XSAVES instruction for an XSAVE area 612 * containing all the state components 613 * corresponding to bits currently set in 614 * XCR0 | IA32_XSS. 615 */ 616 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 617 return ebx; 618 } 619 620 static unsigned int __init get_xsave_size(void) 621 { 622 unsigned int eax, ebx, ecx, edx; 623 /* 624 * - CPUID function 0DH, sub-function 0: 625 * EBX enumerates the size (in bytes) required by 626 * the XSAVE instruction for an XSAVE area 627 * containing all the *user* state components 628 * corresponding to bits currently set in XCR0. 629 */ 630 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 631 return ebx; 632 } 633 634 /* 635 * Will the runtime-enumerated 'xstate_size' fit in the init 636 * task's statically-allocated buffer? 637 */ 638 static bool is_supported_xstate_size(unsigned int test_xstate_size) 639 { 640 if (test_xstate_size <= sizeof(union fpregs_state)) 641 return true; 642 643 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", 644 sizeof(union fpregs_state), test_xstate_size); 645 return false; 646 } 647 648 static int init_xstate_size(void) 649 { 650 /* Recompute the context size for enabled features: */ 651 unsigned int possible_xstate_size; 652 unsigned int xsave_size; 653 654 xsave_size = get_xsave_size(); 655 656 if (boot_cpu_has(X86_FEATURE_XSAVES)) 657 possible_xstate_size = get_xsaves_size(); 658 else 659 possible_xstate_size = xsave_size; 660 661 /* Ensure we have the space to store all enabled: */ 662 if (!is_supported_xstate_size(possible_xstate_size)) 663 return -EINVAL; 664 665 /* 666 * The size is OK, we are definitely going to use xsave, 667 * make it known to the world that we need more space. 668 */ 669 fpu_kernel_xstate_size = possible_xstate_size; 670 do_extra_xstate_size_checks(); 671 672 /* 673 * User space is always in standard format. 674 */ 675 fpu_user_xstate_size = xsave_size; 676 return 0; 677 } 678 679 /* 680 * We enabled the XSAVE hardware, but something went wrong and 681 * we can not use it. Disable it. 682 */ 683 static void fpu__init_disable_system_xstate(void) 684 { 685 xfeatures_mask = 0; 686 cr4_clear_bits(X86_CR4_OSXSAVE); 687 fpu__xstate_clear_all_cpu_caps(); 688 } 689 690 /* 691 * Enable and initialize the xsave feature. 692 * Called once per system bootup. 693 */ 694 void __init fpu__init_system_xstate(void) 695 { 696 unsigned int eax, ebx, ecx, edx; 697 static int on_boot_cpu __initdata = 1; 698 int err; 699 700 WARN_ON_FPU(!on_boot_cpu); 701 on_boot_cpu = 0; 702 703 if (!boot_cpu_has(X86_FEATURE_XSAVE)) { 704 pr_info("x86/fpu: Legacy x87 FPU detected.\n"); 705 return; 706 } 707 708 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) { 709 WARN_ON_FPU(1); 710 return; 711 } 712 713 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 714 xfeatures_mask = eax + ((u64)edx << 32); 715 716 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) { 717 /* 718 * This indicates that something really unexpected happened 719 * with the enumeration. Disable XSAVE and try to continue 720 * booting without it. This is too early to BUG(). 721 */ 722 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask); 723 goto out_disable; 724 } 725 726 xfeatures_mask &= fpu__get_supported_xfeatures_mask(); 727 728 /* Enable xstate instructions to be able to continue with initialization: */ 729 fpu__init_cpu_xstate(); 730 err = init_xstate_size(); 731 if (err) 732 goto out_disable; 733 734 /* 735 * Update info used for ptrace frames; use standard-format size and no 736 * supervisor xstates: 737 */ 738 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR); 739 740 fpu__init_prepare_fx_sw_frame(); 741 setup_init_fpu_buf(); 742 setup_xstate_comp(); 743 print_xstate_offset_size(); 744 745 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n", 746 xfeatures_mask, 747 fpu_kernel_xstate_size, 748 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard"); 749 return; 750 751 out_disable: 752 /* something went wrong, try to boot without any XSAVE support */ 753 fpu__init_disable_system_xstate(); 754 } 755 756 /* 757 * Restore minimal FPU state after suspend: 758 */ 759 void fpu__resume_cpu(void) 760 { 761 /* 762 * Restore XCR0 on xsave capable CPUs: 763 */ 764 if (boot_cpu_has(X86_FEATURE_XSAVE)) 765 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); 766 } 767 768 /* 769 * Given an xstate feature mask, calculate where in the xsave 770 * buffer the state is. Callers should ensure that the buffer 771 * is valid. 772 * 773 * Note: does not work for compacted buffers. 774 */ 775 void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask) 776 { 777 int feature_nr = fls64(xstate_feature_mask) - 1; 778 779 if (!xfeature_enabled(feature_nr)) { 780 WARN_ON_FPU(1); 781 return NULL; 782 } 783 784 return (void *)xsave + xstate_comp_offsets[feature_nr]; 785 } 786 /* 787 * Given the xsave area and a state inside, this function returns the 788 * address of the state. 789 * 790 * This is the API that is called to get xstate address in either 791 * standard format or compacted format of xsave area. 792 * 793 * Note that if there is no data for the field in the xsave buffer 794 * this will return NULL. 795 * 796 * Inputs: 797 * xstate: the thread's storage area for all FPU data 798 * xstate_feature: state which is defined in xsave.h (e.g. 799 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...) 800 * Output: 801 * address of the state in the xsave area, or NULL if the 802 * field is not present in the xsave buffer. 803 */ 804 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature) 805 { 806 /* 807 * Do we even *have* xsave state? 808 */ 809 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 810 return NULL; 811 812 /* 813 * We should not ever be requesting features that we 814 * have not enabled. Remember that pcntxt_mask is 815 * what we write to the XCR0 register. 816 */ 817 WARN_ONCE(!(xfeatures_mask & xstate_feature), 818 "get of unsupported state"); 819 /* 820 * This assumes the last 'xsave*' instruction to 821 * have requested that 'xstate_feature' be saved. 822 * If it did not, we might be seeing and old value 823 * of the field in the buffer. 824 * 825 * This can happen because the last 'xsave' did not 826 * request that this feature be saved (unlikely) 827 * or because the "init optimization" caused it 828 * to not be saved. 829 */ 830 if (!(xsave->header.xfeatures & xstate_feature)) 831 return NULL; 832 833 return __raw_xsave_addr(xsave, xstate_feature); 834 } 835 EXPORT_SYMBOL_GPL(get_xsave_addr); 836 837 /* 838 * This wraps up the common operations that need to occur when retrieving 839 * data from xsave state. It first ensures that the current task was 840 * using the FPU and retrieves the data in to a buffer. It then calculates 841 * the offset of the requested field in the buffer. 842 * 843 * This function is safe to call whether the FPU is in use or not. 844 * 845 * Note that this only works on the current task. 846 * 847 * Inputs: 848 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP, 849 * XFEATURE_MASK_SSE, etc...) 850 * Output: 851 * address of the state in the xsave area or NULL if the state 852 * is not present or is in its 'init state'. 853 */ 854 const void *get_xsave_field_ptr(int xsave_state) 855 { 856 struct fpu *fpu = ¤t->thread.fpu; 857 858 if (!fpu->fpstate_active) 859 return NULL; 860 /* 861 * fpu__save() takes the CPU's xstate registers 862 * and saves them off to the 'fpu memory buffer. 863 */ 864 fpu__save(fpu); 865 866 return get_xsave_addr(&fpu->state.xsave, xsave_state); 867 } 868 869 870 /* 871 * Set xfeatures (aka XSTATE_BV) bit for a feature that we want 872 * to take out of its "init state". This will ensure that an 873 * XRSTOR actually restores the state. 874 */ 875 static void fpu__xfeature_set_non_init(struct xregs_state *xsave, 876 int xstate_feature_mask) 877 { 878 xsave->header.xfeatures |= xstate_feature_mask; 879 } 880 881 /* 882 * This function is safe to call whether the FPU is in use or not. 883 * 884 * Note that this only works on the current task. 885 * 886 * Inputs: 887 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP, 888 * XFEATURE_MASK_SSE, etc...) 889 * @xsave_state_ptr: a pointer to a copy of the state that you would 890 * like written in to the current task's FPU xsave state. This pointer 891 * must not be located in the current tasks's xsave area. 892 * Output: 893 * address of the state in the xsave area or NULL if the state 894 * is not present or is in its 'init state'. 895 */ 896 static void fpu__xfeature_set_state(int xstate_feature_mask, 897 void *xstate_feature_src, size_t len) 898 { 899 struct xregs_state *xsave = ¤t->thread.fpu.state.xsave; 900 struct fpu *fpu = ¤t->thread.fpu; 901 void *dst; 902 903 if (!boot_cpu_has(X86_FEATURE_XSAVE)) { 904 WARN_ONCE(1, "%s() attempted with no xsave support", __func__); 905 return; 906 } 907 908 /* 909 * Tell the FPU code that we need the FPU state to be in 910 * 'fpu' (not in the registers), and that we need it to 911 * be stable while we write to it. 912 */ 913 fpu__current_fpstate_write_begin(); 914 915 /* 916 * This method *WILL* *NOT* work for compact-format 917 * buffers. If the 'xstate_feature_mask' is unset in 918 * xcomp_bv then we may need to move other feature state 919 * "up" in the buffer. 920 */ 921 if (xsave->header.xcomp_bv & xstate_feature_mask) { 922 WARN_ON_ONCE(1); 923 goto out; 924 } 925 926 /* find the location in the xsave buffer of the desired state */ 927 dst = __raw_xsave_addr(&fpu->state.xsave, xstate_feature_mask); 928 929 /* 930 * Make sure that the pointer being passed in did not 931 * come from the xsave buffer itself. 932 */ 933 WARN_ONCE(xstate_feature_src == dst, "set from xsave buffer itself"); 934 935 /* put the caller-provided data in the location */ 936 memcpy(dst, xstate_feature_src, len); 937 938 /* 939 * Mark the xfeature so that the CPU knows there is state 940 * in the buffer now. 941 */ 942 fpu__xfeature_set_non_init(xsave, xstate_feature_mask); 943 out: 944 /* 945 * We are done writing to the 'fpu'. Reenable preeption 946 * and (possibly) move the fpstate back in to the fpregs. 947 */ 948 fpu__current_fpstate_write_end(); 949 } 950 951 #define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2) 952 #define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1) 953 954 /* 955 * This will go out and modify the XSAVE buffer so that PKRU is 956 * set to a particular state for access to 'pkey'. 957 * 958 * PKRU state does affect kernel access to user memory. We do 959 * not modfiy PKRU *itself* here, only the XSAVE state that will 960 * be restored in to PKRU when we return back to userspace. 961 */ 962 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, 963 unsigned long init_val) 964 { 965 struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; 966 struct pkru_state *old_pkru_state; 967 struct pkru_state new_pkru_state; 968 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY); 969 u32 new_pkru_bits = 0; 970 971 /* 972 * This check implies XSAVE support. OSPKE only gets 973 * set if we enable XSAVE and we enable PKU in XCR0. 974 */ 975 if (!boot_cpu_has(X86_FEATURE_OSPKE)) 976 return -EINVAL; 977 978 /* Set the bits we need in PKRU: */ 979 if (init_val & PKEY_DISABLE_ACCESS) 980 new_pkru_bits |= PKRU_AD_BIT; 981 if (init_val & PKEY_DISABLE_WRITE) 982 new_pkru_bits |= PKRU_WD_BIT; 983 984 /* Shift the bits in to the correct place in PKRU for pkey: */ 985 new_pkru_bits <<= pkey_shift; 986 987 /* Locate old copy of the state in the xsave buffer: */ 988 old_pkru_state = get_xsave_addr(xsave, XFEATURE_MASK_PKRU); 989 990 /* 991 * When state is not in the buffer, it is in the init 992 * state, set it manually. Otherwise, copy out the old 993 * state. 994 */ 995 if (!old_pkru_state) 996 new_pkru_state.pkru = 0; 997 else 998 new_pkru_state.pkru = old_pkru_state->pkru; 999 1000 /* Mask off any old bits in place: */ 1001 new_pkru_state.pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift); 1002 1003 /* Set the newly-requested bits: */ 1004 new_pkru_state.pkru |= new_pkru_bits; 1005 1006 /* 1007 * We could theoretically live without zeroing pkru.pad. 1008 * The current XSAVE feature state definition says that 1009 * only bytes 0->3 are used. But we do not want to 1010 * chance leaking kernel stack out to userspace in case a 1011 * memcpy() of the whole xsave buffer was done. 1012 * 1013 * They're in the same cacheline anyway. 1014 */ 1015 new_pkru_state.pad = 0; 1016 1017 fpu__xfeature_set_state(XFEATURE_MASK_PKRU, &new_pkru_state, sizeof(new_pkru_state)); 1018 1019 return 0; 1020 } 1021 1022 /* 1023 * This is similar to user_regset_copyout(), but will not add offset to 1024 * the source data pointer or increment pos, count, kbuf, and ubuf. 1025 */ 1026 static inline int xstate_copyout(unsigned int pos, unsigned int count, 1027 void *kbuf, void __user *ubuf, 1028 const void *data, const int start_pos, 1029 const int end_pos) 1030 { 1031 if ((count == 0) || (pos < start_pos)) 1032 return 0; 1033 1034 if (end_pos < 0 || pos < end_pos) { 1035 unsigned int copy = (end_pos < 0 ? count : min(count, end_pos - pos)); 1036 1037 if (kbuf) { 1038 memcpy(kbuf + pos, data, copy); 1039 } else { 1040 if (__copy_to_user(ubuf + pos, data, copy)) 1041 return -EFAULT; 1042 } 1043 } 1044 return 0; 1045 } 1046 1047 /* 1048 * Convert from kernel XSAVES compacted format to standard format and copy 1049 * to a ptrace buffer. It supports partial copy but pos always starts from 1050 * zero. This is called from xstateregs_get() and there we check the CPU 1051 * has XSAVES. 1052 */ 1053 int copyout_from_xsaves(unsigned int pos, unsigned int count, void *kbuf, 1054 void __user *ubuf, struct xregs_state *xsave) 1055 { 1056 unsigned int offset, size; 1057 int ret, i; 1058 struct xstate_header header; 1059 1060 /* 1061 * Currently copy_regset_to_user() starts from pos 0: 1062 */ 1063 if (unlikely(pos != 0)) 1064 return -EFAULT; 1065 1066 /* 1067 * The destination is a ptrace buffer; we put in only user xstates: 1068 */ 1069 memset(&header, 0, sizeof(header)); 1070 header.xfeatures = xsave->header.xfeatures; 1071 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR; 1072 1073 /* 1074 * Copy xregs_state->header: 1075 */ 1076 offset = offsetof(struct xregs_state, header); 1077 size = sizeof(header); 1078 1079 ret = xstate_copyout(offset, size, kbuf, ubuf, &header, 0, count); 1080 1081 if (ret) 1082 return ret; 1083 1084 for (i = 0; i < XFEATURE_MAX; i++) { 1085 /* 1086 * Copy only in-use xstates: 1087 */ 1088 if ((header.xfeatures >> i) & 1) { 1089 void *src = __raw_xsave_addr(xsave, 1 << i); 1090 1091 offset = xstate_offsets[i]; 1092 size = xstate_sizes[i]; 1093 1094 ret = xstate_copyout(offset, size, kbuf, ubuf, src, 0, count); 1095 1096 if (ret) 1097 return ret; 1098 1099 if (offset + size >= count) 1100 break; 1101 } 1102 1103 } 1104 1105 /* 1106 * Fill xsave->i387.sw_reserved value for ptrace frame: 1107 */ 1108 offset = offsetof(struct fxregs_state, sw_reserved); 1109 size = sizeof(xstate_fx_sw_bytes); 1110 1111 ret = xstate_copyout(offset, size, kbuf, ubuf, xstate_fx_sw_bytes, 0, count); 1112 1113 if (ret) 1114 return ret; 1115 1116 return 0; 1117 } 1118 1119 /* 1120 * Convert from a ptrace standard-format buffer to kernel XSAVES format 1121 * and copy to the target thread. This is called from xstateregs_set() and 1122 * there we check the CPU has XSAVES and a whole standard-sized buffer 1123 * exists. 1124 */ 1125 int copyin_to_xsaves(const void *kbuf, const void __user *ubuf, 1126 struct xregs_state *xsave) 1127 { 1128 unsigned int offset, size; 1129 int i; 1130 u64 xfeatures; 1131 u64 allowed_features; 1132 1133 offset = offsetof(struct xregs_state, header); 1134 size = sizeof(xfeatures); 1135 1136 if (kbuf) { 1137 memcpy(&xfeatures, kbuf + offset, size); 1138 } else { 1139 if (__copy_from_user(&xfeatures, ubuf + offset, size)) 1140 return -EFAULT; 1141 } 1142 1143 /* 1144 * Reject if the user sets any disabled or supervisor features: 1145 */ 1146 allowed_features = xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR; 1147 1148 if (xfeatures & ~allowed_features) 1149 return -EINVAL; 1150 1151 for (i = 0; i < XFEATURE_MAX; i++) { 1152 u64 mask = ((u64)1 << i); 1153 1154 if (xfeatures & mask) { 1155 void *dst = __raw_xsave_addr(xsave, 1 << i); 1156 1157 offset = xstate_offsets[i]; 1158 size = xstate_sizes[i]; 1159 1160 if (kbuf) { 1161 memcpy(dst, kbuf + offset, size); 1162 } else { 1163 if (__copy_from_user(dst, ubuf + offset, size)) 1164 return -EFAULT; 1165 } 1166 } 1167 } 1168 1169 /* 1170 * The state that came in from userspace was user-state only. 1171 * Mask all the user states out of 'xfeatures': 1172 */ 1173 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR; 1174 1175 /* 1176 * Add back in the features that came in from userspace: 1177 */ 1178 xsave->header.xfeatures |= xfeatures; 1179 1180 return 0; 1181 } 1182