1 /* 2 * x86 FPU boot time init code: 3 */ 4 #include <asm/fpu/internal.h> 5 #include <asm/tlbflush.h> 6 #include <asm/setup.h> 7 #include <asm/cmdline.h> 8 9 #include <linux/sched.h> 10 #include <linux/sched/task.h> 11 #include <linux/init.h> 12 13 /* 14 * Initialize the registers found in all CPUs, CR0 and CR4: 15 */ 16 static void fpu__init_cpu_generic(void) 17 { 18 unsigned long cr0; 19 unsigned long cr4_mask = 0; 20 21 if (boot_cpu_has(X86_FEATURE_FXSR)) 22 cr4_mask |= X86_CR4_OSFXSR; 23 if (boot_cpu_has(X86_FEATURE_XMM)) 24 cr4_mask |= X86_CR4_OSXMMEXCPT; 25 if (cr4_mask) 26 cr4_set_bits(cr4_mask); 27 28 cr0 = read_cr0(); 29 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */ 30 if (!boot_cpu_has(X86_FEATURE_FPU)) 31 cr0 |= X86_CR0_EM; 32 write_cr0(cr0); 33 34 /* Flush out any pending x87 state: */ 35 #ifdef CONFIG_MATH_EMULATION 36 if (!boot_cpu_has(X86_FEATURE_FPU)) 37 fpstate_init_soft(¤t->thread.fpu.state.soft); 38 else 39 #endif 40 asm volatile ("fninit"); 41 } 42 43 /* 44 * Enable all supported FPU features. Called when a CPU is brought online: 45 */ 46 void fpu__init_cpu(void) 47 { 48 fpu__init_cpu_generic(); 49 fpu__init_cpu_xstate(); 50 } 51 52 static bool fpu__probe_without_cpuid(void) 53 { 54 unsigned long cr0; 55 u16 fsw, fcw; 56 57 fsw = fcw = 0xffff; 58 59 cr0 = read_cr0(); 60 cr0 &= ~(X86_CR0_TS | X86_CR0_EM); 61 write_cr0(cr0); 62 63 asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw)); 64 65 pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw); 66 67 return fsw == 0 && (fcw & 0x103f) == 0x003f; 68 } 69 70 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c) 71 { 72 if (!boot_cpu_has(X86_FEATURE_CPUID) && 73 !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) { 74 if (fpu__probe_without_cpuid()) 75 setup_force_cpu_cap(X86_FEATURE_FPU); 76 else 77 setup_clear_cpu_cap(X86_FEATURE_FPU); 78 } 79 80 #ifndef CONFIG_MATH_EMULATION 81 if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) { 82 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n"); 83 for (;;) 84 asm volatile("hlt"); 85 } 86 #endif 87 } 88 89 /* 90 * Boot time FPU feature detection code: 91 */ 92 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu; 93 94 static void __init fpu__init_system_mxcsr(void) 95 { 96 unsigned int mask = 0; 97 98 if (boot_cpu_has(X86_FEATURE_FXSR)) { 99 /* Static because GCC does not get 16-byte stack alignment right: */ 100 static struct fxregs_state fxregs __initdata; 101 102 asm volatile("fxsave %0" : "+m" (fxregs)); 103 104 mask = fxregs.mxcsr_mask; 105 106 /* 107 * If zero then use the default features mask, 108 * which has all features set, except the 109 * denormals-are-zero feature bit: 110 */ 111 if (mask == 0) 112 mask = 0x0000ffbf; 113 } 114 mxcsr_feature_mask &= mask; 115 } 116 117 /* 118 * Once per bootup FPU initialization sequences that will run on most x86 CPUs: 119 */ 120 static void __init fpu__init_system_generic(void) 121 { 122 /* 123 * Set up the legacy init FPU context. (xstate init might overwrite this 124 * with a more modern format, if the CPU supports it.) 125 */ 126 fpstate_init(&init_fpstate); 127 128 fpu__init_system_mxcsr(); 129 } 130 131 /* 132 * Size of the FPU context state. All tasks in the system use the 133 * same context size, regardless of what portion they use. 134 * This is inherent to the XSAVE architecture which puts all state 135 * components into a single, continuous memory block: 136 */ 137 unsigned int fpu_kernel_xstate_size; 138 EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size); 139 140 /* Get alignment of the TYPE. */ 141 #define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test) 142 143 /* 144 * Enforce that 'MEMBER' is the last field of 'TYPE'. 145 * 146 * Align the computed size with alignment of the TYPE, 147 * because that's how C aligns structs. 148 */ 149 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \ 150 BUILD_BUG_ON(sizeof(TYPE) != ALIGN(offsetofend(TYPE, MEMBER), \ 151 TYPE_ALIGN(TYPE))) 152 153 /* 154 * We append the 'struct fpu' to the task_struct: 155 */ 156 static void __init fpu__init_task_struct_size(void) 157 { 158 int task_size = sizeof(struct task_struct); 159 160 /* 161 * Subtract off the static size of the register state. 162 * It potentially has a bunch of padding. 163 */ 164 task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state); 165 166 /* 167 * Add back the dynamically-calculated register state 168 * size. 169 */ 170 task_size += fpu_kernel_xstate_size; 171 172 /* 173 * We dynamically size 'struct fpu', so we require that 174 * it be at the end of 'thread_struct' and that 175 * 'thread_struct' be at the end of 'task_struct'. If 176 * you hit a compile error here, check the structure to 177 * see if something got added to the end. 178 */ 179 CHECK_MEMBER_AT_END_OF(struct fpu, state); 180 CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu); 181 CHECK_MEMBER_AT_END_OF(struct task_struct, thread); 182 183 arch_task_struct_size = task_size; 184 } 185 186 /* 187 * Set up the user and kernel xstate sizes based on the legacy FPU context size. 188 * 189 * We set this up first, and later it will be overwritten by 190 * fpu__init_system_xstate() if the CPU knows about xstates. 191 */ 192 static void __init fpu__init_system_xstate_size_legacy(void) 193 { 194 static int on_boot_cpu __initdata = 1; 195 196 WARN_ON_FPU(!on_boot_cpu); 197 on_boot_cpu = 0; 198 199 /* 200 * Note that xstate sizes might be overwritten later during 201 * fpu__init_system_xstate(). 202 */ 203 204 if (!boot_cpu_has(X86_FEATURE_FPU)) { 205 /* 206 * Disable xsave as we do not support it if i387 207 * emulation is enabled. 208 */ 209 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 210 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); 211 fpu_kernel_xstate_size = sizeof(struct swregs_state); 212 } else { 213 if (boot_cpu_has(X86_FEATURE_FXSR)) 214 fpu_kernel_xstate_size = 215 sizeof(struct fxregs_state); 216 else 217 fpu_kernel_xstate_size = 218 sizeof(struct fregs_state); 219 } 220 221 fpu_user_xstate_size = fpu_kernel_xstate_size; 222 } 223 224 /* 225 * Find supported xfeatures based on cpu features and command-line input. 226 * This must be called after fpu__init_parse_early_param() is called and 227 * xfeatures_mask is enumerated. 228 */ 229 u64 __init fpu__get_supported_xfeatures_mask(void) 230 { 231 return XCNTXT_MASK; 232 } 233 234 /* Legacy code to initialize eager fpu mode. */ 235 static void __init fpu__init_system_ctx_switch(void) 236 { 237 static bool on_boot_cpu __initdata = 1; 238 239 WARN_ON_FPU(!on_boot_cpu); 240 on_boot_cpu = 0; 241 242 WARN_ON_FPU(current->thread.fpu.fpstate_active); 243 } 244 245 /* 246 * We parse fpu parameters early because fpu__init_system() is executed 247 * before parse_early_param(). 248 */ 249 static void __init fpu__init_parse_early_param(void) 250 { 251 if (cmdline_find_option_bool(boot_command_line, "no387")) 252 setup_clear_cpu_cap(X86_FEATURE_FPU); 253 254 if (cmdline_find_option_bool(boot_command_line, "nofxsr")) { 255 setup_clear_cpu_cap(X86_FEATURE_FXSR); 256 setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT); 257 setup_clear_cpu_cap(X86_FEATURE_XMM); 258 } 259 260 if (cmdline_find_option_bool(boot_command_line, "noxsave")) 261 fpu__xstate_clear_all_cpu_caps(); 262 263 if (cmdline_find_option_bool(boot_command_line, "noxsaveopt")) 264 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); 265 266 if (cmdline_find_option_bool(boot_command_line, "noxsaves")) 267 setup_clear_cpu_cap(X86_FEATURE_XSAVES); 268 } 269 270 /* 271 * Called on the boot CPU once per system bootup, to set up the initial 272 * FPU state that is later cloned into all processes: 273 */ 274 void __init fpu__init_system(struct cpuinfo_x86 *c) 275 { 276 fpu__init_parse_early_param(); 277 fpu__init_system_early_generic(c); 278 279 /* 280 * The FPU has to be operational for some of the 281 * later FPU init activities: 282 */ 283 fpu__init_cpu(); 284 285 fpu__init_system_generic(); 286 fpu__init_system_xstate_size_legacy(); 287 fpu__init_system_xstate(); 288 fpu__init_task_struct_size(); 289 290 fpu__init_system_ctx_switch(); 291 } 292