xref: /linux/arch/x86/kernel/fpu/init.c (revision bdf4d8280616308b5bb42babad1432ff4575cb8b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * x86 FPU boot time init code:
4  */
5 #include <asm/fpu/api.h>
6 #include <asm/tlbflush.h>
7 #include <asm/setup.h>
8 
9 #include <linux/sched.h>
10 #include <linux/sched/task.h>
11 #include <linux/init.h>
12 
13 #include "internal.h"
14 #include "legacy.h"
15 #include "xstate.h"
16 
17 /*
18  * Initialize the registers found in all CPUs, CR0 and CR4:
19  */
20 static void fpu__init_cpu_generic(void)
21 {
22 	unsigned long cr0;
23 	unsigned long cr4_mask = 0;
24 
25 	if (boot_cpu_has(X86_FEATURE_FXSR))
26 		cr4_mask |= X86_CR4_OSFXSR;
27 	if (boot_cpu_has(X86_FEATURE_XMM))
28 		cr4_mask |= X86_CR4_OSXMMEXCPT;
29 	if (cr4_mask)
30 		cr4_set_bits(cr4_mask);
31 
32 	cr0 = read_cr0();
33 	cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
34 	if (!boot_cpu_has(X86_FEATURE_FPU))
35 		cr0 |= X86_CR0_EM;
36 	write_cr0(cr0);
37 
38 	/* Flush out any pending x87 state: */
39 	asm volatile ("fninit");
40 }
41 
42 /*
43  * Enable all supported FPU features. Called when a CPU is brought online:
44  */
45 void fpu__init_cpu(void)
46 {
47 	fpu__init_cpu_generic();
48 	fpu__init_cpu_xstate();
49 
50 	/* Start allowing kernel-mode FPU: */
51 	this_cpu_write(kernel_fpu_allowed, true);
52 }
53 
54 static bool __init fpu__probe_without_cpuid(void)
55 {
56 	unsigned long cr0;
57 	u16 fsw, fcw;
58 
59 	fsw = fcw = 0xffff;
60 
61 	cr0 = read_cr0();
62 	cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
63 	write_cr0(cr0);
64 
65 	asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw));
66 
67 	pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw);
68 
69 	return fsw == 0 && (fcw & 0x103f) == 0x003f;
70 }
71 
72 static void __init fpu__init_system_early_generic(void)
73 {
74 	set_thread_flag(TIF_NEED_FPU_LOAD);
75 
76 	if (!boot_cpu_has(X86_FEATURE_CPUID) &&
77 	    !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
78 		if (fpu__probe_without_cpuid())
79 			setup_force_cpu_cap(X86_FEATURE_FPU);
80 		else
81 			setup_clear_cpu_cap(X86_FEATURE_FPU);
82 	}
83 
84 	if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) {
85 		pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
86 		for (;;)
87 			asm volatile("hlt");
88 	}
89 }
90 
91 /*
92  * Boot time FPU feature detection code:
93  */
94 unsigned int mxcsr_feature_mask __ro_after_init = 0xffffffffu;
95 
96 static void __init fpu__init_system_mxcsr(void)
97 {
98 	unsigned int mask = 0;
99 
100 	if (boot_cpu_has(X86_FEATURE_FXSR)) {
101 		/* Static because GCC does not get 16-byte stack alignment right: */
102 		static struct fxregs_state fxregs __initdata;
103 
104 		asm volatile("fxsave %0" : "+m" (fxregs));
105 
106 		mask = fxregs.mxcsr_mask;
107 
108 		/*
109 		 * If zero then use the default features mask,
110 		 * which has all features set, except the
111 		 * denormals-are-zero feature bit:
112 		 */
113 		if (mask == 0)
114 			mask = 0x0000ffbf;
115 	}
116 	mxcsr_feature_mask &= mask;
117 }
118 
119 /*
120  * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
121  */
122 static void __init fpu__init_system_generic(void)
123 {
124 	/*
125 	 * Set up the legacy init FPU context. Will be updated when the
126 	 * CPU supports XSAVE[S].
127 	 */
128 	fpstate_init_user(&init_fpstate);
129 
130 	fpu__init_system_mxcsr();
131 }
132 
133 /*
134  * Enforce that 'MEMBER' is the last field of 'TYPE'.
135  *
136  * Align the computed size with alignment of the TYPE,
137  * because that's how C aligns structs.
138  */
139 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
140 	BUILD_BUG_ON(sizeof(TYPE) !=         \
141 		     ALIGN(offsetofend(TYPE, MEMBER), _Alignof(TYPE)))
142 
143 /*
144  * We append the 'struct fpu' to the task_struct:
145  */
146 static void __init fpu__init_task_struct_size(void)
147 {
148 	int task_size = sizeof(struct task_struct);
149 
150 	task_size += sizeof(struct fpu);
151 
152 	/*
153 	 * Subtract off the static size of the register state.
154 	 * It potentially has a bunch of padding.
155 	 */
156 	task_size -= sizeof(union fpregs_state);
157 
158 	/*
159 	 * Add back the dynamically-calculated register state
160 	 * size.
161 	 */
162 	task_size += fpu_kernel_cfg.default_size;
163 
164 	/*
165 	 * We dynamically size 'struct fpu', so we require that
166 	 * 'state' be at the end of 'it:
167 	 */
168 	CHECK_MEMBER_AT_END_OF(struct fpu, __fpstate);
169 
170 	arch_task_struct_size = task_size;
171 }
172 
173 /*
174  * Set up the user and kernel xstate sizes based on the legacy FPU context size.
175  *
176  * We set this up first, and later it will be overwritten by
177  * fpu__init_system_xstate() if the CPU knows about xstates.
178  */
179 static void __init fpu__init_system_xstate_size_legacy(void)
180 {
181 	unsigned int size;
182 
183 	/*
184 	 * Note that the size configuration might be overwritten later
185 	 * during fpu__init_system_xstate().
186 	 */
187 	if (!cpu_feature_enabled(X86_FEATURE_FPU)) {
188 		size = sizeof(struct swregs_state);
189 	} else if (cpu_feature_enabled(X86_FEATURE_FXSR)) {
190 		size = sizeof(struct fxregs_state);
191 		fpu_user_cfg.legacy_features = XFEATURE_MASK_FPSSE;
192 	} else {
193 		size = sizeof(struct fregs_state);
194 		fpu_user_cfg.legacy_features = XFEATURE_MASK_FP;
195 	}
196 
197 	fpu_kernel_cfg.max_size = size;
198 	fpu_kernel_cfg.default_size = size;
199 	fpu_user_cfg.max_size = size;
200 	fpu_user_cfg.default_size = size;
201 	guest_default_cfg.size = size;
202 }
203 
204 /*
205  * Called on the boot CPU once per system bootup, to set up the initial
206  * FPU state that is later cloned into all processes:
207  */
208 void __init fpu__init_system(void)
209 {
210 	fpu__init_system_early_generic();
211 
212 	/*
213 	 * The FPU has to be operational for some of the
214 	 * later FPU init activities:
215 	 */
216 	fpu__init_cpu();
217 
218 	fpu__init_system_generic();
219 	fpu__init_system_xstate_size_legacy();
220 	fpu__init_system_xstate(fpu_kernel_cfg.max_size);
221 	fpu__init_task_struct_size();
222 }
223