1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * x86 FPU boot time init code: 4 */ 5 #include <asm/fpu/api.h> 6 #include <asm/tlbflush.h> 7 #include <asm/setup.h> 8 9 #include <linux/sched.h> 10 #include <linux/sched/task.h> 11 #include <linux/init.h> 12 13 #include "internal.h" 14 #include "legacy.h" 15 #include "xstate.h" 16 17 /* 18 * Initialize the registers found in all CPUs, CR0 and CR4: 19 */ 20 static void fpu__init_cpu_generic(void) 21 { 22 unsigned long cr0; 23 unsigned long cr4_mask = 0; 24 25 if (boot_cpu_has(X86_FEATURE_FXSR)) 26 cr4_mask |= X86_CR4_OSFXSR; 27 if (boot_cpu_has(X86_FEATURE_XMM)) 28 cr4_mask |= X86_CR4_OSXMMEXCPT; 29 if (cr4_mask) 30 cr4_set_bits(cr4_mask); 31 32 cr0 = read_cr0(); 33 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */ 34 if (!boot_cpu_has(X86_FEATURE_FPU)) 35 cr0 |= X86_CR0_EM; 36 write_cr0(cr0); 37 38 /* Flush out any pending x87 state: */ 39 #ifdef CONFIG_MATH_EMULATION 40 if (!boot_cpu_has(X86_FEATURE_FPU)) 41 ; 42 else 43 #endif 44 asm volatile ("fninit"); 45 } 46 47 /* 48 * Enable all supported FPU features. Called when a CPU is brought online: 49 */ 50 void fpu__init_cpu(void) 51 { 52 fpu__init_cpu_generic(); 53 fpu__init_cpu_xstate(); 54 } 55 56 static bool __init fpu__probe_without_cpuid(void) 57 { 58 unsigned long cr0; 59 u16 fsw, fcw; 60 61 fsw = fcw = 0xffff; 62 63 cr0 = read_cr0(); 64 cr0 &= ~(X86_CR0_TS | X86_CR0_EM); 65 write_cr0(cr0); 66 67 asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw)); 68 69 pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw); 70 71 return fsw == 0 && (fcw & 0x103f) == 0x003f; 72 } 73 74 static void __init fpu__init_system_early_generic(void) 75 { 76 set_thread_flag(TIF_NEED_FPU_LOAD); 77 78 if (!boot_cpu_has(X86_FEATURE_CPUID) && 79 !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) { 80 if (fpu__probe_without_cpuid()) 81 setup_force_cpu_cap(X86_FEATURE_FPU); 82 else 83 setup_clear_cpu_cap(X86_FEATURE_FPU); 84 } 85 86 #ifndef CONFIG_MATH_EMULATION 87 if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) { 88 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n"); 89 for (;;) 90 asm volatile("hlt"); 91 } 92 #endif 93 } 94 95 /* 96 * Boot time FPU feature detection code: 97 */ 98 unsigned int mxcsr_feature_mask __ro_after_init = 0xffffffffu; 99 100 static void __init fpu__init_system_mxcsr(void) 101 { 102 unsigned int mask = 0; 103 104 if (boot_cpu_has(X86_FEATURE_FXSR)) { 105 /* Static because GCC does not get 16-byte stack alignment right: */ 106 static struct fxregs_state fxregs __initdata; 107 108 asm volatile("fxsave %0" : "+m" (fxregs)); 109 110 mask = fxregs.mxcsr_mask; 111 112 /* 113 * If zero then use the default features mask, 114 * which has all features set, except the 115 * denormals-are-zero feature bit: 116 */ 117 if (mask == 0) 118 mask = 0x0000ffbf; 119 } 120 mxcsr_feature_mask &= mask; 121 } 122 123 /* 124 * Once per bootup FPU initialization sequences that will run on most x86 CPUs: 125 */ 126 static void __init fpu__init_system_generic(void) 127 { 128 /* 129 * Set up the legacy init FPU context. Will be updated when the 130 * CPU supports XSAVE[S]. 131 */ 132 fpstate_init_user(&init_fpstate); 133 134 fpu__init_system_mxcsr(); 135 } 136 137 /* 138 * Enforce that 'MEMBER' is the last field of 'TYPE'. 139 * 140 * Align the computed size with alignment of the TYPE, 141 * because that's how C aligns structs. 142 */ 143 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \ 144 BUILD_BUG_ON(sizeof(TYPE) != \ 145 ALIGN(offsetofend(TYPE, MEMBER), _Alignof(TYPE))) 146 147 /* 148 * We append the 'struct fpu' to the task_struct: 149 */ 150 static void __init fpu__init_task_struct_size(void) 151 { 152 int task_size = sizeof(struct task_struct); 153 154 task_size += sizeof(struct fpu); 155 156 /* 157 * Subtract off the static size of the register state. 158 * It potentially has a bunch of padding. 159 */ 160 task_size -= sizeof(union fpregs_state); 161 162 /* 163 * Add back the dynamically-calculated register state 164 * size. 165 */ 166 task_size += fpu_kernel_cfg.default_size; 167 168 /* 169 * We dynamically size 'struct fpu', so we require that 170 * 'state' be at the end of 'it: 171 */ 172 CHECK_MEMBER_AT_END_OF(struct fpu, __fpstate); 173 174 arch_task_struct_size = task_size; 175 } 176 177 /* 178 * Set up the user and kernel xstate sizes based on the legacy FPU context size. 179 * 180 * We set this up first, and later it will be overwritten by 181 * fpu__init_system_xstate() if the CPU knows about xstates. 182 */ 183 static void __init fpu__init_system_xstate_size_legacy(void) 184 { 185 unsigned int size; 186 187 /* 188 * Note that the size configuration might be overwritten later 189 * during fpu__init_system_xstate(). 190 */ 191 if (!cpu_feature_enabled(X86_FEATURE_FPU)) { 192 size = sizeof(struct swregs_state); 193 } else if (cpu_feature_enabled(X86_FEATURE_FXSR)) { 194 size = sizeof(struct fxregs_state); 195 fpu_user_cfg.legacy_features = XFEATURE_MASK_FPSSE; 196 } else { 197 size = sizeof(struct fregs_state); 198 fpu_user_cfg.legacy_features = XFEATURE_MASK_FP; 199 } 200 201 fpu_kernel_cfg.max_size = size; 202 fpu_kernel_cfg.default_size = size; 203 fpu_user_cfg.max_size = size; 204 fpu_user_cfg.default_size = size; 205 } 206 207 /* 208 * Called on the boot CPU once per system bootup, to set up the initial 209 * FPU state that is later cloned into all processes: 210 */ 211 void __init fpu__init_system(void) 212 { 213 fpu__init_system_early_generic(); 214 215 /* 216 * The FPU has to be operational for some of the 217 * later FPU init activities: 218 */ 219 fpu__init_cpu(); 220 221 fpu__init_system_generic(); 222 fpu__init_system_xstate_size_legacy(); 223 fpu__init_system_xstate(fpu_kernel_cfg.max_size); 224 fpu__init_task_struct_size(); 225 } 226