1 // SPDX-License-Identifier: GPL-2.0 2 #include <linux/console.h> 3 #include <linux/kernel.h> 4 #include <linux/kexec.h> 5 #include <linux/init.h> 6 #include <linux/string.h> 7 #include <linux/screen_info.h> 8 #include <linux/usb/ch9.h> 9 #include <linux/pci_regs.h> 10 #include <linux/pci_ids.h> 11 #include <linux/errno.h> 12 #include <linux/pgtable.h> 13 #include <asm/io.h> 14 #include <asm/processor.h> 15 #include <asm/fcntl.h> 16 #include <asm/setup.h> 17 #include <xen/hvc-console.h> 18 #include <asm/pci-direct.h> 19 #include <asm/fixmap.h> 20 #include <linux/usb/ehci_def.h> 21 #include <linux/usb/xhci-dbgp.h> 22 #include <asm/pci_x86.h> 23 #include <linux/static_call.h> 24 25 /* Simple VGA output */ 26 #define VGABASE (__ISA_IO_base + 0xb8000) 27 28 static int max_ypos = 25, max_xpos = 80; 29 static int current_ypos = 25, current_xpos; 30 31 static void early_vga_write(struct console *con, const char *str, unsigned n) 32 { 33 char c; 34 int i, k, j; 35 36 while ((c = *str++) != '\0' && n-- > 0) { 37 if (current_ypos >= max_ypos) { 38 /* scroll 1 line up */ 39 for (k = 1, j = 0; k < max_ypos; k++, j++) { 40 for (i = 0; i < max_xpos; i++) { 41 writew(readw(VGABASE+2*(max_xpos*k+i)), 42 VGABASE + 2*(max_xpos*j + i)); 43 } 44 } 45 for (i = 0; i < max_xpos; i++) 46 writew(0x720, VGABASE + 2*(max_xpos*j + i)); 47 current_ypos = max_ypos-1; 48 } 49 #ifdef CONFIG_KGDB_KDB 50 if (c == '\b') { 51 if (current_xpos > 0) 52 current_xpos--; 53 } else if (c == '\r') { 54 current_xpos = 0; 55 } else 56 #endif 57 if (c == '\n') { 58 current_xpos = 0; 59 current_ypos++; 60 } else if (c != '\r') { 61 writew(((0x7 << 8) | (unsigned short) c), 62 VGABASE + 2*(max_xpos*current_ypos + 63 current_xpos++)); 64 if (current_xpos >= max_xpos) { 65 current_xpos = 0; 66 current_ypos++; 67 } 68 } 69 } 70 } 71 72 static struct console early_vga_console = { 73 .name = "earlyvga", 74 .write = early_vga_write, 75 .flags = CON_PRINTBUFFER, 76 .index = -1, 77 }; 78 79 /* Serial functions loosely based on a similar package from Klaus P. Gerlicher */ 80 81 static unsigned long early_serial_base = 0x3f8; /* ttyS0 */ 82 83 #define XMTRDY 0x20 84 85 #define DLAB 0x80 86 87 #define TXR 0 /* Transmit register (WRITE) */ 88 #define RXR 0 /* Receive register (READ) */ 89 #define IER 1 /* Interrupt Enable */ 90 #define IIR 2 /* Interrupt ID */ 91 #define FCR 2 /* FIFO control */ 92 #define LCR 3 /* Line control */ 93 #define MCR 4 /* Modem control */ 94 #define LSR 5 /* Line Status */ 95 #define MSR 6 /* Modem Status */ 96 #define DLL 0 /* Divisor Latch Low */ 97 #define DLH 1 /* Divisor latch High */ 98 99 static __noendbr unsigned int io_serial_in(unsigned long addr, int offset) 100 { 101 return inb(addr + offset); 102 } 103 ANNOTATE_NOENDBR_SYM(io_serial_in); 104 105 static __noendbr void io_serial_out(unsigned long addr, int offset, int value) 106 { 107 outb(value, addr + offset); 108 } 109 ANNOTATE_NOENDBR_SYM(io_serial_out); 110 111 DEFINE_STATIC_CALL(serial_in, io_serial_in); 112 DEFINE_STATIC_CALL(serial_out, io_serial_out); 113 114 static int early_serial_putc(unsigned char ch) 115 { 116 unsigned timeout = 0xffff; 117 118 while ((static_call(serial_in)(early_serial_base, LSR) & XMTRDY) == 0 && --timeout) 119 cpu_relax(); 120 static_call(serial_out)(early_serial_base, TXR, ch); 121 return timeout ? 0 : -1; 122 } 123 124 static void early_serial_write(struct console *con, const char *s, unsigned n) 125 { 126 while (*s && n-- > 0) { 127 if (*s == '\n') 128 early_serial_putc('\r'); 129 early_serial_putc(*s); 130 s++; 131 } 132 } 133 134 static __init void early_serial_hw_init(unsigned divisor) 135 { 136 unsigned char c; 137 138 static_call(serial_out)(early_serial_base, LCR, 0x3); /* 8n1 */ 139 static_call(serial_out)(early_serial_base, IER, 0); /* no interrupt */ 140 static_call(serial_out)(early_serial_base, FCR, 0); /* no fifo */ 141 static_call(serial_out)(early_serial_base, MCR, 0x3); /* DTR + RTS */ 142 143 c = static_call(serial_in)(early_serial_base, LCR); 144 static_call(serial_out)(early_serial_base, LCR, c | DLAB); 145 static_call(serial_out)(early_serial_base, DLL, divisor & 0xff); 146 static_call(serial_out)(early_serial_base, DLH, (divisor >> 8) & 0xff); 147 static_call(serial_out)(early_serial_base, LCR, c & ~DLAB); 148 149 #if defined(CONFIG_KEXEC_CORE) && defined(CONFIG_X86_64) 150 if (static_call_query(serial_in) == io_serial_in) 151 kexec_debug_8250_port = early_serial_base; 152 #endif 153 } 154 155 #define DEFAULT_BAUD 9600 156 157 static __init void early_serial_init(char *s) 158 { 159 unsigned divisor; 160 unsigned long baud = DEFAULT_BAUD; 161 char *e; 162 163 if (*s == ',') 164 ++s; 165 166 if (*s) { 167 unsigned port; 168 if (!strncmp(s, "0x", 2)) { 169 early_serial_base = simple_strtoul(s, &e, 16); 170 } else { 171 static const int __initconst bases[] = { 0x3f8, 0x2f8 }; 172 173 if (!strncmp(s, "ttyS", 4)) 174 s += 4; 175 port = simple_strtoul(s, &e, 10); 176 if (port > 1 || s == e) 177 port = 0; 178 early_serial_base = bases[port]; 179 } 180 s += strcspn(s, ","); 181 if (*s == ',') 182 s++; 183 } 184 185 if (*s) { 186 baud = simple_strtoull(s, &e, 0); 187 188 if (baud == 0 || s == e) 189 baud = DEFAULT_BAUD; 190 } 191 192 /* Convert from baud to divisor value */ 193 divisor = 115200 / baud; 194 195 /* Set up the HW */ 196 early_serial_hw_init(divisor); 197 } 198 199 static __noendbr void mem32_serial_out(unsigned long addr, int offset, int value) 200 { 201 u32 __iomem *vaddr = (u32 __iomem *)addr; 202 /* shift implied by pointer type */ 203 writel(value, vaddr + offset); 204 } 205 ANNOTATE_NOENDBR_SYM(mem32_serial_out); 206 207 static __noendbr unsigned int mem32_serial_in(unsigned long addr, int offset) 208 { 209 u32 __iomem *vaddr = (u32 __iomem *)addr; 210 /* shift implied by pointer type */ 211 return readl(vaddr + offset); 212 } 213 ANNOTATE_NOENDBR_SYM(mem32_serial_in); 214 215 /* 216 * early_mmio_serial_init() - Initialize MMIO-based early serial console. 217 * @s: MMIO-based serial specification. 218 */ 219 static __init void early_mmio_serial_init(char *s) 220 { 221 unsigned long baudrate; 222 unsigned long membase; 223 char *e; 224 225 if (*s == ',') 226 s++; 227 228 if (!strncmp(s, "0x", 2)) { 229 /* NB: only 32-bit addresses are supported. */ 230 membase = simple_strtoul(s, &e, 16); 231 early_serial_base = (unsigned long)early_ioremap(membase, PAGE_SIZE); 232 233 static_call_update(serial_in, mem32_serial_in); 234 static_call_update(serial_out, mem32_serial_out); 235 236 s += strcspn(s, ","); 237 if (*s == ',') 238 s++; 239 } 240 241 if (!strncmp(s, "nocfg", 5)) { 242 baudrate = 0; 243 } else { 244 baudrate = simple_strtoul(s, &e, 0); 245 if (baudrate == 0 || s == e) 246 baudrate = DEFAULT_BAUD; 247 } 248 249 if (baudrate) 250 early_serial_hw_init(115200 / baudrate); 251 } 252 253 #ifdef CONFIG_PCI 254 /* 255 * early_pci_serial_init() 256 * 257 * This function is invoked when the early_printk param starts with "pciserial" 258 * The rest of the param should be "[force],B:D.F,baud", where B, D & F describe 259 * the location of a PCI device that must be a UART device. "force" is optional 260 * and overrides the use of an UART device with a wrong PCI class code. 261 */ 262 static __init void early_pci_serial_init(char *s) 263 { 264 unsigned divisor; 265 unsigned long baud = DEFAULT_BAUD; 266 u8 bus, slot, func; 267 u32 classcode, bar0; 268 u16 cmdreg; 269 char *e; 270 int force = 0; 271 272 if (*s == ',') 273 ++s; 274 275 if (*s == 0) 276 return; 277 278 /* Force the use of an UART device with wrong class code */ 279 if (!strncmp(s, "force,", 6)) { 280 force = 1; 281 s += 6; 282 } 283 284 /* 285 * Part the param to get the BDF values 286 */ 287 bus = (u8)simple_strtoul(s, &e, 16); 288 s = e; 289 if (*s != ':') 290 return; 291 ++s; 292 slot = (u8)simple_strtoul(s, &e, 16); 293 s = e; 294 if (*s != '.') 295 return; 296 ++s; 297 func = (u8)simple_strtoul(s, &e, 16); 298 s = e; 299 300 /* A baud might be following */ 301 if (*s == ',') 302 s++; 303 304 /* 305 * Find the device from the BDF 306 */ 307 cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND); 308 classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); 309 bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); 310 311 /* 312 * Verify it is a 16550-UART type device 313 */ 314 if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) && 315 (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) || 316 (((classcode >> 8) & 0xff) != PCI_SERIAL_16550_COMPATIBLE)) { 317 if (!force) 318 return; 319 } 320 321 /* 322 * Determine if it is IO or memory mapped 323 */ 324 if ((bar0 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { 325 /* it is IO mapped */ 326 early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK; 327 write_pci_config(bus, slot, func, PCI_COMMAND, 328 cmdreg|PCI_COMMAND_IO); 329 } else { 330 /* It is memory mapped - assume 32-bit alignment */ 331 static_call_update(serial_in, mem32_serial_in); 332 static_call_update(serial_out, mem32_serial_out); 333 /* WARNING! assuming the address is always in the first 4G */ 334 early_serial_base = 335 (unsigned long)early_ioremap(bar0 & PCI_BASE_ADDRESS_MEM_MASK, 0x10); 336 #if defined(CONFIG_KEXEC_CORE) && defined(CONFIG_X86_64) 337 kexec_debug_8250_mmio32 = bar0 & PCI_BASE_ADDRESS_MEM_MASK; 338 #endif 339 write_pci_config(bus, slot, func, PCI_COMMAND, 340 cmdreg|PCI_COMMAND_MEMORY); 341 } 342 343 /* 344 * Initialize the hardware 345 */ 346 if (*s) { 347 if (strcmp(s, "nocfg") == 0) 348 /* Sometimes, we want to leave the UART alone 349 * and assume the BIOS has set it up correctly. 350 * "nocfg" tells us this is the case, and we 351 * should do no more setup. 352 */ 353 return; 354 if (kstrtoul(s, 0, &baud) < 0 || baud == 0) 355 baud = DEFAULT_BAUD; 356 } 357 358 /* Convert from baud to divisor value */ 359 divisor = 115200 / baud; 360 361 /* Set up the HW */ 362 early_serial_hw_init(divisor); 363 } 364 #endif 365 366 static struct console early_serial_console = { 367 .name = "earlyser", 368 .write = early_serial_write, 369 .flags = CON_PRINTBUFFER, 370 .index = -1, 371 }; 372 373 static void early_console_register(struct console *con, int keep_early) 374 { 375 if (con->index != -1) { 376 printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n", 377 con->name); 378 return; 379 } 380 early_console = con; 381 if (keep_early) 382 early_console->flags &= ~CON_BOOT; 383 else 384 early_console->flags |= CON_BOOT; 385 register_console(early_console); 386 } 387 388 static int __init setup_early_printk(char *buf) 389 { 390 int keep; 391 392 if (!buf) 393 return 0; 394 395 if (early_console) 396 return 0; 397 398 keep = (strstr(buf, "keep") != NULL); 399 400 while (*buf != '\0') { 401 if (!strncmp(buf, "mmio32", 6)) { 402 buf += 6; 403 early_mmio_serial_init(buf); 404 early_console_register(&early_serial_console, keep); 405 } 406 if (!strncmp(buf, "serial", 6)) { 407 buf += 6; 408 early_serial_init(buf); 409 early_console_register(&early_serial_console, keep); 410 if (!strncmp(buf, ",ttyS", 5)) 411 buf += 5; 412 } 413 if (!strncmp(buf, "ttyS", 4)) { 414 early_serial_init(buf + 4); 415 early_console_register(&early_serial_console, keep); 416 } 417 #ifdef CONFIG_PCI 418 if (!strncmp(buf, "pciserial", 9)) { 419 buf += 9; /* Keep from match the above "pciserial" */ 420 early_pci_serial_init(buf); 421 early_console_register(&early_serial_console, keep); 422 } 423 #endif 424 if (!strncmp(buf, "vga", 3) && 425 boot_params.screen_info.orig_video_isVGA == 1) { 426 max_xpos = boot_params.screen_info.orig_video_cols; 427 max_ypos = boot_params.screen_info.orig_video_lines; 428 current_ypos = boot_params.screen_info.orig_y; 429 early_console_register(&early_vga_console, keep); 430 } 431 #ifdef CONFIG_EARLY_PRINTK_DBGP 432 if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4)) 433 early_console_register(&early_dbgp_console, keep); 434 #endif 435 #ifdef CONFIG_HVC_XEN 436 if (!strncmp(buf, "xen", 3)) 437 early_console_register(&xenboot_console, keep); 438 #endif 439 #ifdef CONFIG_EARLY_PRINTK_USB_XDBC 440 if (!strncmp(buf, "xdbc", 4)) 441 early_xdbc_parse_parameter(buf + 4, keep); 442 #endif 443 444 buf++; 445 } 446 return 0; 447 } 448 449 early_param("earlyprintk", setup_early_printk); 450