xref: /linux/arch/x86/kernel/early_printk.c (revision 69bfec7548f4c1595bac0e3ddfc0458a5af31f4c)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/console.h>
3 #include <linux/kernel.h>
4 #include <linux/init.h>
5 #include <linux/string.h>
6 #include <linux/screen_info.h>
7 #include <linux/usb/ch9.h>
8 #include <linux/pci_regs.h>
9 #include <linux/pci_ids.h>
10 #include <linux/errno.h>
11 #include <linux/pgtable.h>
12 #include <asm/io.h>
13 #include <asm/processor.h>
14 #include <asm/fcntl.h>
15 #include <asm/setup.h>
16 #include <xen/hvc-console.h>
17 #include <asm/pci-direct.h>
18 #include <asm/fixmap.h>
19 #include <linux/usb/ehci_def.h>
20 #include <linux/usb/xhci-dbgp.h>
21 #include <asm/pci_x86.h>
22 
23 /* Simple VGA output */
24 #define VGABASE		(__ISA_IO_base + 0xb8000)
25 
26 static int max_ypos = 25, max_xpos = 80;
27 static int current_ypos = 25, current_xpos;
28 
29 static void early_vga_write(struct console *con, const char *str, unsigned n)
30 {
31 	char c;
32 	int  i, k, j;
33 
34 	while ((c = *str++) != '\0' && n-- > 0) {
35 		if (current_ypos >= max_ypos) {
36 			/* scroll 1 line up */
37 			for (k = 1, j = 0; k < max_ypos; k++, j++) {
38 				for (i = 0; i < max_xpos; i++) {
39 					writew(readw(VGABASE+2*(max_xpos*k+i)),
40 					       VGABASE + 2*(max_xpos*j + i));
41 				}
42 			}
43 			for (i = 0; i < max_xpos; i++)
44 				writew(0x720, VGABASE + 2*(max_xpos*j + i));
45 			current_ypos = max_ypos-1;
46 		}
47 #ifdef CONFIG_KGDB_KDB
48 		if (c == '\b') {
49 			if (current_xpos > 0)
50 				current_xpos--;
51 		} else if (c == '\r') {
52 			current_xpos = 0;
53 		} else
54 #endif
55 		if (c == '\n') {
56 			current_xpos = 0;
57 			current_ypos++;
58 		} else if (c != '\r')  {
59 			writew(((0x7 << 8) | (unsigned short) c),
60 			       VGABASE + 2*(max_xpos*current_ypos +
61 						current_xpos++));
62 			if (current_xpos >= max_xpos) {
63 				current_xpos = 0;
64 				current_ypos++;
65 			}
66 		}
67 	}
68 }
69 
70 static struct console early_vga_console = {
71 	.name =		"earlyvga",
72 	.write =	early_vga_write,
73 	.flags =	CON_PRINTBUFFER,
74 	.index =	-1,
75 };
76 
77 /* Serial functions loosely based on a similar package from Klaus P. Gerlicher */
78 
79 static unsigned long early_serial_base = 0x3f8;  /* ttyS0 */
80 
81 #define XMTRDY          0x20
82 
83 #define DLAB		0x80
84 
85 #define TXR             0       /*  Transmit register (WRITE) */
86 #define RXR             0       /*  Receive register  (READ)  */
87 #define IER             1       /*  Interrupt Enable          */
88 #define IIR             2       /*  Interrupt ID              */
89 #define FCR             2       /*  FIFO control              */
90 #define LCR             3       /*  Line control              */
91 #define MCR             4       /*  Modem control             */
92 #define LSR             5       /*  Line Status               */
93 #define MSR             6       /*  Modem Status              */
94 #define DLL             0       /*  Divisor Latch Low         */
95 #define DLH             1       /*  Divisor latch High        */
96 
97 static unsigned int io_serial_in(unsigned long addr, int offset)
98 {
99 	return inb(addr + offset);
100 }
101 
102 static void io_serial_out(unsigned long addr, int offset, int value)
103 {
104 	outb(value, addr + offset);
105 }
106 
107 static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
108 static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;
109 
110 static int early_serial_putc(unsigned char ch)
111 {
112 	unsigned timeout = 0xffff;
113 
114 	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
115 		cpu_relax();
116 	serial_out(early_serial_base, TXR, ch);
117 	return timeout ? 0 : -1;
118 }
119 
120 static void early_serial_write(struct console *con, const char *s, unsigned n)
121 {
122 	while (*s && n-- > 0) {
123 		if (*s == '\n')
124 			early_serial_putc('\r');
125 		early_serial_putc(*s);
126 		s++;
127 	}
128 }
129 
130 static __init void early_serial_hw_init(unsigned divisor)
131 {
132 	unsigned char c;
133 
134 	serial_out(early_serial_base, LCR, 0x3);	/* 8n1 */
135 	serial_out(early_serial_base, IER, 0);	/* no interrupt */
136 	serial_out(early_serial_base, FCR, 0);	/* no fifo */
137 	serial_out(early_serial_base, MCR, 0x3);	/* DTR + RTS */
138 
139 	c = serial_in(early_serial_base, LCR);
140 	serial_out(early_serial_base, LCR, c | DLAB);
141 	serial_out(early_serial_base, DLL, divisor & 0xff);
142 	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
143 	serial_out(early_serial_base, LCR, c & ~DLAB);
144 }
145 
146 #define DEFAULT_BAUD 9600
147 
148 static __init void early_serial_init(char *s)
149 {
150 	unsigned divisor;
151 	unsigned long baud = DEFAULT_BAUD;
152 	char *e;
153 
154 	if (*s == ',')
155 		++s;
156 
157 	if (*s) {
158 		unsigned port;
159 		if (!strncmp(s, "0x", 2)) {
160 			early_serial_base = simple_strtoul(s, &e, 16);
161 		} else {
162 			static const int __initconst bases[] = { 0x3f8, 0x2f8 };
163 
164 			if (!strncmp(s, "ttyS", 4))
165 				s += 4;
166 			port = simple_strtoul(s, &e, 10);
167 			if (port > 1 || s == e)
168 				port = 0;
169 			early_serial_base = bases[port];
170 		}
171 		s += strcspn(s, ",");
172 		if (*s == ',')
173 			s++;
174 	}
175 
176 	if (*s) {
177 		baud = simple_strtoull(s, &e, 0);
178 
179 		if (baud == 0 || s == e)
180 			baud = DEFAULT_BAUD;
181 	}
182 
183 	/* Convert from baud to divisor value */
184 	divisor = 115200 / baud;
185 
186 	/* These will always be IO based ports */
187 	serial_in = io_serial_in;
188 	serial_out = io_serial_out;
189 
190 	/* Set up the HW */
191 	early_serial_hw_init(divisor);
192 }
193 
194 #ifdef CONFIG_PCI
195 static void mem32_serial_out(unsigned long addr, int offset, int value)
196 {
197 	u32 __iomem *vaddr = (u32 __iomem *)addr;
198 	/* shift implied by pointer type */
199 	writel(value, vaddr + offset);
200 }
201 
202 static unsigned int mem32_serial_in(unsigned long addr, int offset)
203 {
204 	u32 __iomem *vaddr = (u32 __iomem *)addr;
205 	/* shift implied by pointer type */
206 	return readl(vaddr + offset);
207 }
208 
209 /*
210  * early_pci_serial_init()
211  *
212  * This function is invoked when the early_printk param starts with "pciserial"
213  * The rest of the param should be "[force],B:D.F,baud", where B, D & F describe
214  * the location of a PCI device that must be a UART device. "force" is optional
215  * and overrides the use of an UART device with a wrong PCI class code.
216  */
217 static __init void early_pci_serial_init(char *s)
218 {
219 	unsigned divisor;
220 	unsigned long baud = DEFAULT_BAUD;
221 	u8 bus, slot, func;
222 	u32 classcode, bar0;
223 	u16 cmdreg;
224 	char *e;
225 	int force = 0;
226 
227 	if (*s == ',')
228 		++s;
229 
230 	if (*s == 0)
231 		return;
232 
233 	/* Force the use of an UART device with wrong class code */
234 	if (!strncmp(s, "force,", 6)) {
235 		force = 1;
236 		s += 6;
237 	}
238 
239 	/*
240 	 * Part the param to get the BDF values
241 	 */
242 	bus = (u8)simple_strtoul(s, &e, 16);
243 	s = e;
244 	if (*s != ':')
245 		return;
246 	++s;
247 	slot = (u8)simple_strtoul(s, &e, 16);
248 	s = e;
249 	if (*s != '.')
250 		return;
251 	++s;
252 	func = (u8)simple_strtoul(s, &e, 16);
253 	s = e;
254 
255 	/* A baud might be following */
256 	if (*s == ',')
257 		s++;
258 
259 	/*
260 	 * Find the device from the BDF
261 	 */
262 	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
263 	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
264 	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
265 
266 	/*
267 	 * Verify it is a 16550-UART type device
268 	 */
269 	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
270 	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
271 	    (((classcode >> 8) & 0xff) != PCI_SERIAL_16550_COMPATIBLE)) {
272 		if (!force)
273 			return;
274 	}
275 
276 	/*
277 	 * Determine if it is IO or memory mapped
278 	 */
279 	if ((bar0 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
280 		/* it is IO mapped */
281 		serial_in = io_serial_in;
282 		serial_out = io_serial_out;
283 		early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK;
284 		write_pci_config(bus, slot, func, PCI_COMMAND,
285 				 cmdreg|PCI_COMMAND_IO);
286 	} else {
287 		/* It is memory mapped - assume 32-bit alignment */
288 		serial_in = mem32_serial_in;
289 		serial_out = mem32_serial_out;
290 		/* WARNING! assuming the address is always in the first 4G */
291 		early_serial_base =
292 			(unsigned long)early_ioremap(bar0 & PCI_BASE_ADDRESS_MEM_MASK, 0x10);
293 		write_pci_config(bus, slot, func, PCI_COMMAND,
294 				 cmdreg|PCI_COMMAND_MEMORY);
295 	}
296 
297 	/*
298 	 * Initialize the hardware
299 	 */
300 	if (*s) {
301 		if (strcmp(s, "nocfg") == 0)
302 			/* Sometimes, we want to leave the UART alone
303 			 * and assume the BIOS has set it up correctly.
304 			 * "nocfg" tells us this is the case, and we
305 			 * should do no more setup.
306 			 */
307 			return;
308 		if (kstrtoul(s, 0, &baud) < 0 || baud == 0)
309 			baud = DEFAULT_BAUD;
310 	}
311 
312 	/* Convert from baud to divisor value */
313 	divisor = 115200 / baud;
314 
315 	/* Set up the HW */
316 	early_serial_hw_init(divisor);
317 }
318 #endif
319 
320 static struct console early_serial_console = {
321 	.name =		"earlyser",
322 	.write =	early_serial_write,
323 	.flags =	CON_PRINTBUFFER,
324 	.index =	-1,
325 };
326 
327 static void early_console_register(struct console *con, int keep_early)
328 {
329 	if (con->index != -1) {
330 		printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
331 		       con->name);
332 		return;
333 	}
334 	early_console = con;
335 	if (keep_early)
336 		early_console->flags &= ~CON_BOOT;
337 	else
338 		early_console->flags |= CON_BOOT;
339 	register_console(early_console);
340 }
341 
342 static int __init setup_early_printk(char *buf)
343 {
344 	int keep;
345 
346 	if (!buf)
347 		return 0;
348 
349 	if (early_console)
350 		return 0;
351 
352 	keep = (strstr(buf, "keep") != NULL);
353 
354 	while (*buf != '\0') {
355 		if (!strncmp(buf, "serial", 6)) {
356 			buf += 6;
357 			early_serial_init(buf);
358 			early_console_register(&early_serial_console, keep);
359 			if (!strncmp(buf, ",ttyS", 5))
360 				buf += 5;
361 		}
362 		if (!strncmp(buf, "ttyS", 4)) {
363 			early_serial_init(buf + 4);
364 			early_console_register(&early_serial_console, keep);
365 		}
366 #ifdef CONFIG_PCI
367 		if (!strncmp(buf, "pciserial", 9)) {
368 			early_pci_serial_init(buf + 9);
369 			early_console_register(&early_serial_console, keep);
370 			buf += 9; /* Keep from match the above "serial" */
371 		}
372 #endif
373 		if (!strncmp(buf, "vga", 3) &&
374 		    boot_params.screen_info.orig_video_isVGA == 1) {
375 			max_xpos = boot_params.screen_info.orig_video_cols;
376 			max_ypos = boot_params.screen_info.orig_video_lines;
377 			current_ypos = boot_params.screen_info.orig_y;
378 			early_console_register(&early_vga_console, keep);
379 		}
380 #ifdef CONFIG_EARLY_PRINTK_DBGP
381 		if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
382 			early_console_register(&early_dbgp_console, keep);
383 #endif
384 #ifdef CONFIG_HVC_XEN
385 		if (!strncmp(buf, "xen", 3))
386 			early_console_register(&xenboot_console, keep);
387 #endif
388 #ifdef CONFIG_EARLY_PRINTK_USB_XDBC
389 		if (!strncmp(buf, "xdbc", 4))
390 			early_xdbc_parse_parameter(buf + 4, keep);
391 #endif
392 
393 		buf++;
394 	}
395 	return 0;
396 }
397 
398 early_param("earlyprintk", setup_early_printk);
399