xref: /linux/arch/x86/kernel/devicetree.c (revision b68d0924ad8391d637f55bad0f987f8696a2d126)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Architecture specific OF callbacks.
4  */
5 #include <linux/export.h>
6 #include <linux/io.h>
7 #include <linux/interrupt.h>
8 #include <linux/list.h>
9 #include <linux/of.h>
10 #include <linux/of_fdt.h>
11 #include <linux/of_address.h>
12 #include <linux/of_platform.h>
13 #include <linux/of_irq.h>
14 #include <linux/libfdt.h>
15 #include <linux/slab.h>
16 #include <linux/pci.h>
17 #include <linux/of_pci.h>
18 #include <linux/initrd.h>
19 
20 #include <asm/irqdomain.h>
21 #include <asm/hpet.h>
22 #include <asm/apic.h>
23 #include <asm/io_apic.h>
24 #include <asm/pci_x86.h>
25 #include <asm/setup.h>
26 #include <asm/i8259.h>
27 #include <asm/prom.h>
28 
29 __initdata u64 initial_dtb;
30 char __initdata cmd_line[COMMAND_LINE_SIZE];
31 
32 int __initdata of_ioapic;
33 
34 void __init early_init_dt_scan_chosen_arch(unsigned long node)
35 {
36 	BUG();
37 }
38 
39 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
40 {
41 	BUG();
42 }
43 
44 void __init add_dtb(u64 data)
45 {
46 	initial_dtb = data + offsetof(struct setup_data, data);
47 }
48 
49 /*
50  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
51  */
52 static struct of_device_id __initdata ce4100_ids[] = {
53 	{ .compatible = "intel,ce4100-cp", },
54 	{ .compatible = "isa", },
55 	{ .compatible = "pci", },
56 	{},
57 };
58 
59 static int __init add_bus_probe(void)
60 {
61 	if (!of_have_populated_dt())
62 		return 0;
63 
64 	return of_platform_bus_probe(NULL, ce4100_ids, NULL);
65 }
66 device_initcall(add_bus_probe);
67 
68 #ifdef CONFIG_PCI
69 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
70 {
71 	struct device_node *np;
72 
73 	for_each_node_by_type(np, "pci") {
74 		const void *prop;
75 		unsigned int bus_min;
76 
77 		prop = of_get_property(np, "bus-range", NULL);
78 		if (!prop)
79 			continue;
80 		bus_min = be32_to_cpup(prop);
81 		if (bus->number == bus_min)
82 			return np;
83 	}
84 	return NULL;
85 }
86 
87 static int x86_of_pci_irq_enable(struct pci_dev *dev)
88 {
89 	u32 virq;
90 	int ret;
91 	u8 pin;
92 
93 	ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
94 	if (ret)
95 		return ret;
96 	if (!pin)
97 		return 0;
98 
99 	virq = of_irq_parse_and_map_pci(dev, 0, 0);
100 	if (virq == 0)
101 		return -EINVAL;
102 	dev->irq = virq;
103 	return 0;
104 }
105 
106 static void x86_of_pci_irq_disable(struct pci_dev *dev)
107 {
108 }
109 
110 void x86_of_pci_init(void)
111 {
112 	pcibios_enable_irq = x86_of_pci_irq_enable;
113 	pcibios_disable_irq = x86_of_pci_irq_disable;
114 }
115 #endif
116 
117 static void __init dtb_setup_hpet(void)
118 {
119 #ifdef CONFIG_HPET_TIMER
120 	struct device_node *dn;
121 	struct resource r;
122 	int ret;
123 
124 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
125 	if (!dn)
126 		return;
127 	ret = of_address_to_resource(dn, 0, &r);
128 	if (ret) {
129 		WARN_ON(1);
130 		return;
131 	}
132 	hpet_address = r.start;
133 #endif
134 }
135 
136 #ifdef CONFIG_X86_LOCAL_APIC
137 
138 static void __init dtb_cpu_setup(void)
139 {
140 	struct device_node *dn;
141 	u32 apic_id, version;
142 
143 	version = GET_APIC_VERSION(apic_read(APIC_LVR));
144 	for_each_of_cpu_node(dn) {
145 		apic_id = of_get_cpu_hwid(dn, 0);
146 		if (apic_id == ~0U) {
147 			pr_warn("%pOF: missing local APIC ID\n", dn);
148 			continue;
149 		}
150 		generic_processor_info(apic_id, version);
151 	}
152 }
153 
154 static void __init dtb_lapic_setup(void)
155 {
156 	struct device_node *dn;
157 	struct resource r;
158 	unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
159 	int ret;
160 
161 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
162 	if (dn) {
163 		ret = of_address_to_resource(dn, 0, &r);
164 		if (WARN_ON(ret))
165 			return;
166 		lapic_addr = r.start;
167 	}
168 
169 	/* Did the boot loader setup the local APIC ? */
170 	if (!boot_cpu_has(X86_FEATURE_APIC)) {
171 		if (apic_force_enable(lapic_addr))
172 			return;
173 	}
174 	smp_found_config = 1;
175 	pic_mode = 1;
176 	register_lapic_address(lapic_addr);
177 }
178 
179 #endif /* CONFIG_X86_LOCAL_APIC */
180 
181 #ifdef CONFIG_X86_IO_APIC
182 static unsigned int ioapic_id;
183 
184 struct of_ioapic_type {
185 	u32 out_type;
186 	u32 is_level;
187 	u32 active_low;
188 };
189 
190 static struct of_ioapic_type of_ioapic_type[] =
191 {
192 	{
193 		.out_type	= IRQ_TYPE_EDGE_FALLING,
194 		.is_level	= 0,
195 		.active_low	= 1,
196 	},
197 	{
198 		.out_type	= IRQ_TYPE_LEVEL_HIGH,
199 		.is_level	= 1,
200 		.active_low	= 0,
201 	},
202 	{
203 		.out_type	= IRQ_TYPE_LEVEL_LOW,
204 		.is_level	= 1,
205 		.active_low	= 1,
206 	},
207 	{
208 		.out_type	= IRQ_TYPE_EDGE_RISING,
209 		.is_level	= 0,
210 		.active_low	= 0,
211 	},
212 };
213 
214 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
215 			      unsigned int nr_irqs, void *arg)
216 {
217 	struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
218 	struct of_ioapic_type *it;
219 	struct irq_alloc_info tmp;
220 	int type_index;
221 
222 	if (WARN_ON(fwspec->param_count < 2))
223 		return -EINVAL;
224 
225 	type_index = fwspec->param[1];
226 	if (type_index >= ARRAY_SIZE(of_ioapic_type))
227 		return -EINVAL;
228 
229 	it = &of_ioapic_type[type_index];
230 	ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->is_level, it->active_low);
231 	tmp.devid = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
232 	tmp.ioapic.pin = fwspec->param[0];
233 
234 	return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
235 }
236 
237 static const struct irq_domain_ops ioapic_irq_domain_ops = {
238 	.alloc		= dt_irqdomain_alloc,
239 	.free		= mp_irqdomain_free,
240 	.activate	= mp_irqdomain_activate,
241 	.deactivate	= mp_irqdomain_deactivate,
242 };
243 
244 static void __init dtb_add_ioapic(struct device_node *dn)
245 {
246 	struct resource r;
247 	int ret;
248 	struct ioapic_domain_cfg cfg = {
249 		.type = IOAPIC_DOMAIN_DYNAMIC,
250 		.ops = &ioapic_irq_domain_ops,
251 		.dev = dn,
252 	};
253 
254 	ret = of_address_to_resource(dn, 0, &r);
255 	if (ret) {
256 		printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn);
257 		return;
258 	}
259 	mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg);
260 }
261 
262 static void __init dtb_ioapic_setup(void)
263 {
264 	struct device_node *dn;
265 
266 	for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
267 		dtb_add_ioapic(dn);
268 
269 	if (nr_ioapics) {
270 		of_ioapic = 1;
271 		return;
272 	}
273 	printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
274 }
275 #else
276 static void __init dtb_ioapic_setup(void) {}
277 #endif
278 
279 static void __init dtb_apic_setup(void)
280 {
281 #ifdef CONFIG_X86_LOCAL_APIC
282 	dtb_lapic_setup();
283 	dtb_cpu_setup();
284 #endif
285 	dtb_ioapic_setup();
286 }
287 
288 #ifdef CONFIG_OF_EARLY_FLATTREE
289 static void __init x86_flattree_get_config(void)
290 {
291 	u32 size, map_len;
292 	void *dt;
293 
294 	if (!initial_dtb)
295 		return;
296 
297 	map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
298 
299 	dt = early_memremap(initial_dtb, map_len);
300 	size = fdt_totalsize(dt);
301 	if (map_len < size) {
302 		early_memunmap(dt, map_len);
303 		dt = early_memremap(initial_dtb, size);
304 		map_len = size;
305 	}
306 
307 	early_init_dt_verify(dt);
308 	unflatten_and_copy_device_tree();
309 	early_memunmap(dt, map_len);
310 }
311 #else
312 static inline void x86_flattree_get_config(void) { }
313 #endif
314 
315 void __init x86_dtb_init(void)
316 {
317 	x86_flattree_get_config();
318 
319 	if (!of_have_populated_dt())
320 		return;
321 
322 	dtb_setup_hpet();
323 	dtb_apic_setup();
324 }
325