1 /* 2 * Architecture specific OF callbacks. 3 */ 4 #include <linux/bootmem.h> 5 #include <linux/io.h> 6 #include <linux/interrupt.h> 7 #include <linux/list.h> 8 #include <linux/of.h> 9 #include <linux/of_fdt.h> 10 #include <linux/of_address.h> 11 #include <linux/of_platform.h> 12 #include <linux/of_irq.h> 13 #include <linux/slab.h> 14 #include <linux/pci.h> 15 #include <linux/of_pci.h> 16 17 #include <asm/hpet.h> 18 #include <asm/irq_controller.h> 19 #include <asm/apic.h> 20 #include <asm/pci_x86.h> 21 22 __initdata u64 initial_dtb; 23 char __initdata cmd_line[COMMAND_LINE_SIZE]; 24 static LIST_HEAD(irq_domains); 25 static DEFINE_RAW_SPINLOCK(big_irq_lock); 26 27 int __initdata of_ioapic; 28 29 #ifdef CONFIG_X86_IO_APIC 30 static void add_interrupt_host(struct irq_domain *ih) 31 { 32 unsigned long flags; 33 34 raw_spin_lock_irqsave(&big_irq_lock, flags); 35 list_add(&ih->l, &irq_domains); 36 raw_spin_unlock_irqrestore(&big_irq_lock, flags); 37 } 38 #endif 39 40 static struct irq_domain *get_ih_from_node(struct device_node *controller) 41 { 42 struct irq_domain *ih, *found = NULL; 43 unsigned long flags; 44 45 raw_spin_lock_irqsave(&big_irq_lock, flags); 46 list_for_each_entry(ih, &irq_domains, l) { 47 if (ih->controller == controller) { 48 found = ih; 49 break; 50 } 51 } 52 raw_spin_unlock_irqrestore(&big_irq_lock, flags); 53 return found; 54 } 55 56 unsigned int irq_create_of_mapping(struct device_node *controller, 57 const u32 *intspec, unsigned int intsize) 58 { 59 struct irq_domain *ih; 60 u32 virq, type; 61 int ret; 62 63 ih = get_ih_from_node(controller); 64 if (!ih) 65 return 0; 66 ret = ih->xlate(ih, intspec, intsize, &virq, &type); 67 if (ret) 68 return 0; 69 if (type == IRQ_TYPE_NONE) 70 return virq; 71 irq_set_irq_type(virq, type); 72 return virq; 73 } 74 EXPORT_SYMBOL_GPL(irq_create_of_mapping); 75 76 unsigned long pci_address_to_pio(phys_addr_t address) 77 { 78 /* 79 * The ioport address can be directly used by inX / outX 80 */ 81 BUG_ON(address >= (1 << 16)); 82 return (unsigned long)address; 83 } 84 EXPORT_SYMBOL_GPL(pci_address_to_pio); 85 86 void __init early_init_dt_scan_chosen_arch(unsigned long node) 87 { 88 BUG(); 89 } 90 91 void __init early_init_dt_add_memory_arch(u64 base, u64 size) 92 { 93 BUG(); 94 } 95 96 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) 97 { 98 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); 99 } 100 101 void __init add_dtb(u64 data) 102 { 103 initial_dtb = data + offsetof(struct setup_data, data); 104 } 105 106 /* 107 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 108 */ 109 static struct of_device_id __initdata ce4100_ids[] = { 110 { .compatible = "intel,ce4100-cp", }, 111 { .compatible = "isa", }, 112 { .compatible = "pci", }, 113 {}, 114 }; 115 116 static int __init add_bus_probe(void) 117 { 118 if (!of_have_populated_dt()) 119 return 0; 120 121 return of_platform_bus_probe(NULL, ce4100_ids, NULL); 122 } 123 module_init(add_bus_probe); 124 125 #ifdef CONFIG_PCI 126 static int x86_of_pci_irq_enable(struct pci_dev *dev) 127 { 128 struct of_irq oirq; 129 u32 virq; 130 int ret; 131 u8 pin; 132 133 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 134 if (ret) 135 return ret; 136 if (!pin) 137 return 0; 138 139 ret = of_irq_map_pci(dev, &oirq); 140 if (ret) 141 return ret; 142 143 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 144 oirq.size); 145 if (virq == 0) 146 return -EINVAL; 147 dev->irq = virq; 148 return 0; 149 } 150 151 static void x86_of_pci_irq_disable(struct pci_dev *dev) 152 { 153 } 154 155 void __cpuinit x86_of_pci_init(void) 156 { 157 struct device_node *np; 158 159 pcibios_enable_irq = x86_of_pci_irq_enable; 160 pcibios_disable_irq = x86_of_pci_irq_disable; 161 162 for_each_node_by_type(np, "pci") { 163 const void *prop; 164 struct pci_bus *bus; 165 unsigned int bus_min; 166 struct device_node *child; 167 168 prop = of_get_property(np, "bus-range", NULL); 169 if (!prop) 170 continue; 171 bus_min = be32_to_cpup(prop); 172 173 bus = pci_find_bus(0, bus_min); 174 if (!bus) { 175 printk(KERN_ERR "Can't find a node for bus %s.\n", 176 np->full_name); 177 continue; 178 } 179 180 if (bus->self) 181 bus->self->dev.of_node = np; 182 else 183 bus->dev.of_node = np; 184 185 for_each_child_of_node(np, child) { 186 struct pci_dev *dev; 187 u32 devfn; 188 189 prop = of_get_property(child, "reg", NULL); 190 if (!prop) 191 continue; 192 193 devfn = (be32_to_cpup(prop) >> 8) & 0xff; 194 dev = pci_get_slot(bus, devfn); 195 if (!dev) 196 continue; 197 dev->dev.of_node = child; 198 pci_dev_put(dev); 199 } 200 } 201 } 202 #endif 203 204 static void __init dtb_setup_hpet(void) 205 { 206 #ifdef CONFIG_HPET_TIMER 207 struct device_node *dn; 208 struct resource r; 209 int ret; 210 211 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); 212 if (!dn) 213 return; 214 ret = of_address_to_resource(dn, 0, &r); 215 if (ret) { 216 WARN_ON(1); 217 return; 218 } 219 hpet_address = r.start; 220 #endif 221 } 222 223 static void __init dtb_lapic_setup(void) 224 { 225 #ifdef CONFIG_X86_LOCAL_APIC 226 struct device_node *dn; 227 struct resource r; 228 int ret; 229 230 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); 231 if (!dn) 232 return; 233 234 ret = of_address_to_resource(dn, 0, &r); 235 if (WARN_ON(ret)) 236 return; 237 238 /* Did the boot loader setup the local APIC ? */ 239 if (!cpu_has_apic) { 240 if (apic_force_enable(r.start)) 241 return; 242 } 243 smp_found_config = 1; 244 pic_mode = 1; 245 register_lapic_address(r.start); 246 generic_processor_info(boot_cpu_physical_apicid, 247 GET_APIC_VERSION(apic_read(APIC_LVR))); 248 #endif 249 } 250 251 #ifdef CONFIG_X86_IO_APIC 252 static unsigned int ioapic_id; 253 254 static void __init dtb_add_ioapic(struct device_node *dn) 255 { 256 struct resource r; 257 int ret; 258 259 ret = of_address_to_resource(dn, 0, &r); 260 if (ret) { 261 printk(KERN_ERR "Can't obtain address from node %s.\n", 262 dn->full_name); 263 return; 264 } 265 mp_register_ioapic(++ioapic_id, r.start, gsi_top); 266 } 267 268 static void __init dtb_ioapic_setup(void) 269 { 270 struct device_node *dn; 271 272 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") 273 dtb_add_ioapic(dn); 274 275 if (nr_ioapics) { 276 of_ioapic = 1; 277 return; 278 } 279 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n"); 280 } 281 #else 282 static void __init dtb_ioapic_setup(void) {} 283 #endif 284 285 static void __init dtb_apic_setup(void) 286 { 287 dtb_lapic_setup(); 288 dtb_ioapic_setup(); 289 } 290 291 #ifdef CONFIG_OF_FLATTREE 292 static void __init x86_flattree_get_config(void) 293 { 294 u32 size, map_len; 295 void *new_dtb; 296 297 if (!initial_dtb) 298 return; 299 300 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), 301 (u64)sizeof(struct boot_param_header)); 302 303 initial_boot_params = early_memremap(initial_dtb, map_len); 304 size = be32_to_cpu(initial_boot_params->totalsize); 305 if (map_len < size) { 306 early_iounmap(initial_boot_params, map_len); 307 initial_boot_params = early_memremap(initial_dtb, size); 308 map_len = size; 309 } 310 311 new_dtb = alloc_bootmem(size); 312 memcpy(new_dtb, initial_boot_params, size); 313 early_iounmap(initial_boot_params, map_len); 314 315 initial_boot_params = new_dtb; 316 317 /* root level address cells */ 318 of_scan_flat_dt(early_init_dt_scan_root, NULL); 319 320 unflatten_device_tree(); 321 } 322 #else 323 static inline void x86_flattree_get_config(void) { } 324 #endif 325 326 void __init x86_dtb_init(void) 327 { 328 x86_flattree_get_config(); 329 330 if (!of_have_populated_dt()) 331 return; 332 333 dtb_setup_hpet(); 334 dtb_apic_setup(); 335 } 336 337 #ifdef CONFIG_X86_IO_APIC 338 339 struct of_ioapic_type { 340 u32 out_type; 341 u32 trigger; 342 u32 polarity; 343 }; 344 345 static struct of_ioapic_type of_ioapic_type[] = 346 { 347 { 348 .out_type = IRQ_TYPE_EDGE_RISING, 349 .trigger = IOAPIC_EDGE, 350 .polarity = 1, 351 }, 352 { 353 .out_type = IRQ_TYPE_LEVEL_LOW, 354 .trigger = IOAPIC_LEVEL, 355 .polarity = 0, 356 }, 357 { 358 .out_type = IRQ_TYPE_LEVEL_HIGH, 359 .trigger = IOAPIC_LEVEL, 360 .polarity = 1, 361 }, 362 { 363 .out_type = IRQ_TYPE_EDGE_FALLING, 364 .trigger = IOAPIC_EDGE, 365 .polarity = 0, 366 }, 367 }; 368 369 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize, 370 u32 *out_hwirq, u32 *out_type) 371 { 372 struct io_apic_irq_attr attr; 373 struct of_ioapic_type *it; 374 u32 line, idx, type; 375 376 if (intsize < 2) 377 return -EINVAL; 378 379 line = *intspec; 380 idx = (u32) id->priv; 381 *out_hwirq = line + mp_gsi_routing[idx].gsi_base; 382 383 intspec++; 384 type = *intspec; 385 386 if (type >= ARRAY_SIZE(of_ioapic_type)) 387 return -EINVAL; 388 389 it = of_ioapic_type + type; 390 *out_type = it->out_type; 391 392 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); 393 394 return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr); 395 } 396 397 static void __init ioapic_add_ofnode(struct device_node *np) 398 { 399 struct resource r; 400 int i, ret; 401 402 ret = of_address_to_resource(np, 0, &r); 403 if (ret) { 404 printk(KERN_ERR "Failed to obtain address for %s\n", 405 np->full_name); 406 return; 407 } 408 409 for (i = 0; i < nr_ioapics; i++) { 410 if (r.start == mp_ioapics[i].apicaddr) { 411 struct irq_domain *id; 412 413 id = kzalloc(sizeof(*id), GFP_KERNEL); 414 BUG_ON(!id); 415 id->controller = np; 416 id->xlate = ioapic_xlate; 417 id->priv = (void *)i; 418 add_interrupt_host(id); 419 return; 420 } 421 } 422 printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name); 423 } 424 425 void __init x86_add_irq_domains(void) 426 { 427 struct device_node *dp; 428 429 if (!of_have_populated_dt()) 430 return; 431 432 for_each_node_with_property(dp, "interrupt-controller") { 433 if (of_device_is_compatible(dp, "intel,ce4100-ioapic")) 434 ioapic_add_ofnode(dp); 435 } 436 } 437 #else 438 void __init x86_add_irq_domains(void) { } 439 #endif 440