xref: /linux/arch/x86/kernel/cpu/topology.c (revision b7019ac550eb3916f34d79db583e9b7ea2524afa)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Check for extended topology enumeration cpuid leaf 0xb and if it
4  * exists, use it for populating initial_apicid and cpu topology
5  * detection.
6  */
7 
8 #include <linux/cpu.h>
9 #include <asm/apic.h>
10 #include <asm/pat.h>
11 #include <asm/processor.h>
12 
13 #include "cpu.h"
14 
15 /* leaf 0xb SMT level */
16 #define SMT_LEVEL	0
17 
18 /* leaf 0xb sub-leaf types */
19 #define INVALID_TYPE	0
20 #define SMT_TYPE	1
21 #define CORE_TYPE	2
22 
23 #define LEAFB_SUBTYPE(ecx)		(((ecx) >> 8) & 0xff)
24 #define BITS_SHIFT_NEXT_LEVEL(eax)	((eax) & 0x1f)
25 #define LEVEL_MAX_SIBLINGS(ebx)		((ebx) & 0xffff)
26 
27 int detect_extended_topology_early(struct cpuinfo_x86 *c)
28 {
29 #ifdef CONFIG_SMP
30 	unsigned int eax, ebx, ecx, edx;
31 
32 	if (c->cpuid_level < 0xb)
33 		return -1;
34 
35 	cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
36 
37 	/*
38 	 * check if the cpuid leaf 0xb is actually implemented.
39 	 */
40 	if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
41 		return -1;
42 
43 	set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
44 
45 	/*
46 	 * initial apic id, which also represents 32-bit extended x2apic id.
47 	 */
48 	c->initial_apicid = edx;
49 	smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
50 #endif
51 	return 0;
52 }
53 
54 /*
55  * Check for extended topology enumeration cpuid leaf 0xb and if it
56  * exists, use it for populating initial_apicid and cpu topology
57  * detection.
58  */
59 int detect_extended_topology(struct cpuinfo_x86 *c)
60 {
61 #ifdef CONFIG_SMP
62 	unsigned int eax, ebx, ecx, edx, sub_index;
63 	unsigned int ht_mask_width, core_plus_mask_width;
64 	unsigned int core_select_mask, core_level_siblings;
65 
66 	if (detect_extended_topology_early(c) < 0)
67 		return -1;
68 
69 	/*
70 	 * Populate HT related information from sub-leaf level 0.
71 	 */
72 	cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
73 	core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
74 	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
75 
76 	sub_index = 1;
77 	do {
78 		cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
79 
80 		/*
81 		 * Check for the Core type in the implemented sub leaves.
82 		 */
83 		if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
84 			core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
85 			core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
86 			break;
87 		}
88 
89 		sub_index++;
90 	} while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
91 
92 	core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
93 
94 	c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
95 						 & core_select_mask;
96 	c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
97 	/*
98 	 * Reinit the apicid, now that we have extended initial_apicid.
99 	 */
100 	c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
101 
102 	c->x86_max_cores = (core_level_siblings / smp_num_siblings);
103 #endif
104 	return 0;
105 }
106