1 /* 2 * Routines to identify additional cpu features that are scattered in 3 * cpuid space. 4 */ 5 #include <linux/cpu.h> 6 7 #include <asm/pat.h> 8 #include <asm/processor.h> 9 10 #include <asm/apic.h> 11 12 struct cpuid_bit { 13 u16 feature; 14 u8 reg; 15 u8 bit; 16 u32 level; 17 u32 sub_leaf; 18 }; 19 20 /* Please keep the leaf sorted by cpuid_bit.level for faster search. */ 21 static const struct cpuid_bit cpuid_bits[] = { 22 { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, 23 { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, 24 { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, 25 { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, 26 { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, 27 { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, 28 { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, 29 { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, 30 { 0, 0, 0, 0, 0 } 31 }; 32 33 void init_scattered_cpuid_features(struct cpuinfo_x86 *c) 34 { 35 u32 max_level; 36 u32 regs[4]; 37 const struct cpuid_bit *cb; 38 39 for (cb = cpuid_bits; cb->feature; cb++) { 40 41 /* Verify that the level is valid */ 42 max_level = cpuid_eax(cb->level & 0xffff0000); 43 if (max_level < cb->level || 44 max_level > (cb->level | 0xffff)) 45 continue; 46 47 cpuid_count(cb->level, cb->sub_leaf, ®s[CPUID_EAX], 48 ®s[CPUID_EBX], ®s[CPUID_ECX], 49 ®s[CPUID_EDX]); 50 51 if (regs[cb->reg] & (1 << cb->bit)) 52 set_cpu_cap(c, cb->feature); 53 } 54 } 55 56 u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf, 57 enum cpuid_regs_idx reg) 58 { 59 const struct cpuid_bit *cb; 60 u32 cpuid_val = 0; 61 62 for (cb = cpuid_bits; cb->feature; cb++) { 63 64 if (level > cb->level) 65 continue; 66 67 if (level < cb->level) 68 break; 69 70 if (reg == cb->reg && sub_leaf == cb->sub_leaf) { 71 if (cpu_has(&boot_cpu_data, cb->feature)) 72 cpuid_val |= BIT(cb->bit); 73 } 74 } 75 76 return cpuid_val; 77 } 78 EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf); 79