1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * HyperV Detection code. 4 * 5 * Copyright (C) 2010, Novell, Inc. 6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/time.h> 11 #include <linux/clocksource.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/hardirq.h> 15 #include <linux/efi.h> 16 #include <linux/interrupt.h> 17 #include <linux/irq.h> 18 #include <linux/kexec.h> 19 #include <linux/random.h> 20 #include <asm/processor.h> 21 #include <asm/hypervisor.h> 22 #include <hyperv/hvhdk.h> 23 #include <asm/mshyperv.h> 24 #include <asm/desc.h> 25 #include <asm/idtentry.h> 26 #include <asm/irq_regs.h> 27 #include <asm/i8259.h> 28 #include <asm/apic.h> 29 #include <asm/timer.h> 30 #include <asm/reboot.h> 31 #include <asm/msr.h> 32 #include <asm/nmi.h> 33 #include <clocksource/hyperv_timer.h> 34 #include <asm/msr.h> 35 #include <asm/numa.h> 36 #include <asm/svm.h> 37 38 /* Is Linux running on nested Microsoft Hypervisor */ 39 bool hv_nested; 40 struct ms_hyperv_info ms_hyperv; 41 42 #if IS_ENABLED(CONFIG_HYPERV) 43 /* 44 * When running with the paravisor, controls proxying the synthetic interrupts 45 * from the host 46 */ 47 static bool hv_para_sint_proxy; 48 49 static inline unsigned int hv_get_nested_msr(unsigned int reg) 50 { 51 if (hv_is_sint_msr(reg)) 52 return reg - HV_X64_MSR_SINT0 + HV_X64_MSR_NESTED_SINT0; 53 54 switch (reg) { 55 case HV_X64_MSR_SIMP: 56 return HV_X64_MSR_NESTED_SIMP; 57 case HV_X64_MSR_SIEFP: 58 return HV_X64_MSR_NESTED_SIEFP; 59 case HV_X64_MSR_SVERSION: 60 return HV_X64_MSR_NESTED_SVERSION; 61 case HV_X64_MSR_SCONTROL: 62 return HV_X64_MSR_NESTED_SCONTROL; 63 case HV_X64_MSR_EOM: 64 return HV_X64_MSR_NESTED_EOM; 65 default: 66 return reg; 67 } 68 } 69 70 u64 hv_get_non_nested_msr(unsigned int reg) 71 { 72 u64 value; 73 74 if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) 75 hv_ivm_msr_read(reg, &value); 76 else 77 rdmsrq(reg, value); 78 return value; 79 } 80 EXPORT_SYMBOL_GPL(hv_get_non_nested_msr); 81 82 void hv_set_non_nested_msr(unsigned int reg, u64 value) 83 { 84 if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) { 85 /* The hypervisor will get the intercept. */ 86 hv_ivm_msr_write(reg, value); 87 88 /* Using wrmsrq so the following goes to the paravisor. */ 89 if (hv_is_sint_msr(reg)) { 90 union hv_synic_sint sint = { .as_uint64 = value }; 91 92 sint.proxy = hv_para_sint_proxy; 93 native_wrmsrq(reg, sint.as_uint64); 94 } 95 } else { 96 native_wrmsrq(reg, value); 97 } 98 } 99 EXPORT_SYMBOL_GPL(hv_set_non_nested_msr); 100 101 /* 102 * Enable or disable proxying synthetic interrupts 103 * to the paravisor. 104 */ 105 void hv_para_set_sint_proxy(bool enable) 106 { 107 hv_para_sint_proxy = enable; 108 } 109 110 /* 111 * Get the SynIC register value from the paravisor. 112 */ 113 u64 hv_para_get_synic_register(unsigned int reg) 114 { 115 if (WARN_ON(!ms_hyperv.paravisor_present || !hv_is_synic_msr(reg))) 116 return ~0ULL; 117 return native_read_msr(reg); 118 } 119 120 /* 121 * Set the SynIC register value with the paravisor. 122 */ 123 void hv_para_set_synic_register(unsigned int reg, u64 val) 124 { 125 if (WARN_ON(!ms_hyperv.paravisor_present || !hv_is_synic_msr(reg))) 126 return; 127 native_write_msr(reg, val); 128 } 129 130 u64 hv_get_msr(unsigned int reg) 131 { 132 if (hv_nested) 133 reg = hv_get_nested_msr(reg); 134 135 return hv_get_non_nested_msr(reg); 136 } 137 EXPORT_SYMBOL_GPL(hv_get_msr); 138 139 void hv_set_msr(unsigned int reg, u64 value) 140 { 141 if (hv_nested) 142 reg = hv_get_nested_msr(reg); 143 144 hv_set_non_nested_msr(reg, value); 145 } 146 EXPORT_SYMBOL_GPL(hv_set_msr); 147 148 static void (*mshv_handler)(void); 149 static void (*vmbus_handler)(void); 150 static void (*hv_stimer0_handler)(void); 151 static void (*hv_kexec_handler)(void); 152 static void (*hv_crash_handler)(struct pt_regs *regs); 153 154 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback) 155 { 156 struct pt_regs *old_regs = set_irq_regs(regs); 157 158 inc_irq_stat(irq_hv_callback_count); 159 if (mshv_handler) 160 mshv_handler(); 161 162 if (vmbus_handler) 163 vmbus_handler(); 164 165 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) 166 apic_eoi(); 167 168 set_irq_regs(old_regs); 169 } 170 171 void hv_setup_mshv_handler(void (*handler)(void)) 172 { 173 mshv_handler = handler; 174 } 175 176 void hv_setup_vmbus_handler(void (*handler)(void)) 177 { 178 vmbus_handler = handler; 179 } 180 181 void hv_remove_vmbus_handler(void) 182 { 183 /* We have no way to deallocate the interrupt gate */ 184 vmbus_handler = NULL; 185 } 186 187 /* 188 * Routines to do per-architecture handling of stimer0 189 * interrupts when in Direct Mode 190 */ 191 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0) 192 { 193 struct pt_regs *old_regs = set_irq_regs(regs); 194 195 inc_irq_stat(hyperv_stimer0_count); 196 if (hv_stimer0_handler) 197 hv_stimer0_handler(); 198 add_interrupt_randomness(HYPERV_STIMER0_VECTOR); 199 apic_eoi(); 200 201 set_irq_regs(old_regs); 202 } 203 204 /* For x86/x64, override weak placeholders in hyperv_timer.c */ 205 void hv_setup_stimer0_handler(void (*handler)(void)) 206 { 207 hv_stimer0_handler = handler; 208 } 209 210 void hv_remove_stimer0_handler(void) 211 { 212 /* We have no way to deallocate the interrupt gate */ 213 hv_stimer0_handler = NULL; 214 } 215 216 void hv_setup_kexec_handler(void (*handler)(void)) 217 { 218 hv_kexec_handler = handler; 219 } 220 221 void hv_remove_kexec_handler(void) 222 { 223 hv_kexec_handler = NULL; 224 } 225 226 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) 227 { 228 hv_crash_handler = handler; 229 } 230 231 void hv_remove_crash_handler(void) 232 { 233 hv_crash_handler = NULL; 234 } 235 236 #ifdef CONFIG_KEXEC_CORE 237 static void hv_machine_shutdown(void) 238 { 239 if (kexec_in_progress && hv_kexec_handler) 240 hv_kexec_handler(); 241 242 /* 243 * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor 244 * corrupts the old VP Assist Pages and can crash the kexec kernel. 245 */ 246 if (kexec_in_progress) 247 cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE); 248 249 /* The function calls stop_other_cpus(). */ 250 native_machine_shutdown(); 251 252 /* Disable the hypercall page when there is only 1 active CPU. */ 253 if (kexec_in_progress) 254 hyperv_cleanup(); 255 } 256 #endif /* CONFIG_KEXEC_CORE */ 257 258 #ifdef CONFIG_CRASH_DUMP 259 static void hv_machine_crash_shutdown(struct pt_regs *regs) 260 { 261 if (hv_crash_handler) 262 hv_crash_handler(regs); 263 264 /* The function calls crash_smp_send_stop(). */ 265 native_machine_crash_shutdown(regs); 266 267 /* Disable the hypercall page when there is only 1 active CPU. */ 268 hyperv_cleanup(); 269 } 270 #endif /* CONFIG_CRASH_DUMP */ 271 272 static u64 hv_ref_counter_at_suspend; 273 static void (*old_save_sched_clock_state)(void); 274 static void (*old_restore_sched_clock_state)(void); 275 276 /* 277 * Hyper-V clock counter resets during hibernation. Save and restore clock 278 * offset during suspend/resume, while also considering the time passed 279 * before suspend. This is to make sure that sched_clock using hv tsc page 280 * based clocksource, proceeds from where it left off during suspend and 281 * it shows correct time for the timestamps of kernel messages after resume. 282 */ 283 static void save_hv_clock_tsc_state(void) 284 { 285 hv_ref_counter_at_suspend = hv_read_reference_counter(); 286 } 287 288 static void restore_hv_clock_tsc_state(void) 289 { 290 /* 291 * Adjust the offsets used by hv tsc clocksource to 292 * account for the time spent before hibernation. 293 * adjusted value = reference counter (time) at suspend 294 * - reference counter (time) now. 295 */ 296 hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); 297 } 298 299 /* 300 * Functions to override save_sched_clock_state and restore_sched_clock_state 301 * functions of x86_platform. The Hyper-V clock counter is reset during 302 * suspend-resume and the offset used to measure time needs to be 303 * corrected, post resume. 304 */ 305 static void hv_save_sched_clock_state(void) 306 { 307 old_save_sched_clock_state(); 308 save_hv_clock_tsc_state(); 309 } 310 311 static void hv_restore_sched_clock_state(void) 312 { 313 restore_hv_clock_tsc_state(); 314 old_restore_sched_clock_state(); 315 } 316 317 static void __init x86_setup_ops_for_tsc_pg_clock(void) 318 { 319 if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) 320 return; 321 322 old_save_sched_clock_state = x86_platform.save_sched_clock_state; 323 x86_platform.save_sched_clock_state = hv_save_sched_clock_state; 324 325 old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; 326 x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; 327 } 328 329 #ifdef CONFIG_X86_64 330 DEFINE_STATIC_CALL(hv_hypercall, hv_std_hypercall); 331 EXPORT_STATIC_CALL_TRAMP_GPL(hv_hypercall); 332 #define hypercall_update(hc) static_call_update(hv_hypercall, hc) 333 #endif 334 #endif /* CONFIG_HYPERV */ 335 336 #ifndef hypercall_update 337 #define hypercall_update(hc) (void)hc 338 #endif 339 340 static uint32_t __init ms_hyperv_platform(void) 341 { 342 u32 eax; 343 u32 hyp_signature[3]; 344 345 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) 346 return 0; 347 348 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, 349 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]); 350 351 if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX || 352 memcmp("Microsoft Hv", hyp_signature, 12)) 353 return 0; 354 355 /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */ 356 eax = cpuid_eax(HYPERV_CPUID_FEATURES); 357 if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) { 358 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n"); 359 return 0; 360 } 361 if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) { 362 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n"); 363 return 0; 364 } 365 366 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS; 367 } 368 369 #ifdef CONFIG_X86_LOCAL_APIC 370 /* 371 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes 372 * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle 373 * unknown NMI on the first CPU which gets it. 374 */ 375 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) 376 { 377 static atomic_t nmi_cpu = ATOMIC_INIT(-1); 378 unsigned int old_cpu, this_cpu; 379 380 if (!unknown_nmi_panic) 381 return NMI_DONE; 382 383 old_cpu = -1; 384 this_cpu = raw_smp_processor_id(); 385 if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu)) 386 return NMI_HANDLED; 387 388 return NMI_DONE; 389 } 390 #endif 391 392 static unsigned long hv_get_tsc_khz(void) 393 { 394 unsigned long freq; 395 396 rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq); 397 398 return freq / 1000; 399 } 400 401 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV) 402 static void __init hv_smp_prepare_boot_cpu(void) 403 { 404 native_smp_prepare_boot_cpu(); 405 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS) 406 hv_init_spinlocks(); 407 #endif 408 } 409 410 static void __init hv_smp_prepare_cpus(unsigned int max_cpus) 411 { 412 #ifdef CONFIG_X86_64 413 int i; 414 int ret; 415 #endif 416 417 native_smp_prepare_cpus(max_cpus); 418 419 /* 420 * Override wakeup_secondary_cpu_64 callback for SEV-SNP 421 * enlightened guest. 422 */ 423 if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) { 424 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap; 425 return; 426 } 427 428 #ifdef CONFIG_X86_64 429 for_each_present_cpu(i) { 430 if (i == 0) 431 continue; 432 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i)); 433 BUG_ON(ret); 434 } 435 436 for_each_present_cpu(i) { 437 if (i == 0) 438 continue; 439 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i); 440 BUG_ON(ret); 441 } 442 #endif 443 } 444 #endif 445 446 /* 447 * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the 448 * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0 449 * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns 450 * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a 451 * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and 452 * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs 453 * from the array and hence doesn't create the necessary irq description info. 454 * 455 * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here, 456 * except don't change 'legacy_pic', which keeps its default value 457 * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero 458 * nr_legacy_irqs() and eventually serial console interrupts works properly. 459 */ 460 static void __init reduced_hw_init(void) 461 { 462 x86_init.timers.timer_init = x86_init_noop; 463 x86_init.irqs.pre_vector_init = x86_init_noop; 464 } 465 466 int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) 467 { 468 unsigned int hv_max_functions; 469 470 hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS); 471 if (hv_max_functions < HYPERV_CPUID_VERSION) { 472 pr_err("%s: Could not detect Hyper-V version\n", __func__); 473 return -ENODEV; 474 } 475 476 cpuid(HYPERV_CPUID_VERSION, &info->eax, &info->ebx, &info->ecx, &info->edx); 477 478 return 0; 479 } 480 EXPORT_SYMBOL_GPL(hv_get_hypervisor_version); 481 482 static void __init ms_hyperv_init_platform(void) 483 { 484 int hv_max_functions_eax, eax; 485 486 #ifdef CONFIG_PARAVIRT 487 pv_info.name = "Hyper-V"; 488 #endif 489 490 /* 491 * Extract the features and hints 492 */ 493 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES); 494 ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES); 495 ms_hyperv.ext_features = cpuid_ecx(HYPERV_CPUID_FEATURES); 496 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES); 497 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO); 498 499 hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS); 500 501 pr_info("Hyper-V: privilege flags low %#x, high %#x, ext %#x, hints %#x, misc %#x\n", 502 ms_hyperv.features, ms_hyperv.priv_high, 503 ms_hyperv.ext_features, ms_hyperv.hints, 504 ms_hyperv.misc_features); 505 506 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS); 507 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS); 508 509 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n", 510 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index); 511 512 hv_identify_partition_type(); 513 514 if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC)) 515 ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED; 516 517 if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) { 518 hv_nested = true; 519 pr_info("Hyper-V: running on a nested hypervisor\n"); 520 } 521 522 /* 523 * There is no check against the max function for HYPERV_CPUID_VIRT_STACK_* CPUID 524 * leaves as the hypervisor doesn't handle them. Even a nested root partition (L2 525 * root) will not get them because the nested (L1) hypervisor filters them out. 526 * These are handled through intercept processing by the Windows Hyper-V stack 527 * or the paravisor. 528 */ 529 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES); 530 ms_hyperv.confidential_vmbus_available = 531 eax & HYPERV_VS_PROPERTIES_EAX_CONFIDENTIAL_VMBUS_AVAILABLE; 532 ms_hyperv.msi_ext_dest_id = 533 eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE; 534 535 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 536 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 537 x86_platform.calibrate_tsc = hv_get_tsc_khz; 538 x86_platform.calibrate_cpu = hv_get_tsc_khz; 539 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); 540 } 541 542 if (ms_hyperv.priv_high & HV_ISOLATION) { 543 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG); 544 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG); 545 546 if (ms_hyperv.shared_gpa_boundary_active) 547 ms_hyperv.shared_gpa_boundary = 548 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits); 549 550 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n", 551 ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b); 552 553 554 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) { 555 static_branch_enable(&isolation_type_snp); 556 if (!ms_hyperv.paravisor_present) 557 hypercall_update(hv_snp_hypercall); 558 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) { 559 static_branch_enable(&isolation_type_tdx); 560 561 /* A TDX VM must use x2APIC and doesn't use lazy EOI. */ 562 ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED; 563 564 if (!ms_hyperv.paravisor_present) { 565 hypercall_update(hv_tdx_hypercall); 566 /* 567 * Mark the Hyper-V TSC page feature as disabled 568 * in a TDX VM without paravisor so that the 569 * Invariant TSC, which is a better clocksource 570 * anyway, is used instead. 571 */ 572 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE; 573 574 /* 575 * The Invariant TSC is expected to be available 576 * in a TDX VM without paravisor, but if not, 577 * print a warning message. The slower Hyper-V MSR-based 578 * Ref Counter should end up being the clocksource. 579 */ 580 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) 581 pr_warn("Hyper-V: Invariant TSC is unavailable\n"); 582 583 /* HV_MSR_CRASH_CTL is unsupported. */ 584 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE; 585 586 /* Don't trust Hyper-V's TLB-flushing hypercalls. */ 587 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED; 588 589 x86_init.acpi.reduced_hw_early_init = reduced_hw_init; 590 } 591 } 592 } 593 594 if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) { 595 ms_hyperv.nested_features = 596 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES); 597 pr_info("Hyper-V: Nested features: 0x%x\n", 598 ms_hyperv.nested_features); 599 } 600 601 #ifdef CONFIG_X86_LOCAL_APIC 602 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 603 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 604 /* 605 * Get the APIC frequency. 606 */ 607 u64 hv_lapic_frequency; 608 609 rdmsrq(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); 610 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ); 611 lapic_timer_period = hv_lapic_frequency; 612 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n", 613 lapic_timer_period); 614 } 615 616 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, 617 "hv_nmi_unknown"); 618 #endif 619 620 #ifdef CONFIG_X86_IO_APIC 621 no_timer_check = 1; 622 #endif 623 624 #if IS_ENABLED(CONFIG_HYPERV) 625 #if defined(CONFIG_KEXEC_CORE) 626 machine_ops.shutdown = hv_machine_shutdown; 627 #endif 628 #if defined(CONFIG_CRASH_DUMP) 629 machine_ops.crash_shutdown = hv_machine_crash_shutdown; 630 #endif 631 #endif 632 /* 633 * HV_ACCESS_TSC_INVARIANT is always zero for the root partition. Root 634 * partition doesn't need to write to synthetic MSR to enable invariant 635 * TSC feature. It sees what the hardware provides. 636 */ 637 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) { 638 /* 639 * Writing to synthetic MSR 0x40000118 updates/changes the 640 * guest visible CPUIDs. Setting bit 0 of this MSR enables 641 * guests to report invariant TSC feature through CPUID 642 * instruction, CPUID 0x800000007/EDX, bit 8. See code in 643 * early_init_intel() where this bit is examined. The 644 * setting of this MSR bit should happen before init_intel() 645 * is called. 646 */ 647 wrmsrq(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC); 648 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); 649 } 650 651 /* 652 * Generation 2 instances don't support reading the NMI status from 653 * 0x61 port. 654 */ 655 if (efi_enabled(EFI_BOOT)) 656 x86_platform.get_nmi_reason = hv_get_nmi_reason; 657 658 #if IS_ENABLED(CONFIG_HYPERV) 659 if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) || 660 ms_hyperv.paravisor_present) 661 hv_vtom_init(); 662 /* 663 * Setup the hook to get control post apic initialization. 664 */ 665 x86_platform.apic_post_init = hyperv_init; 666 hyperv_setup_mmu_ops(); 667 668 /* Install system interrupt handler for hypervisor callback */ 669 sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback); 670 671 /* Install system interrupt handler for reenlightenment notifications */ 672 if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) { 673 sysvec_install(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment); 674 } 675 676 /* Install system interrupt handler for stimer0 */ 677 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) { 678 sysvec_install(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0); 679 } 680 681 # ifdef CONFIG_SMP 682 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; 683 if (hv_root_partition() || 684 (!ms_hyperv.paravisor_present && hv_isolation_type_snp())) 685 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus; 686 # endif 687 688 /* 689 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, 690 * set x2apic destination mode to physical mode when x2apic is available 691 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs 692 * have 8-bit APIC id. 693 */ 694 # ifdef CONFIG_X86_X2APIC 695 if (x2apic_supported()) 696 x2apic_phys = 1; 697 # endif 698 699 /* Register Hyper-V specific clocksource */ 700 hv_init_clocksource(); 701 x86_setup_ops_for_tsc_pg_clock(); 702 hv_vtl_init_platform(); 703 #endif 704 /* 705 * TSC should be marked as unstable only after Hyper-V 706 * clocksource has been initialized. This ensures that the 707 * stability of the sched_clock is not altered. 708 * 709 * HV_ACCESS_TSC_INVARIANT is always zero for the root partition. No 710 * need to check for it. 711 */ 712 if (!hv_root_partition() && 713 !(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) 714 mark_tsc_unstable("running on Hyper-V"); 715 716 hardlockup_detector_disable(); 717 } 718 719 static bool __init ms_hyperv_x2apic_available(void) 720 { 721 return x2apic_supported(); 722 } 723 724 /* 725 * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping() 726 * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the 727 * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg(). 728 * 729 * Note: for a VM on Hyper-V, the I/O-APIC is the only device which 730 * (logically) generates MSIs directly to the system APIC irq domain. 731 * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the 732 * pci-hyperv host bridge. 733 * 734 * Note: for a Hyper-V root partition, this will always return false. 735 */ 736 static bool __init ms_hyperv_msi_ext_dest_id(void) 737 { 738 return ms_hyperv.msi_ext_dest_id; 739 } 740 741 #ifdef CONFIG_AMD_MEM_ENCRYPT 742 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs) 743 { 744 /* RAX and CPL are already in the GHCB */ 745 ghcb_set_rcx(ghcb, regs->cx); 746 ghcb_set_rdx(ghcb, regs->dx); 747 ghcb_set_r8(ghcb, regs->r8); 748 } 749 750 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs) 751 { 752 /* No checking of the return state needed */ 753 return true; 754 } 755 #endif 756 757 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { 758 .name = "Microsoft Hyper-V", 759 .detect = ms_hyperv_platform, 760 .type = X86_HYPER_MS_HYPERV, 761 .init.x2apic_available = ms_hyperv_x2apic_available, 762 .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id, 763 .init.init_platform = ms_hyperv_init_platform, 764 .init.guest_late_init = ms_hyperv_late_init, 765 #ifdef CONFIG_AMD_MEM_ENCRYPT 766 .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare, 767 .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish, 768 #endif 769 }; 770