1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Generate definitions needed by assembly language modules. 4 * This code generates raw asm output which is post-processed to extract 5 * and format the required data. 6 */ 7 #define COMPILE_OFFSETS 8 9 #include <linux/crypto.h> 10 #include <linux/sched.h> 11 #include <linux/stddef.h> 12 #include <linux/hardirq.h> 13 #include <linux/suspend.h> 14 #include <linux/kbuild.h> 15 #include <asm/processor.h> 16 #include <asm/thread_info.h> 17 #include <asm/sigframe.h> 18 #include <asm/bootparam.h> 19 #include <asm/suspend.h> 20 #include <asm/tlbflush.h> 21 22 #ifdef CONFIG_XEN 23 #include <xen/interface/xen.h> 24 #endif 25 26 #ifdef CONFIG_X86_32 27 # include "asm-offsets_32.c" 28 #else 29 # include "asm-offsets_64.c" 30 #endif 31 32 void common(void) { 33 BLANK(); 34 OFFSET(TASK_threadsp, task_struct, thread.sp); 35 #ifdef CONFIG_STACKPROTECTOR 36 OFFSET(TASK_stack_canary, task_struct, stack_canary); 37 #endif 38 39 BLANK(); 40 OFFSET(TASK_TI_flags, task_struct, thread_info.flags); 41 OFFSET(TASK_addr_limit, task_struct, thread.addr_limit); 42 43 BLANK(); 44 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); 45 46 BLANK(); 47 OFFSET(pbe_address, pbe, address); 48 OFFSET(pbe_orig_address, pbe, orig_address); 49 OFFSET(pbe_next, pbe, next); 50 51 #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) 52 BLANK(); 53 OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax); 54 OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx); 55 OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx); 56 OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx); 57 OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si); 58 OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di); 59 OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp); 60 OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp); 61 OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip); 62 63 BLANK(); 64 OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext); 65 #endif 66 67 #ifdef CONFIG_PARAVIRT 68 BLANK(); 69 OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops); 70 OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); 71 OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); 72 OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); 73 OFFSET(PV_CPU_iret, pv_cpu_ops, iret); 74 OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0); 75 OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2); 76 #endif 77 78 #ifdef CONFIG_XEN 79 BLANK(); 80 OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); 81 OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); 82 #endif 83 84 BLANK(); 85 OFFSET(BP_scratch, boot_params, scratch); 86 OFFSET(BP_secure_boot, boot_params, secure_boot); 87 OFFSET(BP_loadflags, boot_params, hdr.loadflags); 88 OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); 89 OFFSET(BP_version, boot_params, hdr.version); 90 OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); 91 OFFSET(BP_init_size, boot_params, hdr.init_size); 92 OFFSET(BP_pref_address, boot_params, hdr.pref_address); 93 OFFSET(BP_code32_start, boot_params, hdr.code32_start); 94 95 BLANK(); 96 DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); 97 98 /* TLB state for the entry code */ 99 OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask); 100 101 /* Layout info for cpu_entry_area */ 102 OFFSET(CPU_ENTRY_AREA_tss, cpu_entry_area, tss); 103 OFFSET(CPU_ENTRY_AREA_entry_trampoline, cpu_entry_area, entry_trampoline); 104 OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page); 105 DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack)); 106 } 107