1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AMD Secure AVIC Support (SEV-SNP Guests) 4 * 5 * Copyright (C) 2024 Advanced Micro Devices, Inc. 6 * 7 * Author: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com> 8 */ 9 10 #include <linux/cc_platform.h> 11 12 #include <asm/apic.h> 13 #include <asm/sev.h> 14 15 #include "local.h" 16 17 static int savic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 18 { 19 return x2apic_enabled() && cc_platform_has(CC_ATTR_SNP_SECURE_AVIC); 20 } 21 22 static int savic_probe(void) 23 { 24 if (!cc_platform_has(CC_ATTR_SNP_SECURE_AVIC)) 25 return 0; 26 27 if (!x2apic_mode) { 28 pr_err("Secure AVIC enabled in non x2APIC mode\n"); 29 snp_abort(); 30 /* unreachable */ 31 } 32 33 return 1; 34 } 35 36 static struct apic apic_x2apic_savic __ro_after_init = { 37 38 .name = "secure avic x2apic", 39 .probe = savic_probe, 40 .acpi_madt_oem_check = savic_acpi_madt_oem_check, 41 42 .dest_mode_logical = false, 43 44 .disable_esr = 0, 45 46 .cpu_present_to_apicid = default_cpu_present_to_apicid, 47 48 .max_apic_id = UINT_MAX, 49 .x2apic_set_max_apicid = true, 50 .get_apic_id = x2apic_get_apic_id, 51 52 .calc_dest_apicid = apic_default_calc_apicid, 53 54 .nmi_to_offline_cpu = true, 55 56 .read = native_apic_msr_read, 57 .write = native_apic_msr_write, 58 .eoi = native_apic_msr_eoi, 59 .icr_read = native_x2apic_icr_read, 60 .icr_write = native_x2apic_icr_write, 61 }; 62 63 apic_driver(apic_x2apic_savic); 64