1 // SPDX-License-Identifier: GPL-2.0 2 3 #include <linux/cpumask.h> 4 #include <linux/acpi.h> 5 6 #include "local.h" 7 8 int x2apic_phys; 9 10 static struct apic apic_x2apic_phys; 11 static u32 x2apic_max_apicid __ro_after_init; 12 13 void __init x2apic_set_max_apicid(u32 apicid) 14 { 15 x2apic_max_apicid = apicid; 16 } 17 18 static int __init set_x2apic_phys_mode(char *arg) 19 { 20 x2apic_phys = 1; 21 return 0; 22 } 23 early_param("x2apic_phys", set_x2apic_phys_mode); 24 25 static bool x2apic_fadt_phys(void) 26 { 27 #ifdef CONFIG_ACPI 28 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) && 29 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { 30 printk(KERN_DEBUG "System requires x2apic physical mode\n"); 31 return true; 32 } 33 #endif 34 return false; 35 } 36 37 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 38 { 39 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys()); 40 } 41 42 static void x2apic_send_IPI(int cpu, int vector) 43 { 44 u32 dest = per_cpu(x86_cpu_to_apicid, cpu); 45 46 /* x2apic MSRs are special and need a special fence: */ 47 weak_wrmsr_fence(); 48 __x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL); 49 } 50 51 static void 52 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) 53 { 54 unsigned long query_cpu; 55 unsigned long this_cpu; 56 unsigned long flags; 57 58 /* x2apic MSRs are special and need a special fence: */ 59 weak_wrmsr_fence(); 60 61 local_irq_save(flags); 62 63 this_cpu = smp_processor_id(); 64 for_each_cpu(query_cpu, mask) { 65 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu) 66 continue; 67 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 68 vector, APIC_DEST_PHYSICAL); 69 } 70 local_irq_restore(flags); 71 } 72 73 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 74 { 75 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); 76 } 77 78 static void 79 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 80 { 81 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); 82 } 83 84 static void x2apic_send_IPI_allbutself(int vector) 85 { 86 __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT); 87 } 88 89 static void x2apic_send_IPI_all(int vector) 90 { 91 __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC); 92 } 93 94 static void init_x2apic_ldr(void) 95 { 96 } 97 98 static int x2apic_phys_probe(void) 99 { 100 if (!x2apic_mode) 101 return 0; 102 103 if (x2apic_phys || x2apic_fadt_phys()) 104 return 1; 105 106 return apic == &apic_x2apic_phys; 107 } 108 109 /* Common x2apic functions, also used by x2apic_cluster */ 110 int x2apic_apic_id_valid(u32 apicid) 111 { 112 if (x2apic_max_apicid && apicid > x2apic_max_apicid) 113 return 0; 114 115 return 1; 116 } 117 118 int x2apic_apic_id_registered(void) 119 { 120 return 1; 121 } 122 123 void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) 124 { 125 unsigned long cfg = __prepare_ICR(0, vector, dest); 126 native_x2apic_icr_write(cfg, apicid); 127 } 128 129 void __x2apic_send_IPI_shorthand(int vector, u32 which) 130 { 131 unsigned long cfg = __prepare_ICR(which, vector, 0); 132 133 /* x2apic MSRs are special and need a special fence: */ 134 weak_wrmsr_fence(); 135 native_x2apic_icr_write(cfg, 0); 136 } 137 138 unsigned int x2apic_get_apic_id(unsigned long id) 139 { 140 return id; 141 } 142 143 u32 x2apic_set_apic_id(unsigned int id) 144 { 145 return id; 146 } 147 148 int x2apic_phys_pkg_id(int initial_apicid, int index_msb) 149 { 150 return initial_apicid >> index_msb; 151 } 152 153 void x2apic_send_IPI_self(int vector) 154 { 155 apic_write(APIC_SELF_IPI, vector); 156 } 157 158 static struct apic apic_x2apic_phys __ro_after_init = { 159 160 .name = "physical x2apic", 161 .probe = x2apic_phys_probe, 162 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 163 .apic_id_valid = x2apic_apic_id_valid, 164 .apic_id_registered = x2apic_apic_id_registered, 165 166 .delivery_mode = APIC_DELIVERY_MODE_FIXED, 167 .dest_mode_logical = false, 168 169 .disable_esr = 0, 170 171 .check_apicid_used = NULL, 172 .init_apic_ldr = init_x2apic_ldr, 173 .ioapic_phys_id_map = NULL, 174 .setup_apic_routing = NULL, 175 .cpu_present_to_apicid = default_cpu_present_to_apicid, 176 .apicid_to_cpu_present = NULL, 177 .check_phys_apicid_present = default_check_phys_apicid_present, 178 .phys_pkg_id = x2apic_phys_pkg_id, 179 180 .get_apic_id = x2apic_get_apic_id, 181 .set_apic_id = x2apic_set_apic_id, 182 183 .calc_dest_apicid = apic_default_calc_apicid, 184 185 .send_IPI = x2apic_send_IPI, 186 .send_IPI_mask = x2apic_send_IPI_mask, 187 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 188 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 189 .send_IPI_all = x2apic_send_IPI_all, 190 .send_IPI_self = x2apic_send_IPI_self, 191 192 .inquire_remote_apic = NULL, 193 194 .read = native_apic_msr_read, 195 .write = native_apic_msr_write, 196 .eoi_write = native_apic_msr_eoi_write, 197 .icr_read = native_x2apic_icr_read, 198 .icr_write = native_x2apic_icr_write, 199 .wait_icr_idle = native_x2apic_wait_icr_idle, 200 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, 201 }; 202 203 apic_driver(apic_x2apic_phys); 204