1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Numascale NumaConnect-Specific APIC Code 7 * 8 * Copyright (C) 2011 Numascale AS. All rights reserved. 9 * 10 * Send feedback to <support@numascale.com> 11 * 12 */ 13 14 #include <linux/errno.h> 15 #include <linux/threads.h> 16 #include <linux/cpumask.h> 17 #include <linux/string.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/ctype.h> 21 #include <linux/init.h> 22 #include <linux/hardirq.h> 23 #include <linux/delay.h> 24 25 #include <asm/numachip/numachip.h> 26 #include <asm/numachip/numachip_csr.h> 27 #include <asm/smp.h> 28 #include <asm/apic.h> 29 #include <asm/ipi.h> 30 #include <asm/apic_flat_64.h> 31 #include <asm/pgtable.h> 32 33 static int numachip_system __read_mostly; 34 35 static const struct apic apic_numachip; 36 37 static unsigned int get_apic_id(unsigned long x) 38 { 39 unsigned long value; 40 unsigned int id = (x >> 24) & 0xff; 41 42 if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) { 43 rdmsrl(MSR_FAM10H_NODE_ID, value); 44 id |= (value << 2) & 0xff00; 45 } 46 47 return id; 48 } 49 50 static unsigned long set_apic_id(unsigned int id) 51 { 52 unsigned long x; 53 54 x = ((id & 0xffU) << 24); 55 return x; 56 } 57 58 static unsigned int read_xapic_id(void) 59 { 60 return get_apic_id(apic_read(APIC_ID)); 61 } 62 63 static int numachip_apic_id_valid(int apicid) 64 { 65 /* Trust what bootloader passes in MADT */ 66 return 1; 67 } 68 69 static int numachip_apic_id_registered(void) 70 { 71 return physid_isset(read_xapic_id(), phys_cpu_present_map); 72 } 73 74 static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) 75 { 76 return initial_apic_id >> index_msb; 77 } 78 79 static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip) 80 { 81 union numachip_csr_g3_ext_irq_gen int_gen; 82 83 int_gen.s._destination_apic_id = phys_apicid; 84 int_gen.s._vector = 0; 85 int_gen.s._msgtype = APIC_DM_INIT >> 8; 86 int_gen.s._index = 0; 87 88 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); 89 90 int_gen.s._msgtype = APIC_DM_STARTUP >> 8; 91 int_gen.s._vector = start_rip >> 12; 92 93 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); 94 95 atomic_set(&init_deasserted, 1); 96 return 0; 97 } 98 99 static void numachip_send_IPI_one(int cpu, int vector) 100 { 101 union numachip_csr_g3_ext_irq_gen int_gen; 102 int apicid = per_cpu(x86_cpu_to_apicid, cpu); 103 104 int_gen.s._destination_apic_id = apicid; 105 int_gen.s._vector = vector; 106 int_gen.s._msgtype = (vector == NMI_VECTOR ? APIC_DM_NMI : APIC_DM_FIXED) >> 8; 107 int_gen.s._index = 0; 108 109 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); 110 } 111 112 static void numachip_send_IPI_mask(const struct cpumask *mask, int vector) 113 { 114 unsigned int cpu; 115 116 for_each_cpu(cpu, mask) 117 numachip_send_IPI_one(cpu, vector); 118 } 119 120 static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask, 121 int vector) 122 { 123 unsigned int this_cpu = smp_processor_id(); 124 unsigned int cpu; 125 126 for_each_cpu(cpu, mask) { 127 if (cpu != this_cpu) 128 numachip_send_IPI_one(cpu, vector); 129 } 130 } 131 132 static void numachip_send_IPI_allbutself(int vector) 133 { 134 unsigned int this_cpu = smp_processor_id(); 135 unsigned int cpu; 136 137 for_each_online_cpu(cpu) { 138 if (cpu != this_cpu) 139 numachip_send_IPI_one(cpu, vector); 140 } 141 } 142 143 static void numachip_send_IPI_all(int vector) 144 { 145 numachip_send_IPI_mask(cpu_online_mask, vector); 146 } 147 148 static void numachip_send_IPI_self(int vector) 149 { 150 apic_write(APIC_SELF_IPI, vector); 151 } 152 153 static int __init numachip_probe(void) 154 { 155 return apic == &apic_numachip; 156 } 157 158 static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) 159 { 160 u64 val; 161 u32 nodes = 1; 162 163 this_cpu_write(cpu_llc_id, node); 164 165 /* Account for nodes per socket in multi-core-module processors */ 166 if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) { 167 rdmsrl(MSR_FAM10H_NODE_ID, val); 168 nodes = ((val >> 3) & 7) + 1; 169 } 170 171 c->phys_proc_id = node / nodes; 172 } 173 174 static int __init numachip_system_init(void) 175 { 176 if (!numachip_system) 177 return 0; 178 179 init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE); 180 init_extra_mapping_uc(NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_SIZE); 181 182 x86_cpuinit.fixup_cpu_id = fixup_cpu_id; 183 x86_init.pci.arch_init = pci_numachip_init; 184 185 return 0; 186 } 187 early_initcall(numachip_system_init); 188 189 static int numachip_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 190 { 191 if (!strncmp(oem_id, "NUMASC", 6)) { 192 numachip_system = 1; 193 return 1; 194 } 195 196 return 0; 197 } 198 199 static const struct apic apic_numachip __refconst = { 200 201 .name = "NumaConnect system", 202 .probe = numachip_probe, 203 .acpi_madt_oem_check = numachip_acpi_madt_oem_check, 204 .apic_id_valid = numachip_apic_id_valid, 205 .apic_id_registered = numachip_apic_id_registered, 206 207 .irq_delivery_mode = dest_Fixed, 208 .irq_dest_mode = 0, /* physical */ 209 210 .target_cpus = online_target_cpus, 211 .disable_esr = 0, 212 .dest_logical = 0, 213 .check_apicid_used = NULL, 214 215 .vector_allocation_domain = default_vector_allocation_domain, 216 .init_apic_ldr = flat_init_apic_ldr, 217 218 .ioapic_phys_id_map = NULL, 219 .setup_apic_routing = NULL, 220 .cpu_present_to_apicid = default_cpu_present_to_apicid, 221 .apicid_to_cpu_present = NULL, 222 .check_phys_apicid_present = default_check_phys_apicid_present, 223 .phys_pkg_id = numachip_phys_pkg_id, 224 225 .get_apic_id = get_apic_id, 226 .set_apic_id = set_apic_id, 227 .apic_id_mask = 0xffU << 24, 228 229 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, 230 231 .send_IPI_mask = numachip_send_IPI_mask, 232 .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself, 233 .send_IPI_allbutself = numachip_send_IPI_allbutself, 234 .send_IPI_all = numachip_send_IPI_all, 235 .send_IPI_self = numachip_send_IPI_self, 236 237 .wakeup_secondary_cpu = numachip_wakeup_secondary, 238 .wait_for_init_deassert = false, 239 .inquire_remote_apic = NULL, /* REMRD not supported */ 240 241 .read = native_apic_mem_read, 242 .write = native_apic_mem_write, 243 .eoi_write = native_apic_mem_write, 244 .icr_read = native_apic_icr_read, 245 .icr_write = native_apic_icr_write, 246 .wait_icr_idle = native_apic_wait_icr_idle, 247 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, 248 }; 249 apic_driver(apic_numachip); 250 251