1 /* 2 * Copyright 2004 James Cleverdon, IBM. 3 * Subject to the GNU Public License, v.2 4 * 5 * Flat APIC subarch code. 6 * 7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by 8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 9 * James Cleverdon. 10 */ 11 #include <linux/errno.h> 12 #include <linux/threads.h> 13 #include <linux/cpumask.h> 14 #include <linux/string.h> 15 #include <linux/kernel.h> 16 #include <linux/ctype.h> 17 #include <linux/init.h> 18 #include <linux/hardirq.h> 19 #include <linux/module.h> 20 #include <asm/smp.h> 21 #include <asm/apic.h> 22 #include <asm/ipi.h> 23 24 #ifdef CONFIG_ACPI 25 #include <acpi/acpi_bus.h> 26 #endif 27 28 static struct apic apic_physflat; 29 static struct apic apic_flat; 30 31 struct apic __read_mostly *apic = &apic_flat; 32 EXPORT_SYMBOL_GPL(apic); 33 34 static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 35 { 36 return 1; 37 } 38 39 static const struct cpumask *flat_target_cpus(void) 40 { 41 return cpu_online_mask; 42 } 43 44 static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask) 45 { 46 /* Careful. Some cpus do not strictly honor the set of cpus 47 * specified in the interrupt destination when using lowest 48 * priority interrupt delivery mode. 49 * 50 * In particular there was a hyperthreading cpu observed to 51 * deliver interrupts to the wrong hyperthread when only one 52 * hyperthread was specified in the interrupt desitination. 53 */ 54 cpumask_clear(retmask); 55 cpumask_bits(retmask)[0] = APIC_ALL_CPUS; 56 } 57 58 /* 59 * Set up the logical destination ID. 60 * 61 * Intel recommends to set DFR, LDR and TPR before enabling 62 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 63 * document number 292116). So here it goes... 64 */ 65 void flat_init_apic_ldr(void) 66 { 67 unsigned long val; 68 unsigned long num, id; 69 70 num = smp_processor_id(); 71 id = 1UL << num; 72 apic_write(APIC_DFR, APIC_DFR_FLAT); 73 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; 74 val |= SET_APIC_LOGICAL_ID(id); 75 apic_write(APIC_LDR, val); 76 } 77 78 static inline void _flat_send_IPI_mask(unsigned long mask, int vector) 79 { 80 unsigned long flags; 81 82 local_irq_save(flags); 83 __default_send_IPI_dest_field(mask, vector, apic->dest_logical); 84 local_irq_restore(flags); 85 } 86 87 static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector) 88 { 89 unsigned long mask = cpumask_bits(cpumask)[0]; 90 91 _flat_send_IPI_mask(mask, vector); 92 } 93 94 static void 95 flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector) 96 { 97 unsigned long mask = cpumask_bits(cpumask)[0]; 98 int cpu = smp_processor_id(); 99 100 if (cpu < BITS_PER_LONG) 101 clear_bit(cpu, &mask); 102 103 _flat_send_IPI_mask(mask, vector); 104 } 105 106 static void flat_send_IPI_allbutself(int vector) 107 { 108 int cpu = smp_processor_id(); 109 #ifdef CONFIG_HOTPLUG_CPU 110 int hotplug = 1; 111 #else 112 int hotplug = 0; 113 #endif 114 if (hotplug || vector == NMI_VECTOR) { 115 if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) { 116 unsigned long mask = cpumask_bits(cpu_online_mask)[0]; 117 118 if (cpu < BITS_PER_LONG) 119 clear_bit(cpu, &mask); 120 121 _flat_send_IPI_mask(mask, vector); 122 } 123 } else if (num_online_cpus() > 1) { 124 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, 125 vector, apic->dest_logical); 126 } 127 } 128 129 static void flat_send_IPI_all(int vector) 130 { 131 if (vector == NMI_VECTOR) { 132 flat_send_IPI_mask(cpu_online_mask, vector); 133 } else { 134 __default_send_IPI_shortcut(APIC_DEST_ALLINC, 135 vector, apic->dest_logical); 136 } 137 } 138 139 static unsigned int flat_get_apic_id(unsigned long x) 140 { 141 unsigned int id; 142 143 id = (((x)>>24) & 0xFFu); 144 145 return id; 146 } 147 148 static unsigned long set_apic_id(unsigned int id) 149 { 150 unsigned long x; 151 152 x = ((id & 0xFFu)<<24); 153 return x; 154 } 155 156 static unsigned int read_xapic_id(void) 157 { 158 unsigned int id; 159 160 id = flat_get_apic_id(apic_read(APIC_ID)); 161 return id; 162 } 163 164 static int flat_apic_id_registered(void) 165 { 166 return physid_isset(read_xapic_id(), phys_cpu_present_map); 167 } 168 169 static int flat_phys_pkg_id(int initial_apic_id, int index_msb) 170 { 171 return initial_apic_id >> index_msb; 172 } 173 174 static int flat_probe(void) 175 { 176 return 1; 177 } 178 179 static struct apic apic_flat = { 180 .name = "flat", 181 .probe = flat_probe, 182 .acpi_madt_oem_check = flat_acpi_madt_oem_check, 183 .apic_id_valid = default_apic_id_valid, 184 .apic_id_registered = flat_apic_id_registered, 185 186 .irq_delivery_mode = dest_LowestPrio, 187 .irq_dest_mode = 1, /* logical */ 188 189 .target_cpus = flat_target_cpus, 190 .disable_esr = 0, 191 .dest_logical = APIC_DEST_LOGICAL, 192 .check_apicid_used = NULL, 193 .check_apicid_present = NULL, 194 195 .vector_allocation_domain = flat_vector_allocation_domain, 196 .init_apic_ldr = flat_init_apic_ldr, 197 198 .ioapic_phys_id_map = NULL, 199 .setup_apic_routing = NULL, 200 .multi_timer_check = NULL, 201 .cpu_present_to_apicid = default_cpu_present_to_apicid, 202 .apicid_to_cpu_present = NULL, 203 .setup_portio_remap = NULL, 204 .check_phys_apicid_present = default_check_phys_apicid_present, 205 .enable_apic_mode = NULL, 206 .phys_pkg_id = flat_phys_pkg_id, 207 .mps_oem_check = NULL, 208 209 .get_apic_id = flat_get_apic_id, 210 .set_apic_id = set_apic_id, 211 .apic_id_mask = 0xFFu << 24, 212 213 .cpu_mask_to_apicid = default_cpu_mask_to_apicid, 214 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, 215 216 .send_IPI_mask = flat_send_IPI_mask, 217 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, 218 .send_IPI_allbutself = flat_send_IPI_allbutself, 219 .send_IPI_all = flat_send_IPI_all, 220 .send_IPI_self = apic_send_IPI_self, 221 222 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, 223 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, 224 .wait_for_init_deassert = NULL, 225 .smp_callin_clear_local_apic = NULL, 226 .inquire_remote_apic = default_inquire_remote_apic, 227 228 .read = native_apic_mem_read, 229 .write = native_apic_mem_write, 230 .eoi_write = native_apic_mem_write, 231 .icr_read = native_apic_icr_read, 232 .icr_write = native_apic_icr_write, 233 .wait_icr_idle = native_apic_wait_icr_idle, 234 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, 235 }; 236 237 /* 238 * Physflat mode is used when there are more than 8 CPUs on a system. 239 * We cannot use logical delivery in this case because the mask 240 * overflows, so use physical mode. 241 */ 242 static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 243 { 244 #ifdef CONFIG_ACPI 245 /* 246 * Quirk: some x86_64 machines can only use physical APIC mode 247 * regardless of how many processors are present (x86_64 ES7000 248 * is an example). 249 */ 250 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && 251 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { 252 printk(KERN_DEBUG "system APIC only can use physical flat"); 253 return 1; 254 } 255 256 if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) { 257 printk(KERN_DEBUG "IBM Summit detected, will use apic physical"); 258 return 1; 259 } 260 #endif 261 262 return 0; 263 } 264 265 static const struct cpumask *physflat_target_cpus(void) 266 { 267 return cpu_online_mask; 268 } 269 270 static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask) 271 { 272 cpumask_clear(retmask); 273 cpumask_set_cpu(cpu, retmask); 274 } 275 276 static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector) 277 { 278 default_send_IPI_mask_sequence_phys(cpumask, vector); 279 } 280 281 static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask, 282 int vector) 283 { 284 default_send_IPI_mask_allbutself_phys(cpumask, vector); 285 } 286 287 static void physflat_send_IPI_allbutself(int vector) 288 { 289 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); 290 } 291 292 static void physflat_send_IPI_all(int vector) 293 { 294 physflat_send_IPI_mask(cpu_online_mask, vector); 295 } 296 297 static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask) 298 { 299 int cpu; 300 301 /* 302 * We're using fixed IRQ delivery, can only return one phys APIC ID. 303 * May as well be the first. 304 */ 305 cpu = cpumask_first(cpumask); 306 if ((unsigned)cpu < nr_cpu_ids) 307 return per_cpu(x86_cpu_to_apicid, cpu); 308 else 309 return BAD_APICID; 310 } 311 312 static unsigned int 313 physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 314 const struct cpumask *andmask) 315 { 316 int cpu; 317 318 /* 319 * We're using fixed IRQ delivery, can only return one phys APIC ID. 320 * May as well be the first. 321 */ 322 for_each_cpu_and(cpu, cpumask, andmask) { 323 if (cpumask_test_cpu(cpu, cpu_online_mask)) 324 break; 325 } 326 return per_cpu(x86_cpu_to_apicid, cpu); 327 } 328 329 static int physflat_probe(void) 330 { 331 if (apic == &apic_physflat || num_possible_cpus() > 8) 332 return 1; 333 334 return 0; 335 } 336 337 static struct apic apic_physflat = { 338 339 .name = "physical flat", 340 .probe = physflat_probe, 341 .acpi_madt_oem_check = physflat_acpi_madt_oem_check, 342 .apic_id_valid = default_apic_id_valid, 343 .apic_id_registered = flat_apic_id_registered, 344 345 .irq_delivery_mode = dest_Fixed, 346 .irq_dest_mode = 0, /* physical */ 347 348 .target_cpus = physflat_target_cpus, 349 .disable_esr = 0, 350 .dest_logical = 0, 351 .check_apicid_used = NULL, 352 .check_apicid_present = NULL, 353 354 .vector_allocation_domain = physflat_vector_allocation_domain, 355 /* not needed, but shouldn't hurt: */ 356 .init_apic_ldr = flat_init_apic_ldr, 357 358 .ioapic_phys_id_map = NULL, 359 .setup_apic_routing = NULL, 360 .multi_timer_check = NULL, 361 .cpu_present_to_apicid = default_cpu_present_to_apicid, 362 .apicid_to_cpu_present = NULL, 363 .setup_portio_remap = NULL, 364 .check_phys_apicid_present = default_check_phys_apicid_present, 365 .enable_apic_mode = NULL, 366 .phys_pkg_id = flat_phys_pkg_id, 367 .mps_oem_check = NULL, 368 369 .get_apic_id = flat_get_apic_id, 370 .set_apic_id = set_apic_id, 371 .apic_id_mask = 0xFFu << 24, 372 373 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, 374 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, 375 376 .send_IPI_mask = physflat_send_IPI_mask, 377 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, 378 .send_IPI_allbutself = physflat_send_IPI_allbutself, 379 .send_IPI_all = physflat_send_IPI_all, 380 .send_IPI_self = apic_send_IPI_self, 381 382 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, 383 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, 384 .wait_for_init_deassert = NULL, 385 .smp_callin_clear_local_apic = NULL, 386 .inquire_remote_apic = default_inquire_remote_apic, 387 388 .read = native_apic_mem_read, 389 .write = native_apic_mem_write, 390 .eoi_write = native_apic_mem_write, 391 .icr_read = native_apic_icr_read, 392 .icr_write = native_apic_icr_write, 393 .wait_icr_idle = native_apic_wait_icr_idle, 394 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, 395 }; 396 397 /* 398 * We need to check for physflat first, so this order is important. 399 */ 400 apic_drivers(apic_physflat, apic_flat); 401