1 /****************************************************************************** 2 * arch-x86_32.h 3 * 4 * Guest OS interface to x86 Xen. 5 * 6 * Copyright (c) 2004, K A Fraser 7 */ 8 9 #ifndef _ASM_X86_XEN_INTERFACE_H 10 #define _ASM_X86_XEN_INTERFACE_H 11 12 #ifdef __XEN__ 13 #define __DEFINE_GUEST_HANDLE(name, type) \ 14 typedef struct { type *p; } __guest_handle_ ## name 15 #else 16 #define __DEFINE_GUEST_HANDLE(name, type) \ 17 typedef type * __guest_handle_ ## name 18 #endif 19 20 #define DEFINE_GUEST_HANDLE_STRUCT(name) \ 21 __DEFINE_GUEST_HANDLE(name, struct name) 22 #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name) 23 #define GUEST_HANDLE(name) __guest_handle_ ## name 24 25 #ifdef __XEN__ 26 #if defined(__i386__) 27 #define set_xen_guest_handle(hnd, val) \ 28 do { \ 29 if (sizeof(hnd) == 8) \ 30 *(uint64_t *)&(hnd) = 0; \ 31 (hnd).p = val; \ 32 } while (0) 33 #elif defined(__x86_64__) 34 #define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0) 35 #endif 36 #else 37 #if defined(__i386__) 38 #define set_xen_guest_handle(hnd, val) \ 39 do { \ 40 if (sizeof(hnd) == 8) \ 41 *(uint64_t *)&(hnd) = 0; \ 42 (hnd) = val; \ 43 } while (0) 44 #elif defined(__x86_64__) 45 #define set_xen_guest_handle(hnd, val) do { (hnd) = val; } while (0) 46 #endif 47 #endif 48 49 #ifndef __ASSEMBLY__ 50 /* Guest handles for primitive C types. */ 51 __DEFINE_GUEST_HANDLE(uchar, unsigned char); 52 __DEFINE_GUEST_HANDLE(uint, unsigned int); 53 __DEFINE_GUEST_HANDLE(ulong, unsigned long); 54 DEFINE_GUEST_HANDLE(char); 55 DEFINE_GUEST_HANDLE(int); 56 DEFINE_GUEST_HANDLE(long); 57 DEFINE_GUEST_HANDLE(void); 58 DEFINE_GUEST_HANDLE(uint64_t); 59 #endif 60 61 #ifndef HYPERVISOR_VIRT_START 62 #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) 63 #endif 64 65 #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) 66 #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) 67 #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT) 68 69 /* Maximum number of virtual CPUs in multi-processor guests. */ 70 #define MAX_VIRT_CPUS 32 71 72 /* 73 * SEGMENT DESCRIPTOR TABLES 74 */ 75 /* 76 * A number of GDT entries are reserved by Xen. These are not situated at the 77 * start of the GDT because some stupid OSes export hard-coded selector values 78 * in their ABI. These hard-coded values are always near the start of the GDT, 79 * so Xen places itself out of the way, at the far end of the GDT. 80 */ 81 #define FIRST_RESERVED_GDT_PAGE 14 82 #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096) 83 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) 84 85 /* 86 * Send an array of these to HYPERVISOR_set_trap_table() 87 * The privilege level specifies which modes may enter a trap via a software 88 * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate 89 * privilege levels as follows: 90 * Level == 0: No one may enter 91 * Level == 1: Kernel may enter 92 * Level == 2: Kernel may enter 93 * Level == 3: Everyone may enter 94 */ 95 #define TI_GET_DPL(_ti) ((_ti)->flags & 3) 96 #define TI_GET_IF(_ti) ((_ti)->flags & 4) 97 #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) 98 #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) 99 100 #ifndef __ASSEMBLY__ 101 struct trap_info { 102 uint8_t vector; /* exception vector */ 103 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ 104 uint16_t cs; /* code selector */ 105 unsigned long address; /* code offset */ 106 }; 107 DEFINE_GUEST_HANDLE_STRUCT(trap_info); 108 109 struct arch_shared_info { 110 unsigned long max_pfn; /* max pfn that appears in table */ 111 /* Frame containing list of mfns containing list of mfns containing p2m. */ 112 unsigned long pfn_to_mfn_frame_list_list; 113 unsigned long nmi_reason; 114 }; 115 #endif /* !__ASSEMBLY__ */ 116 117 #ifdef CONFIG_X86_32 118 #include "interface_32.h" 119 #else 120 #include "interface_64.h" 121 #endif 122 123 #ifndef __ASSEMBLY__ 124 /* 125 * The following is all CPU context. Note that the fpu_ctxt block is filled 126 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. 127 */ 128 struct vcpu_guest_context { 129 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ 130 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ 131 #define VGCF_I387_VALID (1<<0) 132 #define VGCF_HVM_GUEST (1<<1) 133 #define VGCF_IN_KERNEL (1<<2) 134 unsigned long flags; /* VGCF_* flags */ 135 struct cpu_user_regs user_regs; /* User-level CPU registers */ 136 struct trap_info trap_ctxt[256]; /* Virtual IDT */ 137 unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ 138 unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ 139 unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ 140 /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ 141 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ 142 unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ 143 #ifdef __i386__ 144 unsigned long event_callback_cs; /* CS:EIP of event callback */ 145 unsigned long event_callback_eip; 146 unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ 147 unsigned long failsafe_callback_eip; 148 #else 149 unsigned long event_callback_eip; 150 unsigned long failsafe_callback_eip; 151 unsigned long syscall_callback_eip; 152 #endif 153 unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ 154 #ifdef __x86_64__ 155 /* Segment base addresses. */ 156 uint64_t fs_base; 157 uint64_t gs_base_kernel; 158 uint64_t gs_base_user; 159 #endif 160 }; 161 DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); 162 #endif /* !__ASSEMBLY__ */ 163 164 /* 165 * Prefix forces emulation of some non-trapping instructions. 166 * Currently only CPUID. 167 */ 168 #ifdef __ASSEMBLY__ 169 #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; 170 #define XEN_CPUID XEN_EMULATE_PREFIX cpuid 171 #else 172 #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; " 173 #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" 174 #endif 175 176 #endif /* _ASM_X86_XEN_INTERFACE_H */ 177