1bb898558SAl Viro /****************************************************************************** 2bb898558SAl Viro * arch-x86_32.h 3bb898558SAl Viro * 4bb898558SAl Viro * Guest OS interface to x86 Xen. 5bb898558SAl Viro * 6bb898558SAl Viro * Copyright (c) 2004, K A Fraser 7bb898558SAl Viro */ 8bb898558SAl Viro 905e4d316SH. Peter Anvin #ifndef _ASM_X86_XEN_INTERFACE_H 1005e4d316SH. Peter Anvin #define _ASM_X86_XEN_INTERFACE_H 11bb898558SAl Viro 12bb898558SAl Viro #ifdef __XEN__ 13bb898558SAl Viro #define __DEFINE_GUEST_HANDLE(name, type) \ 14bb898558SAl Viro typedef struct { type *p; } __guest_handle_ ## name 15bb898558SAl Viro #else 16bb898558SAl Viro #define __DEFINE_GUEST_HANDLE(name, type) \ 17bb898558SAl Viro typedef type * __guest_handle_ ## name 18bb898558SAl Viro #endif 19bb898558SAl Viro 20bb898558SAl Viro #define DEFINE_GUEST_HANDLE_STRUCT(name) \ 21bb898558SAl Viro __DEFINE_GUEST_HANDLE(name, struct name) 22bb898558SAl Viro #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name) 23bb898558SAl Viro #define GUEST_HANDLE(name) __guest_handle_ ## name 24bb898558SAl Viro 25bb898558SAl Viro #ifdef __XEN__ 26bb898558SAl Viro #if defined(__i386__) 27bb898558SAl Viro #define set_xen_guest_handle(hnd, val) \ 28bb898558SAl Viro do { \ 29bb898558SAl Viro if (sizeof(hnd) == 8) \ 30bb898558SAl Viro *(uint64_t *)&(hnd) = 0; \ 31bb898558SAl Viro (hnd).p = val; \ 32bb898558SAl Viro } while (0) 33bb898558SAl Viro #elif defined(__x86_64__) 34bb898558SAl Viro #define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0) 35bb898558SAl Viro #endif 36bb898558SAl Viro #else 37bb898558SAl Viro #if defined(__i386__) 38bb898558SAl Viro #define set_xen_guest_handle(hnd, val) \ 39bb898558SAl Viro do { \ 40bb898558SAl Viro if (sizeof(hnd) == 8) \ 41bb898558SAl Viro *(uint64_t *)&(hnd) = 0; \ 42bb898558SAl Viro (hnd) = val; \ 43bb898558SAl Viro } while (0) 44bb898558SAl Viro #elif defined(__x86_64__) 45bb898558SAl Viro #define set_xen_guest_handle(hnd, val) do { (hnd) = val; } while (0) 46bb898558SAl Viro #endif 47bb898558SAl Viro #endif 48bb898558SAl Viro 49bb898558SAl Viro #ifndef __ASSEMBLY__ 50bd3f79b7SStefano Stabellini /* Explicitly size integers that represent pfns in the public interface 51bd3f79b7SStefano Stabellini * with Xen so that on ARM we can have one ABI that works for 32 and 64 52bd3f79b7SStefano Stabellini * bit guests. */ 53bd3f79b7SStefano Stabellini typedef unsigned long xen_pfn_t; 5437ea0fcbSIan Campbell #define PRI_xen_pfn "lx" 55256f631fSStefano Stabellini typedef unsigned long xen_ulong_t; 5637ea0fcbSIan Campbell #define PRI_xen_ulong "lx" 57*5e40704eSIan Campbell typedef long xen_long_t; 58*5e40704eSIan Campbell #define PRI_xen_long "lx" 59*5e40704eSIan Campbell 60bb898558SAl Viro /* Guest handles for primitive C types. */ 61bb898558SAl Viro __DEFINE_GUEST_HANDLE(uchar, unsigned char); 62bb898558SAl Viro __DEFINE_GUEST_HANDLE(uint, unsigned int); 63bb898558SAl Viro DEFINE_GUEST_HANDLE(char); 64bb898558SAl Viro DEFINE_GUEST_HANDLE(int); 65bb898558SAl Viro DEFINE_GUEST_HANDLE(void); 663e099679SYu Ke DEFINE_GUEST_HANDLE(uint64_t); 6773c154c6SKonrad Rzeszutek Wilk DEFINE_GUEST_HANDLE(uint32_t); 68bd3f79b7SStefano Stabellini DEFINE_GUEST_HANDLE(xen_pfn_t); 69f832da06SIan Campbell DEFINE_GUEST_HANDLE(xen_ulong_t); 70bb898558SAl Viro #endif 71bb898558SAl Viro 72bb898558SAl Viro #ifndef HYPERVISOR_VIRT_START 73bb898558SAl Viro #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) 74bb898558SAl Viro #endif 75bb898558SAl Viro 767e77506aSIan Campbell #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) 777e77506aSIan Campbell #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) 787e77506aSIan Campbell #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT) 79bb898558SAl Viro 80bb898558SAl Viro /* Maximum number of virtual CPUs in multi-processor guests. */ 81bb898558SAl Viro #define MAX_VIRT_CPUS 32 82bb898558SAl Viro 83bb898558SAl Viro /* 84bb898558SAl Viro * SEGMENT DESCRIPTOR TABLES 85bb898558SAl Viro */ 86bb898558SAl Viro /* 87bb898558SAl Viro * A number of GDT entries are reserved by Xen. These are not situated at the 88bb898558SAl Viro * start of the GDT because some stupid OSes export hard-coded selector values 89bb898558SAl Viro * in their ABI. These hard-coded values are always near the start of the GDT, 90bb898558SAl Viro * so Xen places itself out of the way, at the far end of the GDT. 91bb898558SAl Viro */ 92bb898558SAl Viro #define FIRST_RESERVED_GDT_PAGE 14 93bb898558SAl Viro #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096) 94bb898558SAl Viro #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) 95bb898558SAl Viro 96bb898558SAl Viro /* 97bb898558SAl Viro * Send an array of these to HYPERVISOR_set_trap_table() 98bb898558SAl Viro * The privilege level specifies which modes may enter a trap via a software 99bb898558SAl Viro * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate 100bb898558SAl Viro * privilege levels as follows: 101bb898558SAl Viro * Level == 0: No one may enter 102bb898558SAl Viro * Level == 1: Kernel may enter 103bb898558SAl Viro * Level == 2: Kernel may enter 104bb898558SAl Viro * Level == 3: Everyone may enter 105bb898558SAl Viro */ 106bb898558SAl Viro #define TI_GET_DPL(_ti) ((_ti)->flags & 3) 107bb898558SAl Viro #define TI_GET_IF(_ti) ((_ti)->flags & 4) 108bb898558SAl Viro #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) 109bb898558SAl Viro #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) 110bb898558SAl Viro 111bb898558SAl Viro #ifndef __ASSEMBLY__ 112bb898558SAl Viro struct trap_info { 113bb898558SAl Viro uint8_t vector; /* exception vector */ 114bb898558SAl Viro uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ 115bb898558SAl Viro uint16_t cs; /* code selector */ 116bb898558SAl Viro unsigned long address; /* code offset */ 117bb898558SAl Viro }; 118bb898558SAl Viro DEFINE_GUEST_HANDLE_STRUCT(trap_info); 119bb898558SAl Viro 120bb898558SAl Viro struct arch_shared_info { 121bb898558SAl Viro unsigned long max_pfn; /* max pfn that appears in table */ 122bb898558SAl Viro /* Frame containing list of mfns containing list of mfns containing p2m. */ 123bb898558SAl Viro unsigned long pfn_to_mfn_frame_list_list; 124bb898558SAl Viro unsigned long nmi_reason; 125bb898558SAl Viro }; 126bb898558SAl Viro #endif /* !__ASSEMBLY__ */ 127bb898558SAl Viro 128bb898558SAl Viro #ifdef CONFIG_X86_32 129a1ce3928SDavid Howells #include <asm/xen/interface_32.h> 130bb898558SAl Viro #else 131a1ce3928SDavid Howells #include <asm/xen/interface_64.h> 132bb898558SAl Viro #endif 133bb898558SAl Viro 1344d9310e3SStefano Stabellini #include <asm/pvclock-abi.h> 1354d9310e3SStefano Stabellini 136bb898558SAl Viro #ifndef __ASSEMBLY__ 137bb898558SAl Viro /* 138bb898558SAl Viro * The following is all CPU context. Note that the fpu_ctxt block is filled 139bb898558SAl Viro * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. 140bb898558SAl Viro */ 141bb898558SAl Viro struct vcpu_guest_context { 142bb898558SAl Viro /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ 143bb898558SAl Viro struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ 144bb898558SAl Viro #define VGCF_I387_VALID (1<<0) 145bb898558SAl Viro #define VGCF_HVM_GUEST (1<<1) 146bb898558SAl Viro #define VGCF_IN_KERNEL (1<<2) 147bb898558SAl Viro unsigned long flags; /* VGCF_* flags */ 148bb898558SAl Viro struct cpu_user_regs user_regs; /* User-level CPU registers */ 149bb898558SAl Viro struct trap_info trap_ctxt[256]; /* Virtual IDT */ 150bb898558SAl Viro unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ 151bb898558SAl Viro unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ 152bb898558SAl Viro unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ 153bb898558SAl Viro /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ 154bb898558SAl Viro unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ 155bb898558SAl Viro unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ 156bb898558SAl Viro #ifdef __i386__ 157bb898558SAl Viro unsigned long event_callback_cs; /* CS:EIP of event callback */ 158bb898558SAl Viro unsigned long event_callback_eip; 159bb898558SAl Viro unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ 160bb898558SAl Viro unsigned long failsafe_callback_eip; 161bb898558SAl Viro #else 162bb898558SAl Viro unsigned long event_callback_eip; 163bb898558SAl Viro unsigned long failsafe_callback_eip; 164bb898558SAl Viro unsigned long syscall_callback_eip; 165bb898558SAl Viro #endif 166bb898558SAl Viro unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ 167bb898558SAl Viro #ifdef __x86_64__ 168bb898558SAl Viro /* Segment base addresses. */ 169bb898558SAl Viro uint64_t fs_base; 170bb898558SAl Viro uint64_t gs_base_kernel; 171bb898558SAl Viro uint64_t gs_base_user; 172bb898558SAl Viro #endif 173bb898558SAl Viro }; 174bb898558SAl Viro DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); 175bb898558SAl Viro #endif /* !__ASSEMBLY__ */ 176bb898558SAl Viro 177bb898558SAl Viro /* 178bb898558SAl Viro * Prefix forces emulation of some non-trapping instructions. 179bb898558SAl Viro * Currently only CPUID. 180bb898558SAl Viro */ 181bb898558SAl Viro #ifdef __ASSEMBLY__ 182bb898558SAl Viro #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; 183bb898558SAl Viro #define XEN_CPUID XEN_EMULATE_PREFIX cpuid 184bb898558SAl Viro #else 185bb898558SAl Viro #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; " 186bb898558SAl Viro #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" 187bb898558SAl Viro #endif 188bb898558SAl Viro 18905e4d316SH. Peter Anvin #endif /* _ASM_X86_XEN_INTERFACE_H */ 190