xref: /linux/arch/x86/include/asm/x86_init.h (revision fe280ffd7eab3dd63fd349d12b449666845e905c)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PLATFORM_H
3 #define _ASM_X86_PLATFORM_H
4 
5 #include <asm/bootparam.h>
6 
7 struct ghcb;
8 struct mpc_bus;
9 struct mpc_cpu;
10 struct pt_regs;
11 struct mpc_table;
12 struct cpuinfo_x86;
13 struct irq_domain;
14 
15 /**
16  * struct x86_init_mpparse - platform specific mpparse ops
17  * @setup_ioapic_ids:		platform specific ioapic id override
18  * @find_mptable:		Find MPTABLE early to reserve the memory region
19  * @get_smp_config:		get the smp configuration
20  * @early_parse_smp_cfg:	Parse the SMP configuration data early before initmem_init()
21  * @parse_smp_cfg:		Parse the SMP configuration data
22  */
23 struct x86_init_mpparse {
24 	void (*setup_ioapic_ids)(void);
25 	void (*find_mptable)(void);
26 	void (*get_smp_config)(unsigned int early);
27 	void (*early_parse_smp_cfg)(void);
28 	void (*parse_smp_cfg)(void);
29 };
30 
31 /**
32  * struct x86_init_resources - platform specific resource related ops
33  * @probe_roms:			probe BIOS roms
34  * @reserve_resources:		reserve the standard resources for the
35  *				platform
36  * @memory_setup:		platform specific memory setup
37  *
38  */
39 struct x86_init_resources {
40 	void (*probe_roms)(void);
41 	void (*reserve_resources)(void);
42 	char *(*memory_setup)(void);
43 };
44 
45 /**
46  * struct x86_init_irqs - platform specific interrupt setup
47  * @pre_vector_init:		init code to run before interrupt vectors
48  *				are set up.
49  * @intr_init:			interrupt init code
50  * @intr_mode_select:		interrupt delivery mode selection
51  * @intr_mode_init:		interrupt delivery mode setup
52  * @create_pci_msi_domain:	Create the PCI/MSI interrupt domain
53  */
54 struct x86_init_irqs {
55 	void (*pre_vector_init)(void);
56 	void (*intr_init)(void);
57 	void (*intr_mode_select)(void);
58 	void (*intr_mode_init)(void);
59 	struct irq_domain *(*create_pci_msi_domain)(void);
60 };
61 
62 /**
63  * struct x86_init_oem - oem platform specific customizing functions
64  * @arch_setup:			platform specific architecture setup
65  * @banner:			print a platform specific banner
66  */
67 struct x86_init_oem {
68 	void (*arch_setup)(void);
69 	void (*banner)(void);
70 };
71 
72 /**
73  * struct x86_init_paging - platform specific paging functions
74  * @pagetable_init:	platform specific paging initialization call to setup
75  *			the kernel pagetables and prepare accessors functions.
76  *			Callback must call paging_init(). Called once after the
77  *			direct mapping for phys memory is available.
78  */
79 struct x86_init_paging {
80 	void (*pagetable_init)(void);
81 };
82 
83 /**
84  * struct x86_init_timers - platform specific timer setup
85  * @setup_perpcu_clockev:	set up the per cpu clock event device for the
86  *				boot cpu
87  * @timer_init:			initialize the platform timer (default PIT/HPET)
88  * @wallclock_init:		init the wallclock device
89  */
90 struct x86_init_timers {
91 	void (*setup_percpu_clockev)(void);
92 	void (*timer_init)(void);
93 	void (*wallclock_init)(void);
94 };
95 
96 /**
97  * struct x86_init_iommu - platform specific iommu setup
98  * @iommu_init:			platform specific iommu setup
99  */
100 struct x86_init_iommu {
101 	int (*iommu_init)(void);
102 };
103 
104 /**
105  * struct x86_init_pci - platform specific pci init functions
106  * @arch_init:			platform specific pci arch init call
107  * @init:			platform specific pci subsystem init
108  * @init_irq:			platform specific pci irq init
109  * @fixup_irqs:			platform specific pci irq fixup
110  */
111 struct x86_init_pci {
112 	int (*arch_init)(void);
113 	int (*init)(void);
114 	void (*init_irq)(void);
115 	void (*fixup_irqs)(void);
116 };
117 
118 /**
119  * struct x86_hyper_init - x86 hypervisor init functions
120  * @init_platform:		platform setup
121  * @guest_late_init:		guest late init
122  * @x2apic_available:		X2APIC detection
123  * @msi_ext_dest_id:		MSI supports 15-bit APIC IDs
124  * @init_mem_mapping:		setup early mappings during init_mem_mapping()
125  * @init_after_bootmem:		guest init after boot allocator is finished
126  */
127 struct x86_hyper_init {
128 	void (*init_platform)(void);
129 	void (*guest_late_init)(void);
130 	bool (*x2apic_available)(void);
131 	bool (*msi_ext_dest_id)(void);
132 	void (*init_mem_mapping)(void);
133 	void (*init_after_bootmem)(void);
134 };
135 
136 /**
137  * struct x86_init_acpi - x86 ACPI init functions
138  * @set_root_poitner:		set RSDP address
139  * @get_root_pointer:		get RSDP address
140  * @reduced_hw_early_init:	hardware reduced platform early init
141  */
142 struct x86_init_acpi {
143 	void (*set_root_pointer)(u64 addr);
144 	u64 (*get_root_pointer)(void);
145 	void (*reduced_hw_early_init)(void);
146 };
147 
148 /**
149  * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
150  *
151  * @enc_status_change_prepare	Notify HV before the encryption status of a range is changed
152  * @enc_status_change_finish	Notify HV after the encryption status of a range is changed
153  * @enc_tlb_flush_required	Returns true if a TLB flush is needed before changing page encryption status
154  * @enc_cache_flush_required	Returns true if a cache flush is needed before changing page encryption status
155  */
156 struct x86_guest {
157 	bool (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc);
158 	bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc);
159 	bool (*enc_tlb_flush_required)(bool enc);
160 	bool (*enc_cache_flush_required)(void);
161 };
162 
163 /**
164  * struct x86_init_ops - functions for platform specific setup
165  *
166  */
167 struct x86_init_ops {
168 	struct x86_init_resources	resources;
169 	struct x86_init_mpparse		mpparse;
170 	struct x86_init_irqs		irqs;
171 	struct x86_init_oem		oem;
172 	struct x86_init_paging		paging;
173 	struct x86_init_timers		timers;
174 	struct x86_init_iommu		iommu;
175 	struct x86_init_pci		pci;
176 	struct x86_hyper_init		hyper;
177 	struct x86_init_acpi		acpi;
178 };
179 
180 /**
181  * struct x86_cpuinit_ops - platform specific cpu hotplug setups
182  * @setup_percpu_clockev:	set up the per cpu clock event device
183  * @early_percpu_clock_init:	early init of the per cpu clock event device
184  * @fixup_cpu_id:		fixup function for cpuinfo_x86::topo.pkg_id
185  * @parallel_bringup:		Parallel bringup control
186  */
187 struct x86_cpuinit_ops {
188 	void (*setup_percpu_clockev)(void);
189 	void (*early_percpu_clock_init)(void);
190 	void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
191 	bool parallel_bringup;
192 };
193 
194 struct timespec64;
195 
196 /**
197  * struct x86_legacy_devices - legacy x86 devices
198  *
199  * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
200  * 	is known to never have a PNPBIOS.
201  *
202  * These are devices known to require LPC or ISA bus. The definition of legacy
203  * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
204  * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
205  * the LPC or ISA bus. User visible devices are devices that have end-user
206  * accessible connectors (for example, LPT parallel port). Legacy devices on
207  * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
208  * / mouse, and the floppy disk controller. A system that lacks all known
209  * legacy devices can assume all devices can be detected exclusively via
210  * standard device enumeration mechanisms including the ACPI namespace.
211  *
212  * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
213  * have any of the legacy devices enumerated below present.
214  */
215 struct x86_legacy_devices {
216 	int pnpbios;
217 };
218 
219 /**
220  * enum x86_legacy_i8042_state - i8042 keyboard controller state
221  * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
222  *	given platform/subarch.
223  * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
224  *	is absent.
225  * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
226  *	present, the i8042 driver should probe for controller existence.
227  */
228 enum x86_legacy_i8042_state {
229 	X86_LEGACY_I8042_PLATFORM_ABSENT,
230 	X86_LEGACY_I8042_FIRMWARE_ABSENT,
231 	X86_LEGACY_I8042_EXPECTED_PRESENT,
232 };
233 
234 /**
235  * struct x86_legacy_features - legacy x86 features
236  *
237  * @i8042: indicated if we expect the device to have i8042 controller
238  *	present.
239  * @rtc: this device has a CMOS real-time clock present
240  * @reserve_bios_regions: boot code will search for the EBDA address and the
241  * 	start of the 640k - 1M BIOS region.  If false, the platform must
242  * 	ensure that its memory map correctly reserves sub-1MB regions as needed.
243  * @devices: legacy x86 devices, refer to struct x86_legacy_devices
244  * 	documentation for further details.
245  */
246 struct x86_legacy_features {
247 	enum x86_legacy_i8042_state i8042;
248 	int rtc;
249 	int warm_reset;
250 	int no_vga;
251 	int reserve_bios_regions;
252 	struct x86_legacy_devices devices;
253 };
254 
255 /**
256  * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
257  *
258  * @pin_vcpu:			pin current vcpu to specified physical
259  *				cpu (run rarely)
260  * @sev_es_hcall_prepare:	Load additional hypervisor-specific
261  *				state into the GHCB when doing a VMMCALL under
262  *				SEV-ES. Called from the #VC exception handler.
263  * @sev_es_hcall_finish:	Copies state from the GHCB back into the
264  *				processor (or pt_regs). Also runs checks on the
265  *				state returned from the hypervisor after a
266  *				VMMCALL under SEV-ES.  Needs to return 'false'
267  *				if the checks fail.  Called from the #VC
268  *				exception handler.
269  * @is_private_mmio:		For CoCo VMs, must map MMIO address as private.
270  *				Used when device is emulated by a paravisor
271  *				layer in the VM context.
272  */
273 struct x86_hyper_runtime {
274 	void (*pin_vcpu)(int cpu);
275 	void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs);
276 	bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs);
277 	bool (*is_private_mmio)(u64 addr);
278 };
279 
280 /**
281  * struct x86_platform_ops - platform specific runtime functions
282  * @calibrate_cpu:		calibrate CPU
283  * @calibrate_tsc:		calibrate TSC, if different from CPU
284  * @get_wallclock:		get time from HW clock like RTC etc.
285  * @set_wallclock:		set time back to HW clock
286  * @is_untracked_pat_range	exclude from PAT logic
287  * @nmi_init			enable NMI on cpus
288  * @save_sched_clock_state:	save state for sched_clock() on suspend
289  * @restore_sched_clock_state:	restore state for sched_clock() on resume
290  * @apic_post_init:		adjust apic if needed
291  * @legacy:			legacy features
292  * @set_legacy_features:	override legacy features. Use of this callback
293  * 				is highly discouraged. You should only need
294  * 				this if your hardware platform requires further
295  * 				custom fine tuning far beyond what may be
296  * 				possible in x86_early_init_platform_quirks() by
297  * 				only using the current x86_hardware_subarch
298  * 				semantics.
299  * @realmode_reserve:		reserve memory for realmode trampoline
300  * @realmode_init:		initialize realmode trampoline
301  * @hyper:			x86 hypervisor specific runtime callbacks
302  */
303 struct x86_platform_ops {
304 	unsigned long (*calibrate_cpu)(void);
305 	unsigned long (*calibrate_tsc)(void);
306 	void (*get_wallclock)(struct timespec64 *ts);
307 	int (*set_wallclock)(const struct timespec64 *ts);
308 	void (*iommu_shutdown)(void);
309 	bool (*is_untracked_pat_range)(u64 start, u64 end);
310 	void (*nmi_init)(void);
311 	unsigned char (*get_nmi_reason)(void);
312 	void (*save_sched_clock_state)(void);
313 	void (*restore_sched_clock_state)(void);
314 	void (*apic_post_init)(void);
315 	struct x86_legacy_features legacy;
316 	void (*set_legacy_features)(void);
317 	void (*realmode_reserve)(void);
318 	void (*realmode_init)(void);
319 	struct x86_hyper_runtime hyper;
320 	struct x86_guest guest;
321 };
322 
323 struct x86_apic_ops {
324 	unsigned int	(*io_apic_read)   (unsigned int apic, unsigned int reg);
325 	void		(*restore)(void);
326 };
327 
328 extern struct x86_init_ops x86_init;
329 extern struct x86_cpuinit_ops x86_cpuinit;
330 extern struct x86_platform_ops x86_platform;
331 extern struct x86_msi_ops x86_msi;
332 extern struct x86_apic_ops x86_apic_ops;
333 
334 extern void x86_early_init_platform_quirks(void);
335 extern void x86_init_noop(void);
336 extern void x86_init_uint_noop(unsigned int unused);
337 extern bool bool_x86_init_noop(void);
338 extern void x86_op_int_noop(int cpu);
339 extern bool x86_pnpbios_disabled(void);
340 extern int set_rtc_noop(const struct timespec64 *now);
341 extern void get_rtc_noop(struct timespec64 *now);
342 
343 #endif
344