xref: /linux/arch/x86/include/asm/x86_init.h (revision dcb7600849ce9b3d9b3d2965f452287f06fc9093)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PLATFORM_H
3 #define _ASM_X86_PLATFORM_H
4 
5 #include <asm/bootparam.h>
6 
7 struct ghcb;
8 struct mpc_bus;
9 struct mpc_cpu;
10 struct pt_regs;
11 struct mpc_table;
12 struct cpuinfo_x86;
13 struct irq_domain;
14 
15 /**
16  * struct x86_init_mpparse - platform specific mpparse ops
17  * @setup_ioapic_ids:		platform specific ioapic id override
18  * @find_mptable:		Find MPTABLE early to reserve the memory region
19  * @early_parse_smp_cfg:	Parse the SMP configuration data early before initmem_init()
20  * @parse_smp_cfg:		Parse the SMP configuration data
21  */
22 struct x86_init_mpparse {
23 	void (*setup_ioapic_ids)(void);
24 	void (*find_mptable)(void);
25 	void (*early_parse_smp_cfg)(void);
26 	void (*parse_smp_cfg)(void);
27 };
28 
29 /**
30  * struct x86_init_resources - platform specific resource related ops
31  * @probe_roms:			probe BIOS roms
32  * @reserve_resources:		reserve the standard resources for the
33  *				platform
34  * @memory_setup:		platform specific memory setup
35  *
36  */
37 struct x86_init_resources {
38 	void (*probe_roms)(void);
39 	void (*reserve_resources)(void);
40 	char *(*memory_setup)(void);
41 };
42 
43 /**
44  * struct x86_init_irqs - platform specific interrupt setup
45  * @pre_vector_init:		init code to run before interrupt vectors
46  *				are set up.
47  * @intr_init:			interrupt init code
48  * @intr_mode_select:		interrupt delivery mode selection
49  * @intr_mode_init:		interrupt delivery mode setup
50  * @create_pci_msi_domain:	Create the PCI/MSI interrupt domain
51  */
52 struct x86_init_irqs {
53 	void (*pre_vector_init)(void);
54 	void (*intr_init)(void);
55 	void (*intr_mode_select)(void);
56 	void (*intr_mode_init)(void);
57 	struct irq_domain *(*create_pci_msi_domain)(void);
58 };
59 
60 /**
61  * struct x86_init_oem - oem platform specific customizing functions
62  * @arch_setup:			platform specific architecture setup
63  * @banner:			print a platform specific banner
64  */
65 struct x86_init_oem {
66 	void (*arch_setup)(void);
67 	void (*banner)(void);
68 };
69 
70 /**
71  * struct x86_init_paging - platform specific paging functions
72  * @pagetable_init:	platform specific paging initialization call to setup
73  *			the kernel pagetables and prepare accessors functions.
74  *			Callback must call paging_init(). Called once after the
75  *			direct mapping for phys memory is available.
76  */
77 struct x86_init_paging {
78 	void (*pagetable_init)(void);
79 };
80 
81 /**
82  * struct x86_init_timers - platform specific timer setup
83  * @setup_perpcu_clockev:	set up the per cpu clock event device for the
84  *				boot cpu
85  * @timer_init:			initialize the platform timer (default PIT/HPET)
86  * @wallclock_init:		init the wallclock device
87  */
88 struct x86_init_timers {
89 	void (*setup_percpu_clockev)(void);
90 	void (*timer_init)(void);
91 	void (*wallclock_init)(void);
92 };
93 
94 /**
95  * struct x86_init_iommu - platform specific iommu setup
96  * @iommu_init:			platform specific iommu setup
97  */
98 struct x86_init_iommu {
99 	int (*iommu_init)(void);
100 };
101 
102 /**
103  * struct x86_init_pci - platform specific pci init functions
104  * @arch_init:			platform specific pci arch init call
105  * @init:			platform specific pci subsystem init
106  * @init_irq:			platform specific pci irq init
107  * @fixup_irqs:			platform specific pci irq fixup
108  */
109 struct x86_init_pci {
110 	int (*arch_init)(void);
111 	int (*init)(void);
112 	void (*init_irq)(void);
113 	void (*fixup_irqs)(void);
114 };
115 
116 /**
117  * struct x86_hyper_init - x86 hypervisor init functions
118  * @init_platform:		platform setup
119  * @guest_late_init:		guest late init
120  * @x2apic_available:		X2APIC detection
121  * @msi_ext_dest_id:		MSI supports 15-bit APIC IDs
122  * @init_mem_mapping:		setup early mappings during init_mem_mapping()
123  * @init_after_bootmem:		guest init after boot allocator is finished
124  */
125 struct x86_hyper_init {
126 	void (*init_platform)(void);
127 	void (*guest_late_init)(void);
128 	bool (*x2apic_available)(void);
129 	bool (*msi_ext_dest_id)(void);
130 	void (*init_mem_mapping)(void);
131 	void (*init_after_bootmem)(void);
132 };
133 
134 /**
135  * struct x86_init_acpi - x86 ACPI init functions
136  * @set_root_poitner:		set RSDP address
137  * @get_root_pointer:		get RSDP address
138  * @reduced_hw_early_init:	hardware reduced platform early init
139  */
140 struct x86_init_acpi {
141 	void (*set_root_pointer)(u64 addr);
142 	u64 (*get_root_pointer)(void);
143 	void (*reduced_hw_early_init)(void);
144 };
145 
146 /**
147  * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
148  *
149  * @enc_status_change_prepare	Notify HV before the encryption status of a range is changed
150  * @enc_status_change_finish	Notify HV after the encryption status of a range is changed
151  * @enc_tlb_flush_required	Returns true if a TLB flush is needed before changing page encryption status
152  * @enc_cache_flush_required	Returns true if a cache flush is needed before changing page encryption status
153  */
154 struct x86_guest {
155 	bool (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc);
156 	bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc);
157 	bool (*enc_tlb_flush_required)(bool enc);
158 	bool (*enc_cache_flush_required)(void);
159 };
160 
161 /**
162  * struct x86_init_ops - functions for platform specific setup
163  *
164  */
165 struct x86_init_ops {
166 	struct x86_init_resources	resources;
167 	struct x86_init_mpparse		mpparse;
168 	struct x86_init_irqs		irqs;
169 	struct x86_init_oem		oem;
170 	struct x86_init_paging		paging;
171 	struct x86_init_timers		timers;
172 	struct x86_init_iommu		iommu;
173 	struct x86_init_pci		pci;
174 	struct x86_hyper_init		hyper;
175 	struct x86_init_acpi		acpi;
176 };
177 
178 /**
179  * struct x86_cpuinit_ops - platform specific cpu hotplug setups
180  * @setup_percpu_clockev:	set up the per cpu clock event device
181  * @early_percpu_clock_init:	early init of the per cpu clock event device
182  * @fixup_cpu_id:		fixup function for cpuinfo_x86::topo.pkg_id
183  * @parallel_bringup:		Parallel bringup control
184  */
185 struct x86_cpuinit_ops {
186 	void (*setup_percpu_clockev)(void);
187 	void (*early_percpu_clock_init)(void);
188 	void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
189 	bool parallel_bringup;
190 };
191 
192 struct timespec64;
193 
194 /**
195  * struct x86_legacy_devices - legacy x86 devices
196  *
197  * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
198  * 	is known to never have a PNPBIOS.
199  *
200  * These are devices known to require LPC or ISA bus. The definition of legacy
201  * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
202  * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
203  * the LPC or ISA bus. User visible devices are devices that have end-user
204  * accessible connectors (for example, LPT parallel port). Legacy devices on
205  * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
206  * / mouse, and the floppy disk controller. A system that lacks all known
207  * legacy devices can assume all devices can be detected exclusively via
208  * standard device enumeration mechanisms including the ACPI namespace.
209  *
210  * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
211  * have any of the legacy devices enumerated below present.
212  */
213 struct x86_legacy_devices {
214 	int pnpbios;
215 };
216 
217 /**
218  * enum x86_legacy_i8042_state - i8042 keyboard controller state
219  * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
220  *	given platform/subarch.
221  * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
222  *	is absent.
223  * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
224  *	present, the i8042 driver should probe for controller existence.
225  */
226 enum x86_legacy_i8042_state {
227 	X86_LEGACY_I8042_PLATFORM_ABSENT,
228 	X86_LEGACY_I8042_FIRMWARE_ABSENT,
229 	X86_LEGACY_I8042_EXPECTED_PRESENT,
230 };
231 
232 /**
233  * struct x86_legacy_features - legacy x86 features
234  *
235  * @i8042: indicated if we expect the device to have i8042 controller
236  *	present.
237  * @rtc: this device has a CMOS real-time clock present
238  * @reserve_bios_regions: boot code will search for the EBDA address and the
239  * 	start of the 640k - 1M BIOS region.  If false, the platform must
240  * 	ensure that its memory map correctly reserves sub-1MB regions as needed.
241  * @devices: legacy x86 devices, refer to struct x86_legacy_devices
242  * 	documentation for further details.
243  */
244 struct x86_legacy_features {
245 	enum x86_legacy_i8042_state i8042;
246 	int rtc;
247 	int warm_reset;
248 	int no_vga;
249 	int reserve_bios_regions;
250 	struct x86_legacy_devices devices;
251 };
252 
253 /**
254  * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
255  *
256  * @pin_vcpu:			pin current vcpu to specified physical
257  *				cpu (run rarely)
258  * @sev_es_hcall_prepare:	Load additional hypervisor-specific
259  *				state into the GHCB when doing a VMMCALL under
260  *				SEV-ES. Called from the #VC exception handler.
261  * @sev_es_hcall_finish:	Copies state from the GHCB back into the
262  *				processor (or pt_regs). Also runs checks on the
263  *				state returned from the hypervisor after a
264  *				VMMCALL under SEV-ES.  Needs to return 'false'
265  *				if the checks fail.  Called from the #VC
266  *				exception handler.
267  * @is_private_mmio:		For CoCo VMs, must map MMIO address as private.
268  *				Used when device is emulated by a paravisor
269  *				layer in the VM context.
270  */
271 struct x86_hyper_runtime {
272 	void (*pin_vcpu)(int cpu);
273 	void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs);
274 	bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs);
275 	bool (*is_private_mmio)(u64 addr);
276 };
277 
278 /**
279  * struct x86_platform_ops - platform specific runtime functions
280  * @calibrate_cpu:		calibrate CPU
281  * @calibrate_tsc:		calibrate TSC, if different from CPU
282  * @get_wallclock:		get time from HW clock like RTC etc.
283  * @set_wallclock:		set time back to HW clock
284  * @is_untracked_pat_range	exclude from PAT logic
285  * @nmi_init			enable NMI on cpus
286  * @save_sched_clock_state:	save state for sched_clock() on suspend
287  * @restore_sched_clock_state:	restore state for sched_clock() on resume
288  * @apic_post_init:		adjust apic if needed
289  * @legacy:			legacy features
290  * @set_legacy_features:	override legacy features. Use of this callback
291  * 				is highly discouraged. You should only need
292  * 				this if your hardware platform requires further
293  * 				custom fine tuning far beyond what may be
294  * 				possible in x86_early_init_platform_quirks() by
295  * 				only using the current x86_hardware_subarch
296  * 				semantics.
297  * @realmode_reserve:		reserve memory for realmode trampoline
298  * @realmode_init:		initialize realmode trampoline
299  * @hyper:			x86 hypervisor specific runtime callbacks
300  */
301 struct x86_platform_ops {
302 	unsigned long (*calibrate_cpu)(void);
303 	unsigned long (*calibrate_tsc)(void);
304 	void (*get_wallclock)(struct timespec64 *ts);
305 	int (*set_wallclock)(const struct timespec64 *ts);
306 	void (*iommu_shutdown)(void);
307 	bool (*is_untracked_pat_range)(u64 start, u64 end);
308 	void (*nmi_init)(void);
309 	unsigned char (*get_nmi_reason)(void);
310 	void (*save_sched_clock_state)(void);
311 	void (*restore_sched_clock_state)(void);
312 	void (*apic_post_init)(void);
313 	struct x86_legacy_features legacy;
314 	void (*set_legacy_features)(void);
315 	void (*realmode_reserve)(void);
316 	void (*realmode_init)(void);
317 	struct x86_hyper_runtime hyper;
318 	struct x86_guest guest;
319 };
320 
321 struct x86_apic_ops {
322 	unsigned int	(*io_apic_read)   (unsigned int apic, unsigned int reg);
323 	void		(*restore)(void);
324 };
325 
326 extern struct x86_init_ops x86_init;
327 extern struct x86_cpuinit_ops x86_cpuinit;
328 extern struct x86_platform_ops x86_platform;
329 extern struct x86_msi_ops x86_msi;
330 extern struct x86_apic_ops x86_apic_ops;
331 
332 extern void x86_early_init_platform_quirks(void);
333 extern void x86_init_noop(void);
334 extern void x86_init_uint_noop(unsigned int unused);
335 extern bool bool_x86_init_noop(void);
336 extern void x86_op_int_noop(int cpu);
337 extern bool x86_pnpbios_disabled(void);
338 extern int set_rtc_noop(const struct timespec64 *now);
339 extern void get_rtc_noop(struct timespec64 *now);
340 
341 #endif
342