1 #ifndef _ASM_X86_TLBFLUSH_H 2 #define _ASM_X86_TLBFLUSH_H 3 4 #include <linux/mm.h> 5 #include <linux/sched.h> 6 7 #include <asm/processor.h> 8 #include <asm/special_insns.h> 9 10 #ifdef CONFIG_PARAVIRT 11 #include <asm/paravirt.h> 12 #else 13 #define __flush_tlb() __native_flush_tlb() 14 #define __flush_tlb_global() __native_flush_tlb_global() 15 #define __flush_tlb_single(addr) __native_flush_tlb_single(addr) 16 #endif 17 18 static inline void __native_flush_tlb(void) 19 { 20 native_write_cr3(native_read_cr3()); 21 } 22 23 static inline void __native_flush_tlb_global(void) 24 { 25 unsigned long flags; 26 unsigned long cr4; 27 28 /* 29 * Read-modify-write to CR4 - protect it from preemption and 30 * from interrupts. (Use the raw variant because this code can 31 * be called from deep inside debugging code.) 32 */ 33 raw_local_irq_save(flags); 34 35 cr4 = native_read_cr4(); 36 /* clear PGE */ 37 native_write_cr4(cr4 & ~X86_CR4_PGE); 38 /* write old PGE again and flush TLBs */ 39 native_write_cr4(cr4); 40 41 raw_local_irq_restore(flags); 42 } 43 44 static inline void __native_flush_tlb_single(unsigned long addr) 45 { 46 asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); 47 } 48 49 static inline void __flush_tlb_all(void) 50 { 51 if (cpu_has_pge) 52 __flush_tlb_global(); 53 else 54 __flush_tlb(); 55 } 56 57 static inline void __flush_tlb_one(unsigned long addr) 58 { 59 if (cpu_has_invlpg) 60 __flush_tlb_single(addr); 61 else 62 __flush_tlb(); 63 } 64 65 #define TLB_FLUSH_ALL -1UL 66 67 /* 68 * TLB flushing: 69 * 70 * - flush_tlb() flushes the current mm struct TLBs 71 * - flush_tlb_all() flushes all processes TLBs 72 * - flush_tlb_mm(mm) flushes the specified mm context TLB's 73 * - flush_tlb_page(vma, vmaddr) flushes one page 74 * - flush_tlb_range(vma, start, end) flushes a range of pages 75 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 76 * - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus 77 * 78 * ..but the i386 has somewhat limited tlb flushing capabilities, 79 * and page-granular flushes are available only on i486 and up. 80 * 81 * x86-64 can only flush individual pages or full VMs. For a range flush 82 * we always do the full VM. Might be worth trying if for a small 83 * range a few INVLPGs in a row are a win. 84 */ 85 86 #ifndef CONFIG_SMP 87 88 #define flush_tlb() __flush_tlb() 89 #define flush_tlb_all() __flush_tlb_all() 90 #define local_flush_tlb() __flush_tlb() 91 92 static inline void flush_tlb_mm(struct mm_struct *mm) 93 { 94 if (mm == current->active_mm) 95 __flush_tlb(); 96 } 97 98 static inline void flush_tlb_page(struct vm_area_struct *vma, 99 unsigned long addr) 100 { 101 if (vma->vm_mm == current->active_mm) 102 __flush_tlb_one(addr); 103 } 104 105 static inline void flush_tlb_range(struct vm_area_struct *vma, 106 unsigned long start, unsigned long end) 107 { 108 if (vma->vm_mm == current->active_mm) 109 __flush_tlb(); 110 } 111 112 static inline void native_flush_tlb_others(const struct cpumask *cpumask, 113 struct mm_struct *mm, 114 unsigned long va) 115 { 116 } 117 118 static inline void reset_lazy_tlbstate(void) 119 { 120 } 121 122 #else /* SMP */ 123 124 #include <asm/smp.h> 125 126 #define local_flush_tlb() __flush_tlb() 127 128 extern void flush_tlb_all(void); 129 extern void flush_tlb_current_task(void); 130 extern void flush_tlb_mm(struct mm_struct *); 131 extern void flush_tlb_page(struct vm_area_struct *, unsigned long); 132 133 #define flush_tlb() flush_tlb_current_task() 134 135 static inline void flush_tlb_range(struct vm_area_struct *vma, 136 unsigned long start, unsigned long end) 137 { 138 flush_tlb_mm(vma->vm_mm); 139 } 140 141 void native_flush_tlb_others(const struct cpumask *cpumask, 142 struct mm_struct *mm, unsigned long va); 143 144 #define TLBSTATE_OK 1 145 #define TLBSTATE_LAZY 2 146 147 struct tlb_state { 148 struct mm_struct *active_mm; 149 int state; 150 }; 151 DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate); 152 153 static inline void reset_lazy_tlbstate(void) 154 { 155 this_cpu_write(cpu_tlbstate.state, 0); 156 this_cpu_write(cpu_tlbstate.active_mm, &init_mm); 157 } 158 159 #endif /* SMP */ 160 161 #ifndef CONFIG_PARAVIRT 162 #define flush_tlb_others(mask, mm, va) native_flush_tlb_others(mask, mm, va) 163 #endif 164 165 static inline void flush_tlb_kernel_range(unsigned long start, 166 unsigned long end) 167 { 168 flush_tlb_all(); 169 } 170 171 #endif /* _ASM_X86_TLBFLUSH_H */ 172