xref: /linux/arch/x86/include/asm/tlbbatch.h (revision 8ca4fc323d2e4ab9dabbdd57633af40b0c7e6af9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ARCH_X86_TLBBATCH_H
3 #define _ARCH_X86_TLBBATCH_H
4 
5 #include <linux/cpumask.h>
6 
7 struct arch_tlbflush_unmap_batch {
8 	/*
9 	 * Each bit set is a CPU that potentially has a TLB entry for one of
10 	 * the PFNs being flushed..
11 	 */
12 	struct cpumask cpumask;
13 };
14 
15 #endif /* _ARCH_X86_TLBBATCH_H */
16