xref: /linux/arch/x86/include/asm/tlbbatch.h (revision 498495dba268b20e8eadd7fe93c140c68b6cc9d2)
1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2e73ad5ffSAndy Lutomirski #ifndef _ARCH_X86_TLBBATCH_H
3e73ad5ffSAndy Lutomirski #define _ARCH_X86_TLBBATCH_H
4e73ad5ffSAndy Lutomirski 
5e73ad5ffSAndy Lutomirski #include <linux/cpumask.h>
6e73ad5ffSAndy Lutomirski 
7e73ad5ffSAndy Lutomirski struct arch_tlbflush_unmap_batch {
8e73ad5ffSAndy Lutomirski 	/*
9e73ad5ffSAndy Lutomirski 	 * Each bit set is a CPU that potentially has a TLB entry for one of
10e73ad5ffSAndy Lutomirski 	 * the PFNs being flushed..
11e73ad5ffSAndy Lutomirski 	 */
12e73ad5ffSAndy Lutomirski 	struct cpumask cpumask;
13e73ad5ffSAndy Lutomirski };
14e73ad5ffSAndy Lutomirski 
15e73ad5ffSAndy Lutomirski #endif /* _ARCH_X86_TLBBATCH_H */
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