xref: /linux/arch/x86/include/asm/text-patching.h (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 #ifndef _ASM_X86_TEXT_PATCHING_H
2 #define _ASM_X86_TEXT_PATCHING_H
3 
4 #include <linux/types.h>
5 #include <linux/stddef.h>
6 #include <asm/ptrace.h>
7 
8 struct paravirt_patch_site;
9 #ifdef CONFIG_PARAVIRT
10 void apply_paravirt(struct paravirt_patch_site *start,
11 		    struct paravirt_patch_site *end);
12 #else
13 static inline void apply_paravirt(struct paravirt_patch_site *start,
14 				  struct paravirt_patch_site *end)
15 {}
16 #define __parainstructions	NULL
17 #define __parainstructions_end	NULL
18 #endif
19 
20 extern void *text_poke_early(void *addr, const void *opcode, size_t len);
21 
22 /*
23  * Clear and restore the kernel write-protection flag on the local CPU.
24  * Allows the kernel to edit read-only pages.
25  * Side-effect: any interrupt handler running between save and restore will have
26  * the ability to write to read-only pages.
27  *
28  * Warning:
29  * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
30  * no thread can be preempted in the instructions being modified (no iret to an
31  * invalid instruction possible) or if the instructions are changed from a
32  * consistent state to another consistent state atomically.
33  * On the local CPU you need to be protected again NMI or MCE handlers seeing an
34  * inconsistent instruction while you patch.
35  */
36 extern void *text_poke(void *addr, const void *opcode, size_t len);
37 extern int poke_int3_handler(struct pt_regs *regs);
38 extern void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler);
39 
40 #endif /* _ASM_X86_TEXT_PATCHING_H */
41