1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * platform_sst_audio.h: sst audio platform data header file 4 * 5 * Copyright (C) 2012-14 Intel Corporation 6 * Author: Jeeja KP <jeeja.kp@intel.com> 7 * Omair Mohammed Abdullah <omair.m.abdullah@intel.com> 8 * Vinod Koul ,vinod.koul@intel.com> 9 */ 10 #ifndef _PLATFORM_SST_AUDIO_H_ 11 #define _PLATFORM_SST_AUDIO_H_ 12 13 #include <linux/sfi.h> 14 15 #define MAX_NUM_STREAMS_MRFLD 25 16 #define MAX_NUM_STREAMS MAX_NUM_STREAMS_MRFLD 17 18 enum sst_audio_task_id_mrfld { 19 SST_TASK_ID_NONE = 0, 20 SST_TASK_ID_SBA = 1, 21 SST_TASK_ID_MEDIA = 3, 22 SST_TASK_ID_MAX = SST_TASK_ID_MEDIA, 23 }; 24 25 /* Device IDs for Merrifield are Pipe IDs, 26 * ref: DSP spec v0.75 */ 27 enum sst_audio_device_id_mrfld { 28 /* Output pipeline IDs */ 29 PIPE_ID_OUT_START = 0x0, 30 PIPE_CODEC_OUT0 = 0x2, 31 PIPE_CODEC_OUT1 = 0x3, 32 PIPE_SPROT_LOOP_OUT = 0x4, 33 PIPE_MEDIA_LOOP1_OUT = 0x5, 34 PIPE_MEDIA_LOOP2_OUT = 0x6, 35 PIPE_VOIP_OUT = 0xC, 36 PIPE_PCM0_OUT = 0xD, 37 PIPE_PCM1_OUT = 0xE, 38 PIPE_PCM2_OUT = 0xF, 39 PIPE_MEDIA0_OUT = 0x12, 40 PIPE_MEDIA1_OUT = 0x13, 41 /* Input Pipeline IDs */ 42 PIPE_ID_IN_START = 0x80, 43 PIPE_CODEC_IN0 = 0x82, 44 PIPE_CODEC_IN1 = 0x83, 45 PIPE_SPROT_LOOP_IN = 0x84, 46 PIPE_MEDIA_LOOP1_IN = 0x85, 47 PIPE_MEDIA_LOOP2_IN = 0x86, 48 PIPE_VOIP_IN = 0x8C, 49 PIPE_PCM0_IN = 0x8D, 50 PIPE_PCM1_IN = 0x8E, 51 PIPE_MEDIA0_IN = 0x8F, 52 PIPE_MEDIA1_IN = 0x90, 53 PIPE_MEDIA2_IN = 0x91, 54 PIPE_MEDIA3_IN = 0x9C, 55 PIPE_RSVD = 0xFF, 56 }; 57 58 /* The stream map for each platform consists of an array of the below 59 * stream map structure. 60 */ 61 struct sst_dev_stream_map { 62 u8 dev_num; /* device id */ 63 u8 subdev_num; /* substream */ 64 u8 direction; 65 u8 device_id; /* fw id */ 66 u8 task_id; /* fw task */ 67 u8 status; 68 }; 69 70 struct sst_platform_data { 71 /* Intel software platform id*/ 72 struct sst_dev_stream_map *pdev_strm_map; 73 unsigned int strm_map_size; 74 }; 75 76 struct sst_info { 77 u32 iram_start; 78 u32 iram_end; 79 bool iram_use; 80 u32 dram_start; 81 u32 dram_end; 82 bool dram_use; 83 u32 imr_start; 84 u32 imr_end; 85 bool imr_use; 86 u32 mailbox_start; 87 bool use_elf; 88 bool lpe_viewpt_rqd; 89 unsigned int max_streams; 90 u32 dma_max_len; 91 u8 num_probes; 92 }; 93 94 struct sst_lib_dnld_info { 95 unsigned int mod_base; 96 unsigned int mod_end; 97 unsigned int mod_table_offset; 98 unsigned int mod_table_size; 99 bool mod_ddr_dnld; 100 }; 101 102 struct sst_res_info { 103 unsigned int shim_offset; 104 unsigned int shim_size; 105 unsigned int shim_phy_addr; 106 unsigned int ssp0_offset; 107 unsigned int ssp0_size; 108 unsigned int dma0_offset; 109 unsigned int dma0_size; 110 unsigned int dma1_offset; 111 unsigned int dma1_size; 112 unsigned int iram_offset; 113 unsigned int iram_size; 114 unsigned int dram_offset; 115 unsigned int dram_size; 116 unsigned int mbox_offset; 117 unsigned int mbox_size; 118 unsigned int acpi_lpe_res_index; 119 unsigned int acpi_ddr_index; 120 unsigned int acpi_ipc_irq_index; 121 }; 122 123 struct sst_ipc_info { 124 int ipc_offset; 125 unsigned int mbox_recv_off; 126 }; 127 128 struct sst_platform_info { 129 const struct sst_info *probe_data; 130 const struct sst_ipc_info *ipc_info; 131 const struct sst_res_info *res_info; 132 const struct sst_lib_dnld_info *lib_info; 133 const char *platform; 134 bool streams_lost_on_suspend; 135 }; 136 int add_sst_platform_device(void); 137 #endif 138 139