1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_64_H 3 #define _ASM_X86_PGTABLE_64_H 4 5 #include <linux/const.h> 6 #include <asm/pgtable_64_types.h> 7 8 #ifndef __ASSEMBLER__ 9 10 /* 11 * This file contains the functions and defines necessary to modify and use 12 * the x86-64 page table tree. 13 */ 14 #include <asm/processor.h> 15 #include <linux/bitops.h> 16 #include <linux/threads.h> 17 #include <asm/fixmap.h> 18 19 extern p4d_t level4_kernel_pgt[512]; 20 extern p4d_t level4_ident_pgt[512]; 21 extern pud_t level3_kernel_pgt[512]; 22 extern pmd_t level2_kernel_pgt[512]; 23 extern pmd_t level2_fixmap_pgt[512]; 24 extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM]; 25 extern pgd_t init_top_pgt[]; 26 27 #define swapper_pg_dir init_top_pgt 28 29 extern void paging_init(void); 30 static inline void sync_initial_page_table(void) { } 31 32 #define pte_ERROR(e) \ 33 pr_err("%s:%d: bad pte %p(%016lx)\n", \ 34 __FILE__, __LINE__, &(e), pte_val(e)) 35 #define pmd_ERROR(e) \ 36 pr_err("%s:%d: bad pmd %p(%016lx)\n", \ 37 __FILE__, __LINE__, &(e), pmd_val(e)) 38 #define pud_ERROR(e) \ 39 pr_err("%s:%d: bad pud %p(%016lx)\n", \ 40 __FILE__, __LINE__, &(e), pud_val(e)) 41 42 #define p4d_ERROR(e) \ 43 pr_err("%s:%d: bad p4d %p(%016lx)\n", \ 44 __FILE__, __LINE__, &(e), p4d_val(e)) 45 46 #define pgd_ERROR(e) \ 47 pr_err("%s:%d: bad pgd %p(%016lx)\n", \ 48 __FILE__, __LINE__, &(e), pgd_val(e)) 49 50 struct mm_struct; 51 52 #define mm_p4d_folded mm_p4d_folded 53 static inline bool mm_p4d_folded(struct mm_struct *mm) 54 { 55 return !pgtable_l5_enabled(); 56 } 57 58 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte); 59 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); 60 61 static inline void native_set_pte(pte_t *ptep, pte_t pte) 62 { 63 WRITE_ONCE(*ptep, pte); 64 } 65 66 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, 67 pte_t *ptep) 68 { 69 native_set_pte(ptep, native_make_pte(0)); 70 } 71 72 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) 73 { 74 native_set_pte(ptep, pte); 75 } 76 77 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) 78 { 79 WRITE_ONCE(*pmdp, pmd); 80 } 81 82 static inline void native_pmd_clear(pmd_t *pmd) 83 { 84 native_set_pmd(pmd, native_make_pmd(0)); 85 } 86 87 static inline pte_t native_ptep_get_and_clear(pte_t *xp) 88 { 89 #ifdef CONFIG_SMP 90 return native_make_pte(xchg(&xp->pte, 0)); 91 #else 92 /* native_local_ptep_get_and_clear, 93 but duplicated because of cyclic dependency */ 94 pte_t ret = *xp; 95 native_pte_clear(NULL, 0, xp); 96 return ret; 97 #endif 98 } 99 100 static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp) 101 { 102 #ifdef CONFIG_SMP 103 return native_make_pmd(xchg(&xp->pmd, 0)); 104 #else 105 /* native_local_pmdp_get_and_clear, 106 but duplicated because of cyclic dependency */ 107 pmd_t ret = *xp; 108 native_pmd_clear(xp); 109 return ret; 110 #endif 111 } 112 113 static inline void native_set_pud(pud_t *pudp, pud_t pud) 114 { 115 WRITE_ONCE(*pudp, pud); 116 } 117 118 static inline void native_pud_clear(pud_t *pud) 119 { 120 native_set_pud(pud, native_make_pud(0)); 121 } 122 123 static inline pud_t native_pudp_get_and_clear(pud_t *xp) 124 { 125 #ifdef CONFIG_SMP 126 return native_make_pud(xchg(&xp->pud, 0)); 127 #else 128 /* native_local_pudp_get_and_clear, 129 * but duplicated because of cyclic dependency 130 */ 131 pud_t ret = *xp; 132 133 native_pud_clear(xp); 134 return ret; 135 #endif 136 } 137 138 static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d) 139 { 140 pgd_t pgd; 141 142 if (pgtable_l5_enabled() || 143 !IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) { 144 WRITE_ONCE(*p4dp, p4d); 145 return; 146 } 147 148 pgd = native_make_pgd(native_p4d_val(p4d)); 149 pgd = pti_set_user_pgtbl((pgd_t *)p4dp, pgd); 150 WRITE_ONCE(*p4dp, native_make_p4d(native_pgd_val(pgd))); 151 } 152 153 static inline void native_p4d_clear(p4d_t *p4d) 154 { 155 native_set_p4d(p4d, native_make_p4d(0)); 156 } 157 158 static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd) 159 { 160 WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd)); 161 } 162 163 static inline void native_pgd_clear(pgd_t *pgd) 164 { 165 native_set_pgd(pgd, native_make_pgd(0)); 166 } 167 168 /* 169 * Conversion functions: convert a page and protection to a page entry, 170 * and a page entry and page directory to the page they refer to. 171 */ 172 173 /* PGD - Level 4 access */ 174 175 /* PUD - Level 3 access */ 176 177 /* PMD - Level 2 access */ 178 179 /* PTE - Level 1 access */ 180 181 /* 182 * Encode and de-code a swap entry 183 * 184 * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number 185 * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names 186 * | TYPE (59-63) | ~OFFSET (9-58) |0|0|X|X| X| E|F|SD|0| <- swp entry 187 * 188 * G (8) is aliased and used as a PROT_NONE indicator for 189 * !present ptes. We need to start storing swap entries above 190 * there. We also need to avoid using A and D because of an 191 * erratum where they can be incorrectly set by hardware on 192 * non-present PTEs. 193 * 194 * SD Bits 1-4 are not used in non-present format and available for 195 * special use described below: 196 * 197 * SD (1) in swp entry is used to store soft dirty bit, which helps us 198 * remember soft dirty over page migration 199 * 200 * F (2) in swp entry is used to record when a pagetable is 201 * writeprotected by userfaultfd WP support. 202 * 203 * E (3) in swp entry is used to remember PG_anon_exclusive. 204 * 205 * Bit 7 in swp entry should be 0 because pmd_present checks not only P, 206 * but also L and G. 207 * 208 * The offset is inverted by a binary not operation to make the high 209 * physical bits set. 210 */ 211 #define SWP_TYPE_BITS 5 212 213 #define SWP_OFFSET_FIRST_BIT (_PAGE_BIT_PROTNONE + 1) 214 215 /* We always extract/encode the offset by shifting it all the way up, and then down again */ 216 #define SWP_OFFSET_SHIFT (SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS) 217 218 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) 219 220 /* Extract the high bits for type */ 221 #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS)) 222 223 /* Shift up (to get rid of type), then down to get value */ 224 #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT) 225 226 /* 227 * Shift the offset up "too far" by TYPE bits, then down again 228 * The offset is inverted by a binary not operation to make the high 229 * physical bits set. 230 */ 231 #define __swp_entry(type, offset) ((swp_entry_t) { \ 232 (~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \ 233 | ((unsigned long)(type) << (64-SWP_TYPE_BITS)) }) 234 235 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 236 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val((pmd)) }) 237 #define __swp_entry_to_pte(x) (__pte((x).val)) 238 #define __swp_entry_to_pmd(x) (__pmd((x).val)) 239 240 extern void cleanup_highmap(void); 241 242 #define HAVE_ARCH_UNMAPPED_AREA 243 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 244 245 #define PAGE_AGP PAGE_KERNEL_NOCACHE 246 #define HAVE_PAGE_AGP 1 247 248 /* fs/proc/kcore.c */ 249 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK) 250 #define kc_offset_to_vaddr(o) ((o) | ~__VIRTUAL_MASK) 251 252 #define __HAVE_ARCH_PTE_SAME 253 254 #define vmemmap ((struct page *)VMEMMAP_START) 255 256 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); 257 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); 258 259 #define gup_fast_permitted gup_fast_permitted 260 static inline bool gup_fast_permitted(unsigned long start, unsigned long end) 261 { 262 if (end >> __VIRTUAL_MASK_SHIFT) 263 return false; 264 return true; 265 } 266 267 #include <asm/pgtable-invert.h> 268 269 #else /* __ASSEMBLER__ */ 270 271 #define l4_index(x) (((x) >> 39) & 511) 272 #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) 273 274 L4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 275 L4_START_KERNEL = l4_index(__START_KERNEL_map) 276 277 L3_START_KERNEL = pud_index(__START_KERNEL_map) 278 279 #define SYM_DATA_START_PAGE_ALIGNED(name) \ 280 SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 281 282 /* Automate the creation of 1 to 1 mapping pmd entries */ 283 #define PMDS(START, PERM, COUNT) \ 284 i = 0 ; \ 285 .rept (COUNT) ; \ 286 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 287 i = i + 1 ; \ 288 .endr 289 290 #endif /* __ASSEMBLER__ */ 291 #endif /* _ASM_X86_PGTABLE_64_H */ 292