1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_64_H 3 #define _ASM_X86_PGTABLE_64_H 4 5 #include <linux/const.h> 6 #include <asm/pgtable_64_types.h> 7 8 #ifndef __ASSEMBLER__ 9 10 /* 11 * This file contains the functions and defines necessary to modify and use 12 * the x86-64 page table tree. 13 */ 14 #include <asm/processor.h> 15 #include <linux/bitops.h> 16 #include <linux/threads.h> 17 #include <asm/fixmap.h> 18 19 extern p4d_t level4_kernel_pgt[512]; 20 extern p4d_t level4_ident_pgt[512]; 21 extern pud_t level3_kernel_pgt[512]; 22 extern pmd_t level2_kernel_pgt[512]; 23 extern pmd_t level2_fixmap_pgt[512]; 24 extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM]; 25 extern pgd_t init_top_pgt[]; 26 27 #define swapper_pg_dir init_top_pgt 28 29 extern void paging_init(void); 30 static inline void sync_initial_page_table(void) { } 31 32 struct mm_struct; 33 34 #define mm_p4d_folded mm_p4d_folded 35 static inline bool mm_p4d_folded(struct mm_struct *mm) 36 { 37 return !pgtable_l5_enabled(); 38 } 39 40 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte); 41 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); 42 43 static inline void native_set_pte(pte_t *ptep, pte_t pte) 44 { 45 WRITE_ONCE(*ptep, pte); 46 } 47 48 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, 49 pte_t *ptep) 50 { 51 native_set_pte(ptep, native_make_pte(0)); 52 } 53 54 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) 55 { 56 native_set_pte(ptep, pte); 57 } 58 59 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) 60 { 61 WRITE_ONCE(*pmdp, pmd); 62 } 63 64 static inline void native_pmd_clear(pmd_t *pmd) 65 { 66 native_set_pmd(pmd, native_make_pmd(0)); 67 } 68 69 static inline pte_t native_ptep_get_and_clear(pte_t *xp) 70 { 71 #ifdef CONFIG_SMP 72 return native_make_pte(xchg(&xp->pte, 0)); 73 #else 74 /* native_local_ptep_get_and_clear, 75 but duplicated because of cyclic dependency */ 76 pte_t ret = *xp; 77 native_pte_clear(NULL, 0, xp); 78 return ret; 79 #endif 80 } 81 82 static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp) 83 { 84 #ifdef CONFIG_SMP 85 return native_make_pmd(xchg(&xp->pmd, 0)); 86 #else 87 /* native_local_pmdp_get_and_clear, 88 but duplicated because of cyclic dependency */ 89 pmd_t ret = *xp; 90 native_pmd_clear(xp); 91 return ret; 92 #endif 93 } 94 95 static inline void native_set_pud(pud_t *pudp, pud_t pud) 96 { 97 WRITE_ONCE(*pudp, pud); 98 } 99 100 static inline void native_pud_clear(pud_t *pud) 101 { 102 native_set_pud(pud, native_make_pud(0)); 103 } 104 105 static inline pud_t native_pudp_get_and_clear(pud_t *xp) 106 { 107 #ifdef CONFIG_SMP 108 return native_make_pud(xchg(&xp->pud, 0)); 109 #else 110 /* native_local_pudp_get_and_clear, 111 * but duplicated because of cyclic dependency 112 */ 113 pud_t ret = *xp; 114 115 native_pud_clear(xp); 116 return ret; 117 #endif 118 } 119 120 static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d) 121 { 122 pgd_t pgd; 123 124 if (pgtable_l5_enabled() || 125 !IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) { 126 WRITE_ONCE(*p4dp, p4d); 127 return; 128 } 129 130 pgd = native_make_pgd(native_p4d_val(p4d)); 131 pgd = pti_set_user_pgtbl((pgd_t *)p4dp, pgd); 132 WRITE_ONCE(*p4dp, native_make_p4d(native_pgd_val(pgd))); 133 } 134 135 static inline void native_p4d_clear(p4d_t *p4d) 136 { 137 native_set_p4d(p4d, native_make_p4d(0)); 138 } 139 140 static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd) 141 { 142 WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd)); 143 } 144 145 static inline void native_pgd_clear(pgd_t *pgd) 146 { 147 native_set_pgd(pgd, native_make_pgd(0)); 148 } 149 150 /* 151 * Conversion functions: convert a page and protection to a page entry, 152 * and a page entry and page directory to the page they refer to. 153 */ 154 155 /* PGD - Level 4 access */ 156 157 /* PUD - Level 3 access */ 158 159 /* PMD - Level 2 access */ 160 161 /* PTE - Level 1 access */ 162 163 /* 164 * Encode and de-code a swap entry 165 * 166 * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number 167 * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names 168 * | TYPE (59-63) | ~OFFSET (9-58) |0|0|X|X| X| E|F|SD|0| <- swp entry 169 * 170 * G (8) is aliased and used as a PROT_NONE indicator for 171 * !present ptes. We need to start storing swap entries above 172 * there. We also need to avoid using A and D because of an 173 * erratum where they can be incorrectly set by hardware on 174 * non-present PTEs. 175 * 176 * SD Bits 1-4 are not used in non-present format and available for 177 * special use described below: 178 * 179 * SD (1) in swp entry is used to store soft dirty bit, which helps us 180 * remember soft dirty over page migration 181 * 182 * F (2) in swp entry is used to record when a pagetable is 183 * writeprotected by userfaultfd WP support. 184 * 185 * E (3) in swp entry is used to remember PG_anon_exclusive. 186 * 187 * Bit 7 in swp entry should be 0 because pmd_present checks not only P, 188 * but also L and G. 189 * 190 * The offset is inverted by a binary not operation to make the high 191 * physical bits set. 192 */ 193 #define SWP_TYPE_BITS 5 194 195 #define SWP_OFFSET_FIRST_BIT (_PAGE_BIT_PROTNONE + 1) 196 197 /* We always extract/encode the offset by shifting it all the way up, and then down again */ 198 #define SWP_OFFSET_SHIFT (SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS) 199 200 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) 201 202 /* Extract the high bits for type */ 203 #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS)) 204 205 /* Shift up (to get rid of type), then down to get value */ 206 #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT) 207 208 /* 209 * Shift the offset up "too far" by TYPE bits, then down again 210 * The offset is inverted by a binary not operation to make the high 211 * physical bits set. 212 */ 213 #define __swp_entry(type, offset) ((swp_entry_t) { \ 214 (~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \ 215 | ((unsigned long)(type) << (64-SWP_TYPE_BITS)) }) 216 217 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 218 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val((pmd)) }) 219 #define __swp_entry_to_pte(x) (__pte((x).val)) 220 #define __swp_entry_to_pmd(x) (__pmd((x).val)) 221 222 extern void cleanup_highmap(void); 223 224 #define HAVE_ARCH_UNMAPPED_AREA 225 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 226 227 #define PAGE_AGP PAGE_KERNEL_NOCACHE 228 #define HAVE_PAGE_AGP 1 229 230 /* fs/proc/kcore.c */ 231 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK) 232 #define kc_offset_to_vaddr(o) ((o) | ~__VIRTUAL_MASK) 233 234 #define __HAVE_ARCH_PTE_SAME 235 236 #define vmemmap ((struct page *)VMEMMAP_START) 237 238 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); 239 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); 240 241 #define gup_fast_permitted gup_fast_permitted 242 static inline bool gup_fast_permitted(unsigned long start, unsigned long end) 243 { 244 if (end >> __VIRTUAL_MASK_SHIFT) 245 return false; 246 return true; 247 } 248 249 #include <asm/pgtable-invert.h> 250 251 #else /* __ASSEMBLER__ */ 252 253 #define l4_index(x) (((x) >> 39) & 511) 254 #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) 255 256 L4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 257 L4_START_KERNEL = l4_index(__START_KERNEL_map) 258 259 L3_START_KERNEL = pud_index(__START_KERNEL_map) 260 261 #define SYM_DATA_START_PAGE_ALIGNED(name) \ 262 SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 263 264 /* Automate the creation of 1 to 1 mapping pmd entries */ 265 #define PMDS(START, PERM, COUNT) \ 266 i = 0 ; \ 267 .rept (COUNT) ; \ 268 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 269 i = i + 1 ; \ 270 .endr 271 272 #endif /* __ASSEMBLER__ */ 273 #endif /* _ASM_X86_PGTABLE_64_H */ 274