1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <linux/spinlock.h> 20 #include <asm/x86_init.h> 21 #include <asm/pkru.h> 22 #include <asm/fpu/api.h> 23 #include <asm/coco.h> 24 #include <asm-generic/pgtable_uffd.h> 25 #include <linux/page_table_check.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 struct seq_file; 31 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 32 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 33 bool user); 34 bool ptdump_walk_pgd_level_checkwx(void); 35 #define ptdump_check_wx ptdump_walk_pgd_level_checkwx 36 void ptdump_walk_user_pgd_level_checkwx(void); 37 38 /* 39 * Macros to add or remove encryption attribute 40 */ 41 #define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot))) 42 #define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot))) 43 44 #ifdef CONFIG_DEBUG_WX 45 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 46 #else 47 #define debug_checkwx_user() do { } while (0) 48 #endif 49 50 /* 51 * ZERO_PAGE is a global shared page that is always zero: used 52 * for zero-mapped memory areas etc.. 53 */ 54 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 55 __visible; 56 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 57 58 extern spinlock_t pgd_lock; 59 extern struct list_head pgd_list; 60 61 extern struct mm_struct *pgd_page_get_mm(struct page *page); 62 63 extern pmdval_t early_pmd_flags; 64 65 #ifdef CONFIG_PARAVIRT_XXL 66 #include <asm/paravirt.h> 67 #else /* !CONFIG_PARAVIRT_XXL */ 68 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 69 70 #define set_pte_atomic(ptep, pte) \ 71 native_set_pte_atomic(ptep, pte) 72 73 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 74 75 #ifndef __PAGETABLE_P4D_FOLDED 76 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 77 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 78 #endif 79 80 #ifndef set_p4d 81 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 82 #endif 83 84 #ifndef __PAGETABLE_PUD_FOLDED 85 #define p4d_clear(p4d) native_p4d_clear(p4d) 86 #endif 87 88 #ifndef set_pud 89 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 90 #endif 91 92 #ifndef __PAGETABLE_PUD_FOLDED 93 #define pud_clear(pud) native_pud_clear(pud) 94 #endif 95 96 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 97 #define pmd_clear(pmd) native_pmd_clear(pmd) 98 99 #define pgd_val(x) native_pgd_val(x) 100 #define __pgd(x) native_make_pgd(x) 101 102 #ifndef __PAGETABLE_P4D_FOLDED 103 #define p4d_val(x) native_p4d_val(x) 104 #define __p4d(x) native_make_p4d(x) 105 #endif 106 107 #ifndef __PAGETABLE_PUD_FOLDED 108 #define pud_val(x) native_pud_val(x) 109 #define __pud(x) native_make_pud(x) 110 #endif 111 112 #ifndef __PAGETABLE_PMD_FOLDED 113 #define pmd_val(x) native_pmd_val(x) 114 #define __pmd(x) native_make_pmd(x) 115 #endif 116 117 #define pte_val(x) native_pte_val(x) 118 #define __pte(x) native_make_pte(x) 119 120 #define arch_end_context_switch(prev) do {} while(0) 121 #endif /* CONFIG_PARAVIRT_XXL */ 122 123 /* 124 * The following only work if pte_present() is true. 125 * Undefined behaviour if not.. 126 */ 127 static inline bool pte_dirty(pte_t pte) 128 { 129 return pte_flags(pte) & _PAGE_DIRTY_BITS; 130 } 131 132 static inline bool pte_shstk(pte_t pte) 133 { 134 return cpu_feature_enabled(X86_FEATURE_SHSTK) && 135 (pte_flags(pte) & (_PAGE_RW | _PAGE_DIRTY)) == _PAGE_DIRTY; 136 } 137 138 static inline int pte_young(pte_t pte) 139 { 140 return pte_flags(pte) & _PAGE_ACCESSED; 141 } 142 143 static inline bool pte_decrypted(pte_t pte) 144 { 145 return cc_mkdec(pte_val(pte)) == pte_val(pte); 146 } 147 148 #define pmd_dirty pmd_dirty 149 static inline bool pmd_dirty(pmd_t pmd) 150 { 151 return pmd_flags(pmd) & _PAGE_DIRTY_BITS; 152 } 153 154 static inline bool pmd_shstk(pmd_t pmd) 155 { 156 return cpu_feature_enabled(X86_FEATURE_SHSTK) && 157 (pmd_flags(pmd) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) == 158 (_PAGE_DIRTY | _PAGE_PSE); 159 } 160 161 #define pmd_young pmd_young 162 static inline int pmd_young(pmd_t pmd) 163 { 164 return pmd_flags(pmd) & _PAGE_ACCESSED; 165 } 166 167 static inline bool pud_dirty(pud_t pud) 168 { 169 return pud_flags(pud) & _PAGE_DIRTY_BITS; 170 } 171 172 static inline int pud_young(pud_t pud) 173 { 174 return pud_flags(pud) & _PAGE_ACCESSED; 175 } 176 177 static inline bool pud_shstk(pud_t pud) 178 { 179 return cpu_feature_enabled(X86_FEATURE_SHSTK) && 180 (pud_flags(pud) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) == 181 (_PAGE_DIRTY | _PAGE_PSE); 182 } 183 184 static inline int pte_write(pte_t pte) 185 { 186 /* 187 * Shadow stack pages are logically writable, but do not have 188 * _PAGE_RW. Check for them separately from _PAGE_RW itself. 189 */ 190 return (pte_flags(pte) & _PAGE_RW) || pte_shstk(pte); 191 } 192 193 #define pmd_write pmd_write 194 static inline int pmd_write(pmd_t pmd) 195 { 196 /* 197 * Shadow stack pages are logically writable, but do not have 198 * _PAGE_RW. Check for them separately from _PAGE_RW itself. 199 */ 200 return (pmd_flags(pmd) & _PAGE_RW) || pmd_shstk(pmd); 201 } 202 203 #define pud_write pud_write 204 static inline int pud_write(pud_t pud) 205 { 206 return pud_flags(pud) & _PAGE_RW; 207 } 208 209 static inline int pte_huge(pte_t pte) 210 { 211 return pte_flags(pte) & _PAGE_PSE; 212 } 213 214 static inline int pte_global(pte_t pte) 215 { 216 return pte_flags(pte) & _PAGE_GLOBAL; 217 } 218 219 static inline int pte_exec(pte_t pte) 220 { 221 return !(pte_flags(pte) & _PAGE_NX); 222 } 223 224 static inline int pte_special(pte_t pte) 225 { 226 return pte_flags(pte) & _PAGE_SPECIAL; 227 } 228 229 /* Entries that were set to PROT_NONE are inverted */ 230 231 static inline u64 protnone_mask(u64 val); 232 233 #define PFN_PTE_SHIFT PAGE_SHIFT 234 235 static inline unsigned long pte_pfn(pte_t pte) 236 { 237 phys_addr_t pfn = pte_val(pte); 238 pfn ^= protnone_mask(pfn); 239 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 240 } 241 242 static inline unsigned long pmd_pfn(pmd_t pmd) 243 { 244 phys_addr_t pfn = pmd_val(pmd); 245 pfn ^= protnone_mask(pfn); 246 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 247 } 248 249 #define pud_pfn pud_pfn 250 static inline unsigned long pud_pfn(pud_t pud) 251 { 252 phys_addr_t pfn = pud_val(pud); 253 pfn ^= protnone_mask(pfn); 254 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 255 } 256 257 static inline unsigned long p4d_pfn(p4d_t p4d) 258 { 259 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 260 } 261 262 static inline unsigned long pgd_pfn(pgd_t pgd) 263 { 264 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 265 } 266 267 #define p4d_leaf p4d_leaf 268 static inline bool p4d_leaf(p4d_t p4d) 269 { 270 /* No 512 GiB pages yet */ 271 return 0; 272 } 273 274 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 275 276 #define pmd_leaf pmd_leaf 277 static inline bool pmd_leaf(pmd_t pte) 278 { 279 return pmd_flags(pte) & _PAGE_PSE; 280 } 281 282 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 283 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_leaf */ 284 static inline int pmd_trans_huge(pmd_t pmd) 285 { 286 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 287 } 288 289 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 290 static inline int pud_trans_huge(pud_t pud) 291 { 292 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 293 } 294 #endif 295 296 #define has_transparent_hugepage has_transparent_hugepage 297 static inline int has_transparent_hugepage(void) 298 { 299 return boot_cpu_has(X86_FEATURE_PSE); 300 } 301 302 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 303 static inline int pmd_devmap(pmd_t pmd) 304 { 305 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 306 } 307 308 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 309 static inline int pud_devmap(pud_t pud) 310 { 311 return !!(pud_val(pud) & _PAGE_DEVMAP); 312 } 313 #else 314 static inline int pud_devmap(pud_t pud) 315 { 316 return 0; 317 } 318 #endif 319 320 static inline int pgd_devmap(pgd_t pgd) 321 { 322 return 0; 323 } 324 #endif 325 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 326 327 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 328 { 329 pteval_t v = native_pte_val(pte); 330 331 return native_make_pte(v | set); 332 } 333 334 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 335 { 336 pteval_t v = native_pte_val(pte); 337 338 return native_make_pte(v & ~clear); 339 } 340 341 /* 342 * Write protection operations can result in Dirty=1,Write=0 PTEs. But in the 343 * case of X86_FEATURE_USER_SHSTK, these PTEs denote shadow stack memory. So 344 * when creating dirty, write-protected memory, a software bit is used: 345 * _PAGE_BIT_SAVED_DIRTY. The following functions take a PTE and transition the 346 * Dirty bit to SavedDirty, and vice-vesra. 347 * 348 * This shifting is only done if needed. In the case of shifting 349 * Dirty->SavedDirty, the condition is if the PTE is Write=0. In the case of 350 * shifting SavedDirty->Dirty, the condition is Write=1. 351 */ 352 static inline pgprotval_t mksaveddirty_shift(pgprotval_t v) 353 { 354 pgprotval_t cond = (~v >> _PAGE_BIT_RW) & 1; 355 356 v |= ((v >> _PAGE_BIT_DIRTY) & cond) << _PAGE_BIT_SAVED_DIRTY; 357 v &= ~(cond << _PAGE_BIT_DIRTY); 358 359 return v; 360 } 361 362 static inline pgprotval_t clear_saveddirty_shift(pgprotval_t v) 363 { 364 pgprotval_t cond = (v >> _PAGE_BIT_RW) & 1; 365 366 v |= ((v >> _PAGE_BIT_SAVED_DIRTY) & cond) << _PAGE_BIT_DIRTY; 367 v &= ~(cond << _PAGE_BIT_SAVED_DIRTY); 368 369 return v; 370 } 371 372 static inline pte_t pte_mksaveddirty(pte_t pte) 373 { 374 pteval_t v = native_pte_val(pte); 375 376 v = mksaveddirty_shift(v); 377 return native_make_pte(v); 378 } 379 380 static inline pte_t pte_clear_saveddirty(pte_t pte) 381 { 382 pteval_t v = native_pte_val(pte); 383 384 v = clear_saveddirty_shift(v); 385 return native_make_pte(v); 386 } 387 388 static inline pte_t pte_wrprotect(pte_t pte) 389 { 390 pte = pte_clear_flags(pte, _PAGE_RW); 391 392 /* 393 * Blindly clearing _PAGE_RW might accidentally create 394 * a shadow stack PTE (Write=0,Dirty=1). Move the hardware 395 * dirty value to the software bit, if present. 396 */ 397 return pte_mksaveddirty(pte); 398 } 399 400 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 401 static inline int pte_uffd_wp(pte_t pte) 402 { 403 return pte_flags(pte) & _PAGE_UFFD_WP; 404 } 405 406 static inline pte_t pte_mkuffd_wp(pte_t pte) 407 { 408 return pte_wrprotect(pte_set_flags(pte, _PAGE_UFFD_WP)); 409 } 410 411 static inline pte_t pte_clear_uffd_wp(pte_t pte) 412 { 413 return pte_clear_flags(pte, _PAGE_UFFD_WP); 414 } 415 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 416 417 static inline pte_t pte_mkclean(pte_t pte) 418 { 419 return pte_clear_flags(pte, _PAGE_DIRTY_BITS); 420 } 421 422 static inline pte_t pte_mkold(pte_t pte) 423 { 424 return pte_clear_flags(pte, _PAGE_ACCESSED); 425 } 426 427 static inline pte_t pte_mkexec(pte_t pte) 428 { 429 return pte_clear_flags(pte, _PAGE_NX); 430 } 431 432 static inline pte_t pte_mkdirty(pte_t pte) 433 { 434 pte = pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 435 436 return pte_mksaveddirty(pte); 437 } 438 439 static inline pte_t pte_mkwrite_shstk(pte_t pte) 440 { 441 pte = pte_clear_flags(pte, _PAGE_RW); 442 443 return pte_set_flags(pte, _PAGE_DIRTY); 444 } 445 446 static inline pte_t pte_mkyoung(pte_t pte) 447 { 448 return pte_set_flags(pte, _PAGE_ACCESSED); 449 } 450 451 static inline pte_t pte_mkwrite_novma(pte_t pte) 452 { 453 return pte_set_flags(pte, _PAGE_RW); 454 } 455 456 struct vm_area_struct; 457 pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma); 458 #define pte_mkwrite pte_mkwrite 459 460 static inline pte_t pte_mkhuge(pte_t pte) 461 { 462 return pte_set_flags(pte, _PAGE_PSE); 463 } 464 465 static inline pte_t pte_clrhuge(pte_t pte) 466 { 467 return pte_clear_flags(pte, _PAGE_PSE); 468 } 469 470 static inline pte_t pte_mkglobal(pte_t pte) 471 { 472 return pte_set_flags(pte, _PAGE_GLOBAL); 473 } 474 475 static inline pte_t pte_clrglobal(pte_t pte) 476 { 477 return pte_clear_flags(pte, _PAGE_GLOBAL); 478 } 479 480 static inline pte_t pte_mkspecial(pte_t pte) 481 { 482 return pte_set_flags(pte, _PAGE_SPECIAL); 483 } 484 485 static inline pte_t pte_mkdevmap(pte_t pte) 486 { 487 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 488 } 489 490 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 491 { 492 pmdval_t v = native_pmd_val(pmd); 493 494 return native_make_pmd(v | set); 495 } 496 497 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 498 { 499 pmdval_t v = native_pmd_val(pmd); 500 501 return native_make_pmd(v & ~clear); 502 } 503 504 /* See comments above mksaveddirty_shift() */ 505 static inline pmd_t pmd_mksaveddirty(pmd_t pmd) 506 { 507 pmdval_t v = native_pmd_val(pmd); 508 509 v = mksaveddirty_shift(v); 510 return native_make_pmd(v); 511 } 512 513 /* See comments above mksaveddirty_shift() */ 514 static inline pmd_t pmd_clear_saveddirty(pmd_t pmd) 515 { 516 pmdval_t v = native_pmd_val(pmd); 517 518 v = clear_saveddirty_shift(v); 519 return native_make_pmd(v); 520 } 521 522 static inline pmd_t pmd_wrprotect(pmd_t pmd) 523 { 524 pmd = pmd_clear_flags(pmd, _PAGE_RW); 525 526 /* 527 * Blindly clearing _PAGE_RW might accidentally create 528 * a shadow stack PMD (RW=0, Dirty=1). Move the hardware 529 * dirty value to the software bit. 530 */ 531 return pmd_mksaveddirty(pmd); 532 } 533 534 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 535 static inline int pmd_uffd_wp(pmd_t pmd) 536 { 537 return pmd_flags(pmd) & _PAGE_UFFD_WP; 538 } 539 540 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 541 { 542 return pmd_wrprotect(pmd_set_flags(pmd, _PAGE_UFFD_WP)); 543 } 544 545 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 546 { 547 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 548 } 549 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 550 551 static inline pmd_t pmd_mkold(pmd_t pmd) 552 { 553 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 554 } 555 556 static inline pmd_t pmd_mkclean(pmd_t pmd) 557 { 558 return pmd_clear_flags(pmd, _PAGE_DIRTY_BITS); 559 } 560 561 static inline pmd_t pmd_mkdirty(pmd_t pmd) 562 { 563 pmd = pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 564 565 return pmd_mksaveddirty(pmd); 566 } 567 568 static inline pmd_t pmd_mkwrite_shstk(pmd_t pmd) 569 { 570 pmd = pmd_clear_flags(pmd, _PAGE_RW); 571 572 return pmd_set_flags(pmd, _PAGE_DIRTY); 573 } 574 575 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 576 { 577 return pmd_set_flags(pmd, _PAGE_DEVMAP); 578 } 579 580 static inline pmd_t pmd_mkhuge(pmd_t pmd) 581 { 582 return pmd_set_flags(pmd, _PAGE_PSE); 583 } 584 585 static inline pmd_t pmd_mkyoung(pmd_t pmd) 586 { 587 return pmd_set_flags(pmd, _PAGE_ACCESSED); 588 } 589 590 static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) 591 { 592 return pmd_set_flags(pmd, _PAGE_RW); 593 } 594 595 pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma); 596 #define pmd_mkwrite pmd_mkwrite 597 598 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 599 { 600 pudval_t v = native_pud_val(pud); 601 602 return native_make_pud(v | set); 603 } 604 605 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 606 { 607 pudval_t v = native_pud_val(pud); 608 609 return native_make_pud(v & ~clear); 610 } 611 612 /* See comments above mksaveddirty_shift() */ 613 static inline pud_t pud_mksaveddirty(pud_t pud) 614 { 615 pudval_t v = native_pud_val(pud); 616 617 v = mksaveddirty_shift(v); 618 return native_make_pud(v); 619 } 620 621 /* See comments above mksaveddirty_shift() */ 622 static inline pud_t pud_clear_saveddirty(pud_t pud) 623 { 624 pudval_t v = native_pud_val(pud); 625 626 v = clear_saveddirty_shift(v); 627 return native_make_pud(v); 628 } 629 630 static inline pud_t pud_mkold(pud_t pud) 631 { 632 return pud_clear_flags(pud, _PAGE_ACCESSED); 633 } 634 635 static inline pud_t pud_mkclean(pud_t pud) 636 { 637 return pud_clear_flags(pud, _PAGE_DIRTY_BITS); 638 } 639 640 static inline pud_t pud_wrprotect(pud_t pud) 641 { 642 pud = pud_clear_flags(pud, _PAGE_RW); 643 644 /* 645 * Blindly clearing _PAGE_RW might accidentally create 646 * a shadow stack PUD (RW=0, Dirty=1). Move the hardware 647 * dirty value to the software bit. 648 */ 649 return pud_mksaveddirty(pud); 650 } 651 652 static inline pud_t pud_mkdirty(pud_t pud) 653 { 654 pud = pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 655 656 return pud_mksaveddirty(pud); 657 } 658 659 static inline pud_t pud_mkdevmap(pud_t pud) 660 { 661 return pud_set_flags(pud, _PAGE_DEVMAP); 662 } 663 664 static inline pud_t pud_mkhuge(pud_t pud) 665 { 666 return pud_set_flags(pud, _PAGE_PSE); 667 } 668 669 static inline pud_t pud_mkyoung(pud_t pud) 670 { 671 return pud_set_flags(pud, _PAGE_ACCESSED); 672 } 673 674 static inline pud_t pud_mkwrite(pud_t pud) 675 { 676 pud = pud_set_flags(pud, _PAGE_RW); 677 678 return pud_clear_saveddirty(pud); 679 } 680 681 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 682 static inline int pte_soft_dirty(pte_t pte) 683 { 684 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 685 } 686 687 static inline int pmd_soft_dirty(pmd_t pmd) 688 { 689 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 690 } 691 692 static inline int pud_soft_dirty(pud_t pud) 693 { 694 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 695 } 696 697 static inline pte_t pte_mksoft_dirty(pte_t pte) 698 { 699 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 700 } 701 702 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 703 { 704 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 705 } 706 707 static inline pud_t pud_mksoft_dirty(pud_t pud) 708 { 709 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 710 } 711 712 static inline pte_t pte_clear_soft_dirty(pte_t pte) 713 { 714 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 715 } 716 717 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 718 { 719 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 720 } 721 722 static inline pud_t pud_clear_soft_dirty(pud_t pud) 723 { 724 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 725 } 726 727 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 728 729 /* 730 * Mask out unsupported bits in a present pgprot. Non-present pgprots 731 * can use those bits for other purposes, so leave them be. 732 */ 733 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 734 { 735 pgprotval_t protval = pgprot_val(pgprot); 736 737 if (protval & _PAGE_PRESENT) 738 protval &= __supported_pte_mask; 739 740 return protval; 741 } 742 743 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 744 { 745 pgprotval_t massaged_val = massage_pgprot(pgprot); 746 747 /* mmdebug.h can not be included here because of dependencies */ 748 #ifdef CONFIG_DEBUG_VM 749 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 750 "attempted to set unsupported pgprot: %016llx " 751 "bits: %016llx supported: %016llx\n", 752 (u64)pgprot_val(pgprot), 753 (u64)pgprot_val(pgprot) ^ massaged_val, 754 (u64)__supported_pte_mask); 755 #endif 756 757 return massaged_val; 758 } 759 760 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 761 { 762 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 763 pfn ^= protnone_mask(pgprot_val(pgprot)); 764 pfn &= PTE_PFN_MASK; 765 return __pte(pfn | check_pgprot(pgprot)); 766 } 767 768 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 769 { 770 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 771 pfn ^= protnone_mask(pgprot_val(pgprot)); 772 pfn &= PHYSICAL_PMD_PAGE_MASK; 773 return __pmd(pfn | check_pgprot(pgprot)); 774 } 775 776 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 777 { 778 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 779 pfn ^= protnone_mask(pgprot_val(pgprot)); 780 pfn &= PHYSICAL_PUD_PAGE_MASK; 781 return __pud(pfn | check_pgprot(pgprot)); 782 } 783 784 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 785 { 786 return pfn_pmd(pmd_pfn(pmd), 787 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 788 } 789 790 static inline pud_t pud_mkinvalid(pud_t pud) 791 { 792 return pfn_pud(pud_pfn(pud), 793 __pgprot(pud_flags(pud) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 794 } 795 796 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 797 798 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 799 { 800 pteval_t val = pte_val(pte), oldval = val; 801 pte_t pte_result; 802 803 /* 804 * Chop off the NX bit (if present), and add the NX portion of 805 * the newprot (if present): 806 */ 807 val &= _PAGE_CHG_MASK; 808 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 809 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 810 811 pte_result = __pte(val); 812 813 /* 814 * To avoid creating Write=0,Dirty=1 PTEs, pte_modify() needs to avoid: 815 * 1. Marking Write=0 PTEs Dirty=1 816 * 2. Marking Dirty=1 PTEs Write=0 817 * 818 * The first case cannot happen because the _PAGE_CHG_MASK will filter 819 * out any Dirty bit passed in newprot. Handle the second case by 820 * going through the mksaveddirty exercise. Only do this if the old 821 * value was Write=1 to avoid doing this on Shadow Stack PTEs. 822 */ 823 if (oldval & _PAGE_RW) 824 pte_result = pte_mksaveddirty(pte_result); 825 else 826 pte_result = pte_clear_saveddirty(pte_result); 827 828 return pte_result; 829 } 830 831 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 832 { 833 pmdval_t val = pmd_val(pmd), oldval = val; 834 pmd_t pmd_result; 835 836 val &= (_HPAGE_CHG_MASK & ~_PAGE_DIRTY); 837 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 838 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 839 840 pmd_result = __pmd(val); 841 842 /* 843 * Avoid creating shadow stack PMD by accident. See comment in 844 * pte_modify(). 845 */ 846 if (oldval & _PAGE_RW) 847 pmd_result = pmd_mksaveddirty(pmd_result); 848 else 849 pmd_result = pmd_clear_saveddirty(pmd_result); 850 851 return pmd_result; 852 } 853 854 static inline pud_t pud_modify(pud_t pud, pgprot_t newprot) 855 { 856 pudval_t val = pud_val(pud), oldval = val; 857 pud_t pud_result; 858 859 val &= _HPAGE_CHG_MASK; 860 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 861 val = flip_protnone_guard(oldval, val, PHYSICAL_PUD_PAGE_MASK); 862 863 pud_result = __pud(val); 864 865 /* 866 * Avoid creating shadow stack PUD by accident. See comment in 867 * pte_modify(). 868 */ 869 if (oldval & _PAGE_RW) 870 pud_result = pud_mksaveddirty(pud_result); 871 else 872 pud_result = pud_clear_saveddirty(pud_result); 873 874 return pud_result; 875 } 876 877 /* 878 * mprotect needs to preserve PAT and encryption bits when updating 879 * vm_page_prot 880 */ 881 #define pgprot_modify pgprot_modify 882 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 883 { 884 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 885 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 886 return __pgprot(preservebits | addbits); 887 } 888 889 #define pte_pgprot(x) __pgprot(pte_flags(x)) 890 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 891 #define pud_pgprot(x) __pgprot(pud_flags(x)) 892 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 893 894 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 895 896 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 897 enum page_cache_mode pcm, 898 enum page_cache_mode new_pcm) 899 { 900 /* 901 * PAT type is always WB for untracked ranges, so no need to check. 902 */ 903 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 904 return 1; 905 906 /* 907 * Certain new memtypes are not allowed with certain 908 * requested memtype: 909 * - request is uncached, return cannot be write-back 910 * - request is write-combine, return cannot be write-back 911 * - request is write-through, return cannot be write-back 912 * - request is write-through, return cannot be write-combine 913 */ 914 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 915 new_pcm == _PAGE_CACHE_MODE_WB) || 916 (pcm == _PAGE_CACHE_MODE_WC && 917 new_pcm == _PAGE_CACHE_MODE_WB) || 918 (pcm == _PAGE_CACHE_MODE_WT && 919 new_pcm == _PAGE_CACHE_MODE_WB) || 920 (pcm == _PAGE_CACHE_MODE_WT && 921 new_pcm == _PAGE_CACHE_MODE_WC)) { 922 return 0; 923 } 924 925 return 1; 926 } 927 928 pmd_t *populate_extra_pmd(unsigned long vaddr); 929 pte_t *populate_extra_pte(unsigned long vaddr); 930 931 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 932 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 933 934 /* 935 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 936 * Populates the user and returns the resulting PGD that must be set in 937 * the kernel copy of the page tables. 938 */ 939 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 940 { 941 if (!static_cpu_has(X86_FEATURE_PTI)) 942 return pgd; 943 return __pti_set_user_pgtbl(pgdp, pgd); 944 } 945 #else /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 946 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 947 { 948 return pgd; 949 } 950 #endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 951 952 #endif /* __ASSEMBLY__ */ 953 954 955 #ifdef CONFIG_X86_32 956 # include <asm/pgtable_32.h> 957 #else 958 # include <asm/pgtable_64.h> 959 #endif 960 961 #ifndef __ASSEMBLY__ 962 #include <linux/mm_types.h> 963 #include <linux/mmdebug.h> 964 #include <linux/log2.h> 965 #include <asm/fixmap.h> 966 967 static inline int pte_none(pte_t pte) 968 { 969 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 970 } 971 972 #define __HAVE_ARCH_PTE_SAME 973 static inline int pte_same(pte_t a, pte_t b) 974 { 975 return a.pte == b.pte; 976 } 977 978 static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr) 979 { 980 if (__pte_needs_invert(pte_val(pte))) 981 return __pte(pte_val(pte) - (nr << PFN_PTE_SHIFT)); 982 return __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT)); 983 } 984 #define pte_advance_pfn pte_advance_pfn 985 986 static inline int pte_present(pte_t a) 987 { 988 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 989 } 990 991 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 992 static inline int pte_devmap(pte_t a) 993 { 994 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 995 } 996 #endif 997 998 #define pte_accessible pte_accessible 999 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 1000 { 1001 if (pte_flags(a) & _PAGE_PRESENT) 1002 return true; 1003 1004 if ((pte_flags(a) & _PAGE_PROTNONE) && 1005 atomic_read(&mm->tlb_flush_pending)) 1006 return true; 1007 1008 return false; 1009 } 1010 1011 static inline int pmd_present(pmd_t pmd) 1012 { 1013 /* 1014 * Checking for _PAGE_PSE is needed too because 1015 * split_huge_page will temporarily clear the present bit (but 1016 * the _PAGE_PSE flag will remain set at all times while the 1017 * _PAGE_PRESENT bit is clear). 1018 */ 1019 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 1020 } 1021 1022 #ifdef CONFIG_NUMA_BALANCING 1023 /* 1024 * These work without NUMA balancing but the kernel does not care. See the 1025 * comment in include/linux/pgtable.h 1026 */ 1027 static inline int pte_protnone(pte_t pte) 1028 { 1029 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 1030 == _PAGE_PROTNONE; 1031 } 1032 1033 static inline int pmd_protnone(pmd_t pmd) 1034 { 1035 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 1036 == _PAGE_PROTNONE; 1037 } 1038 #endif /* CONFIG_NUMA_BALANCING */ 1039 1040 static inline int pmd_none(pmd_t pmd) 1041 { 1042 /* Only check low word on 32-bit platforms, since it might be 1043 out of sync with upper half. */ 1044 unsigned long val = native_pmd_val(pmd); 1045 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 1046 } 1047 1048 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 1049 { 1050 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 1051 } 1052 1053 /* 1054 * Currently stuck as a macro due to indirect forward reference to 1055 * linux/mmzone.h's __section_mem_map_addr() definition: 1056 */ 1057 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 1058 1059 /* 1060 * Conversion functions: convert a page and protection to a page entry, 1061 * and a page entry and page directory to the page they refer to. 1062 * 1063 * (Currently stuck as a macro because of indirect forward reference 1064 * to linux/mm.h:page_to_nid()) 1065 */ 1066 #define mk_pte(page, pgprot) \ 1067 ({ \ 1068 pgprot_t __pgprot = pgprot; \ 1069 \ 1070 WARN_ON_ONCE((pgprot_val(__pgprot) & (_PAGE_DIRTY | _PAGE_RW)) == \ 1071 _PAGE_DIRTY); \ 1072 pfn_pte(page_to_pfn(page), __pgprot); \ 1073 }) 1074 1075 static inline int pmd_bad(pmd_t pmd) 1076 { 1077 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) != 1078 (_KERNPG_TABLE & ~_PAGE_ACCESSED); 1079 } 1080 1081 static inline unsigned long pages_to_mb(unsigned long npg) 1082 { 1083 return npg >> (20 - PAGE_SHIFT); 1084 } 1085 1086 #if CONFIG_PGTABLE_LEVELS > 2 1087 static inline int pud_none(pud_t pud) 1088 { 1089 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 1090 } 1091 1092 static inline int pud_present(pud_t pud) 1093 { 1094 return pud_flags(pud) & _PAGE_PRESENT; 1095 } 1096 1097 static inline pmd_t *pud_pgtable(pud_t pud) 1098 { 1099 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 1100 } 1101 1102 /* 1103 * Currently stuck as a macro due to indirect forward reference to 1104 * linux/mmzone.h's __section_mem_map_addr() definition: 1105 */ 1106 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 1107 1108 #define pud_leaf pud_leaf 1109 static inline bool pud_leaf(pud_t pud) 1110 { 1111 return pud_val(pud) & _PAGE_PSE; 1112 } 1113 1114 static inline int pud_bad(pud_t pud) 1115 { 1116 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 1117 } 1118 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 1119 1120 #if CONFIG_PGTABLE_LEVELS > 3 1121 static inline int p4d_none(p4d_t p4d) 1122 { 1123 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 1124 } 1125 1126 static inline int p4d_present(p4d_t p4d) 1127 { 1128 return p4d_flags(p4d) & _PAGE_PRESENT; 1129 } 1130 1131 static inline pud_t *p4d_pgtable(p4d_t p4d) 1132 { 1133 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 1134 } 1135 1136 /* 1137 * Currently stuck as a macro due to indirect forward reference to 1138 * linux/mmzone.h's __section_mem_map_addr() definition: 1139 */ 1140 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 1141 1142 static inline int p4d_bad(p4d_t p4d) 1143 { 1144 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 1145 1146 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) 1147 ignore_flags |= _PAGE_NX; 1148 1149 return (p4d_flags(p4d) & ~ignore_flags) != 0; 1150 } 1151 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 1152 1153 static inline unsigned long p4d_index(unsigned long address) 1154 { 1155 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 1156 } 1157 1158 #if CONFIG_PGTABLE_LEVELS > 4 1159 static inline int pgd_present(pgd_t pgd) 1160 { 1161 if (!pgtable_l5_enabled()) 1162 return 1; 1163 return pgd_flags(pgd) & _PAGE_PRESENT; 1164 } 1165 1166 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 1167 { 1168 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 1169 } 1170 1171 /* 1172 * Currently stuck as a macro due to indirect forward reference to 1173 * linux/mmzone.h's __section_mem_map_addr() definition: 1174 */ 1175 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 1176 1177 /* to find an entry in a page-table-directory. */ 1178 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 1179 { 1180 if (!pgtable_l5_enabled()) 1181 return (p4d_t *)pgd; 1182 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 1183 } 1184 1185 static inline int pgd_bad(pgd_t pgd) 1186 { 1187 unsigned long ignore_flags = _PAGE_USER; 1188 1189 if (!pgtable_l5_enabled()) 1190 return 0; 1191 1192 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) 1193 ignore_flags |= _PAGE_NX; 1194 1195 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 1196 } 1197 1198 static inline int pgd_none(pgd_t pgd) 1199 { 1200 if (!pgtable_l5_enabled()) 1201 return 0; 1202 /* 1203 * There is no need to do a workaround for the KNL stray 1204 * A/D bit erratum here. PGDs only point to page tables 1205 * except on 32-bit non-PAE which is not supported on 1206 * KNL. 1207 */ 1208 return !native_pgd_val(pgd); 1209 } 1210 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 1211 1212 #endif /* __ASSEMBLY__ */ 1213 1214 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 1215 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 1216 1217 #ifndef __ASSEMBLY__ 1218 1219 extern int direct_gbpages; 1220 void init_mem_mapping(void); 1221 void early_alloc_pgt_buf(void); 1222 void __init poking_init(void); 1223 unsigned long init_memory_mapping(unsigned long start, 1224 unsigned long end, pgprot_t prot); 1225 1226 #ifdef CONFIG_X86_64 1227 extern pgd_t trampoline_pgd_entry; 1228 #endif 1229 1230 /* local pte updates need not use xchg for locking */ 1231 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 1232 { 1233 pte_t res = *ptep; 1234 1235 /* Pure native function needs no input for mm, addr */ 1236 native_pte_clear(NULL, 0, ptep); 1237 return res; 1238 } 1239 1240 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 1241 { 1242 pmd_t res = *pmdp; 1243 1244 native_pmd_clear(pmdp); 1245 return res; 1246 } 1247 1248 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1249 { 1250 pud_t res = *pudp; 1251 1252 native_pud_clear(pudp); 1253 return res; 1254 } 1255 1256 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1257 pmd_t *pmdp, pmd_t pmd) 1258 { 1259 page_table_check_pmd_set(mm, pmdp, pmd); 1260 set_pmd(pmdp, pmd); 1261 } 1262 1263 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1264 pud_t *pudp, pud_t pud) 1265 { 1266 page_table_check_pud_set(mm, pudp, pud); 1267 native_set_pud(pudp, pud); 1268 } 1269 1270 /* 1271 * We only update the dirty/accessed state if we set 1272 * the dirty bit by hand in the kernel, since the hardware 1273 * will do the accessed bit for us, and we don't want to 1274 * race with other CPU's that might be updating the dirty 1275 * bit at the same time. 1276 */ 1277 struct vm_area_struct; 1278 1279 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1280 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1281 unsigned long address, pte_t *ptep, 1282 pte_t entry, int dirty); 1283 1284 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1285 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1286 unsigned long addr, pte_t *ptep); 1287 1288 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1289 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1290 unsigned long address, pte_t *ptep); 1291 1292 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1293 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1294 pte_t *ptep) 1295 { 1296 pte_t pte = native_ptep_get_and_clear(ptep); 1297 page_table_check_pte_clear(mm, pte); 1298 return pte; 1299 } 1300 1301 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1302 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1303 unsigned long addr, pte_t *ptep, 1304 int full) 1305 { 1306 pte_t pte; 1307 if (full) { 1308 /* 1309 * Full address destruction in progress; paravirt does not 1310 * care about updates and native needs no locking 1311 */ 1312 pte = native_local_ptep_get_and_clear(ptep); 1313 page_table_check_pte_clear(mm, pte); 1314 } else { 1315 pte = ptep_get_and_clear(mm, addr, ptep); 1316 } 1317 return pte; 1318 } 1319 1320 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1321 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1322 unsigned long addr, pte_t *ptep) 1323 { 1324 /* 1325 * Avoid accidentally creating shadow stack PTEs 1326 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with 1327 * the hardware setting Dirty=1. 1328 */ 1329 pte_t old_pte, new_pte; 1330 1331 old_pte = READ_ONCE(*ptep); 1332 do { 1333 new_pte = pte_wrprotect(old_pte); 1334 } while (!try_cmpxchg((long *)&ptep->pte, (long *)&old_pte, *(long *)&new_pte)); 1335 } 1336 1337 #define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0) 1338 1339 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1340 1341 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1342 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1343 unsigned long address, pmd_t *pmdp, 1344 pmd_t entry, int dirty); 1345 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1346 unsigned long address, pud_t *pudp, 1347 pud_t entry, int dirty); 1348 1349 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1350 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1351 unsigned long addr, pmd_t *pmdp); 1352 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1353 unsigned long addr, pud_t *pudp); 1354 1355 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1356 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1357 unsigned long address, pmd_t *pmdp); 1358 1359 1360 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1361 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1362 pmd_t *pmdp) 1363 { 1364 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1365 1366 page_table_check_pmd_clear(mm, pmd); 1367 1368 return pmd; 1369 } 1370 1371 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1372 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1373 unsigned long addr, pud_t *pudp) 1374 { 1375 pud_t pud = native_pudp_get_and_clear(pudp); 1376 1377 page_table_check_pud_clear(mm, pud); 1378 1379 return pud; 1380 } 1381 1382 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1383 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1384 unsigned long addr, pmd_t *pmdp) 1385 { 1386 /* 1387 * Avoid accidentally creating shadow stack PTEs 1388 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with 1389 * the hardware setting Dirty=1. 1390 */ 1391 pmd_t old_pmd, new_pmd; 1392 1393 old_pmd = READ_ONCE(*pmdp); 1394 do { 1395 new_pmd = pmd_wrprotect(old_pmd); 1396 } while (!try_cmpxchg((long *)pmdp, (long *)&old_pmd, *(long *)&new_pmd)); 1397 } 1398 1399 #ifndef pmdp_establish 1400 #define pmdp_establish pmdp_establish 1401 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1402 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1403 { 1404 page_table_check_pmd_set(vma->vm_mm, pmdp, pmd); 1405 if (IS_ENABLED(CONFIG_SMP)) { 1406 return xchg(pmdp, pmd); 1407 } else { 1408 pmd_t old = *pmdp; 1409 WRITE_ONCE(*pmdp, pmd); 1410 return old; 1411 } 1412 } 1413 #endif 1414 1415 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 1416 static inline pud_t pudp_establish(struct vm_area_struct *vma, 1417 unsigned long address, pud_t *pudp, pud_t pud) 1418 { 1419 page_table_check_pud_set(vma->vm_mm, pudp, pud); 1420 if (IS_ENABLED(CONFIG_SMP)) { 1421 return xchg(pudp, pud); 1422 } else { 1423 pud_t old = *pudp; 1424 WRITE_ONCE(*pudp, pud); 1425 return old; 1426 } 1427 } 1428 #endif 1429 1430 #define __HAVE_ARCH_PMDP_INVALIDATE_AD 1431 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 1432 unsigned long address, pmd_t *pmdp); 1433 1434 pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address, 1435 pud_t *pudp); 1436 1437 /* 1438 * Page table pages are page-aligned. The lower half of the top 1439 * level is used for userspace and the top half for the kernel. 1440 * 1441 * Returns true for parts of the PGD that map userspace and 1442 * false for the parts that map the kernel. 1443 */ 1444 static inline bool pgdp_maps_userspace(void *__ptr) 1445 { 1446 unsigned long ptr = (unsigned long)__ptr; 1447 1448 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1449 } 1450 1451 #define pgd_leaf pgd_leaf 1452 static inline bool pgd_leaf(pgd_t pgd) { return false; } 1453 1454 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 1455 /* 1456 * All top-level MITIGATION_PAGE_TABLE_ISOLATION page tables are order-1 pages 1457 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1458 * the user one is in the last 4k. To switch between them, you 1459 * just need to flip the 12th bit in their addresses. 1460 */ 1461 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1462 1463 /* 1464 * This generates better code than the inline assembly in 1465 * __set_bit(). 1466 */ 1467 static inline void *ptr_set_bit(void *ptr, int bit) 1468 { 1469 unsigned long __ptr = (unsigned long)ptr; 1470 1471 __ptr |= BIT(bit); 1472 return (void *)__ptr; 1473 } 1474 static inline void *ptr_clear_bit(void *ptr, int bit) 1475 { 1476 unsigned long __ptr = (unsigned long)ptr; 1477 1478 __ptr &= ~BIT(bit); 1479 return (void *)__ptr; 1480 } 1481 1482 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1483 { 1484 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1485 } 1486 1487 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1488 { 1489 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1490 } 1491 1492 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1493 { 1494 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1495 } 1496 1497 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1498 { 1499 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1500 } 1501 #endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 1502 1503 /* 1504 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1505 * 1506 * dst - pointer to pgd range anywhere on a pgd page 1507 * src - "" 1508 * count - the number of pgds to copy. 1509 * 1510 * dst and src can be on the same page, but the range must not overlap, 1511 * and must not cross a page boundary. 1512 */ 1513 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1514 { 1515 memcpy(dst, src, count * sizeof(pgd_t)); 1516 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 1517 if (!static_cpu_has(X86_FEATURE_PTI)) 1518 return; 1519 /* Clone the user space pgd as well */ 1520 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1521 count * sizeof(pgd_t)); 1522 #endif 1523 } 1524 1525 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1526 static inline int page_level_shift(enum pg_level level) 1527 { 1528 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1529 } 1530 static inline unsigned long page_level_size(enum pg_level level) 1531 { 1532 return 1UL << page_level_shift(level); 1533 } 1534 static inline unsigned long page_level_mask(enum pg_level level) 1535 { 1536 return ~(page_level_size(level) - 1); 1537 } 1538 1539 /* 1540 * The x86 doesn't have any external MMU info: the kernel page 1541 * tables contain all the necessary information. 1542 */ 1543 static inline void update_mmu_cache(struct vm_area_struct *vma, 1544 unsigned long addr, pte_t *ptep) 1545 { 1546 } 1547 static inline void update_mmu_cache_range(struct vm_fault *vmf, 1548 struct vm_area_struct *vma, unsigned long addr, 1549 pte_t *ptep, unsigned int nr) 1550 { 1551 } 1552 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1553 unsigned long addr, pmd_t *pmd) 1554 { 1555 } 1556 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1557 unsigned long addr, pud_t *pud) 1558 { 1559 } 1560 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1561 { 1562 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE); 1563 } 1564 1565 static inline int pte_swp_exclusive(pte_t pte) 1566 { 1567 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE; 1568 } 1569 1570 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1571 { 1572 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE); 1573 } 1574 1575 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1576 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1577 { 1578 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1579 } 1580 1581 static inline int pte_swp_soft_dirty(pte_t pte) 1582 { 1583 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1584 } 1585 1586 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1587 { 1588 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1589 } 1590 1591 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1592 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1593 { 1594 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1595 } 1596 1597 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1598 { 1599 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1600 } 1601 1602 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1603 { 1604 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1605 } 1606 #endif 1607 #endif 1608 1609 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1610 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1611 { 1612 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1613 } 1614 1615 static inline int pte_swp_uffd_wp(pte_t pte) 1616 { 1617 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1618 } 1619 1620 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1621 { 1622 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1623 } 1624 1625 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1626 { 1627 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1628 } 1629 1630 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1631 { 1632 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1633 } 1634 1635 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1636 { 1637 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1638 } 1639 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1640 1641 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1642 { 1643 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1644 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1645 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1646 #else 1647 return 0; 1648 #endif 1649 } 1650 1651 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1652 { 1653 u32 pkru = read_pkru(); 1654 1655 if (!__pkru_allows_read(pkru, pkey)) 1656 return false; 1657 if (write && !__pkru_allows_write(pkru, pkey)) 1658 return false; 1659 1660 return true; 1661 } 1662 1663 /* 1664 * 'pteval' can come from a PTE, PMD or PUD. We only check 1665 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1666 * same value on all 3 types. 1667 */ 1668 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1669 { 1670 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1671 1672 /* 1673 * Write=0,Dirty=1 PTEs are shadow stack, which the kernel 1674 * shouldn't generally allow access to, but since they 1675 * are already Write=0, the below logic covers both cases. 1676 */ 1677 if (write) 1678 need_pte_bits |= _PAGE_RW; 1679 1680 if ((pteval & need_pte_bits) != need_pte_bits) 1681 return 0; 1682 1683 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1684 } 1685 1686 #define pte_access_permitted pte_access_permitted 1687 static inline bool pte_access_permitted(pte_t pte, bool write) 1688 { 1689 return __pte_access_permitted(pte_val(pte), write); 1690 } 1691 1692 #define pmd_access_permitted pmd_access_permitted 1693 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1694 { 1695 return __pte_access_permitted(pmd_val(pmd), write); 1696 } 1697 1698 #define pud_access_permitted pud_access_permitted 1699 static inline bool pud_access_permitted(pud_t pud, bool write) 1700 { 1701 return __pte_access_permitted(pud_val(pud), write); 1702 } 1703 1704 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1705 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1706 1707 static inline bool arch_has_pfn_modify_check(void) 1708 { 1709 return boot_cpu_has_bug(X86_BUG_L1TF); 1710 } 1711 1712 #define arch_check_zapped_pte arch_check_zapped_pte 1713 void arch_check_zapped_pte(struct vm_area_struct *vma, pte_t pte); 1714 1715 #define arch_check_zapped_pmd arch_check_zapped_pmd 1716 void arch_check_zapped_pmd(struct vm_area_struct *vma, pmd_t pmd); 1717 1718 #define arch_check_zapped_pud arch_check_zapped_pud 1719 void arch_check_zapped_pud(struct vm_area_struct *vma, pud_t pud); 1720 1721 #ifdef CONFIG_XEN_PV 1722 #define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young 1723 static inline bool arch_has_hw_nonleaf_pmd_young(void) 1724 { 1725 return !cpu_feature_enabled(X86_FEATURE_XENPV); 1726 } 1727 #endif 1728 1729 #ifdef CONFIG_PAGE_TABLE_CHECK 1730 static inline bool pte_user_accessible_page(pte_t pte) 1731 { 1732 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER); 1733 } 1734 1735 static inline bool pmd_user_accessible_page(pmd_t pmd) 1736 { 1737 return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER); 1738 } 1739 1740 static inline bool pud_user_accessible_page(pud_t pud) 1741 { 1742 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER); 1743 } 1744 #endif 1745 1746 #ifdef CONFIG_X86_SGX 1747 int arch_memory_failure(unsigned long pfn, int flags); 1748 #define arch_memory_failure arch_memory_failure 1749 1750 bool arch_is_platform_page(u64 paddr); 1751 #define arch_is_platform_page arch_is_platform_page 1752 #endif 1753 1754 #endif /* __ASSEMBLY__ */ 1755 1756 #endif /* _ASM_X86_PGTABLE_H */ 1757