1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 /* 19 * Macros to add or remove encryption attribute 20 */ 21 #define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot))) 22 #define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot))) 23 24 #ifndef __ASSEMBLY__ 25 #include <linux/spinlock.h> 26 #include <asm/x86_init.h> 27 #include <asm/pkru.h> 28 #include <asm/fpu/api.h> 29 #include <asm-generic/pgtable_uffd.h> 30 31 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 32 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 33 34 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 35 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 36 bool user); 37 void ptdump_walk_pgd_level_checkwx(void); 38 void ptdump_walk_user_pgd_level_checkwx(void); 39 40 #ifdef CONFIG_DEBUG_WX 41 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 42 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 43 #else 44 #define debug_checkwx() do { } while (0) 45 #define debug_checkwx_user() do { } while (0) 46 #endif 47 48 /* 49 * ZERO_PAGE is a global shared page that is always zero: used 50 * for zero-mapped memory areas etc.. 51 */ 52 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 53 __visible; 54 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 55 56 extern spinlock_t pgd_lock; 57 extern struct list_head pgd_list; 58 59 extern struct mm_struct *pgd_page_get_mm(struct page *page); 60 61 extern pmdval_t early_pmd_flags; 62 63 #ifdef CONFIG_PARAVIRT_XXL 64 #include <asm/paravirt.h> 65 #else /* !CONFIG_PARAVIRT_XXL */ 66 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 67 68 #define set_pte_atomic(ptep, pte) \ 69 native_set_pte_atomic(ptep, pte) 70 71 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 72 73 #ifndef __PAGETABLE_P4D_FOLDED 74 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 75 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 76 #endif 77 78 #ifndef set_p4d 79 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 80 #endif 81 82 #ifndef __PAGETABLE_PUD_FOLDED 83 #define p4d_clear(p4d) native_p4d_clear(p4d) 84 #endif 85 86 #ifndef set_pud 87 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 88 #endif 89 90 #ifndef __PAGETABLE_PUD_FOLDED 91 #define pud_clear(pud) native_pud_clear(pud) 92 #endif 93 94 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 95 #define pmd_clear(pmd) native_pmd_clear(pmd) 96 97 #define pgd_val(x) native_pgd_val(x) 98 #define __pgd(x) native_make_pgd(x) 99 100 #ifndef __PAGETABLE_P4D_FOLDED 101 #define p4d_val(x) native_p4d_val(x) 102 #define __p4d(x) native_make_p4d(x) 103 #endif 104 105 #ifndef __PAGETABLE_PUD_FOLDED 106 #define pud_val(x) native_pud_val(x) 107 #define __pud(x) native_make_pud(x) 108 #endif 109 110 #ifndef __PAGETABLE_PMD_FOLDED 111 #define pmd_val(x) native_pmd_val(x) 112 #define __pmd(x) native_make_pmd(x) 113 #endif 114 115 #define pte_val(x) native_pte_val(x) 116 #define __pte(x) native_make_pte(x) 117 118 #define arch_end_context_switch(prev) do {} while(0) 119 #endif /* CONFIG_PARAVIRT_XXL */ 120 121 /* 122 * The following only work if pte_present() is true. 123 * Undefined behaviour if not.. 124 */ 125 static inline int pte_dirty(pte_t pte) 126 { 127 return pte_flags(pte) & _PAGE_DIRTY; 128 } 129 130 static inline int pte_young(pte_t pte) 131 { 132 return pte_flags(pte) & _PAGE_ACCESSED; 133 } 134 135 static inline int pmd_dirty(pmd_t pmd) 136 { 137 return pmd_flags(pmd) & _PAGE_DIRTY; 138 } 139 140 static inline int pmd_young(pmd_t pmd) 141 { 142 return pmd_flags(pmd) & _PAGE_ACCESSED; 143 } 144 145 static inline int pud_dirty(pud_t pud) 146 { 147 return pud_flags(pud) & _PAGE_DIRTY; 148 } 149 150 static inline int pud_young(pud_t pud) 151 { 152 return pud_flags(pud) & _PAGE_ACCESSED; 153 } 154 155 static inline int pte_write(pte_t pte) 156 { 157 return pte_flags(pte) & _PAGE_RW; 158 } 159 160 static inline int pte_huge(pte_t pte) 161 { 162 return pte_flags(pte) & _PAGE_PSE; 163 } 164 165 static inline int pte_global(pte_t pte) 166 { 167 return pte_flags(pte) & _PAGE_GLOBAL; 168 } 169 170 static inline int pte_exec(pte_t pte) 171 { 172 return !(pte_flags(pte) & _PAGE_NX); 173 } 174 175 static inline int pte_special(pte_t pte) 176 { 177 return pte_flags(pte) & _PAGE_SPECIAL; 178 } 179 180 /* Entries that were set to PROT_NONE are inverted */ 181 182 static inline u64 protnone_mask(u64 val); 183 184 static inline unsigned long pte_pfn(pte_t pte) 185 { 186 phys_addr_t pfn = pte_val(pte); 187 pfn ^= protnone_mask(pfn); 188 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 189 } 190 191 static inline unsigned long pmd_pfn(pmd_t pmd) 192 { 193 phys_addr_t pfn = pmd_val(pmd); 194 pfn ^= protnone_mask(pfn); 195 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 196 } 197 198 static inline unsigned long pud_pfn(pud_t pud) 199 { 200 phys_addr_t pfn = pud_val(pud); 201 pfn ^= protnone_mask(pfn); 202 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 203 } 204 205 static inline unsigned long p4d_pfn(p4d_t p4d) 206 { 207 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 208 } 209 210 static inline unsigned long pgd_pfn(pgd_t pgd) 211 { 212 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 213 } 214 215 #define p4d_leaf p4d_large 216 static inline int p4d_large(p4d_t p4d) 217 { 218 /* No 512 GiB pages yet */ 219 return 0; 220 } 221 222 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 223 224 #define pmd_leaf pmd_large 225 static inline int pmd_large(pmd_t pte) 226 { 227 return pmd_flags(pte) & _PAGE_PSE; 228 } 229 230 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 231 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */ 232 static inline int pmd_trans_huge(pmd_t pmd) 233 { 234 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 235 } 236 237 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 238 static inline int pud_trans_huge(pud_t pud) 239 { 240 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 241 } 242 #endif 243 244 #define has_transparent_hugepage has_transparent_hugepage 245 static inline int has_transparent_hugepage(void) 246 { 247 return boot_cpu_has(X86_FEATURE_PSE); 248 } 249 250 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 251 static inline int pmd_devmap(pmd_t pmd) 252 { 253 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 254 } 255 256 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 257 static inline int pud_devmap(pud_t pud) 258 { 259 return !!(pud_val(pud) & _PAGE_DEVMAP); 260 } 261 #else 262 static inline int pud_devmap(pud_t pud) 263 { 264 return 0; 265 } 266 #endif 267 268 static inline int pgd_devmap(pgd_t pgd) 269 { 270 return 0; 271 } 272 #endif 273 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 274 275 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 276 { 277 pteval_t v = native_pte_val(pte); 278 279 return native_make_pte(v | set); 280 } 281 282 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 283 { 284 pteval_t v = native_pte_val(pte); 285 286 return native_make_pte(v & ~clear); 287 } 288 289 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 290 static inline int pte_uffd_wp(pte_t pte) 291 { 292 return pte_flags(pte) & _PAGE_UFFD_WP; 293 } 294 295 static inline pte_t pte_mkuffd_wp(pte_t pte) 296 { 297 return pte_set_flags(pte, _PAGE_UFFD_WP); 298 } 299 300 static inline pte_t pte_clear_uffd_wp(pte_t pte) 301 { 302 return pte_clear_flags(pte, _PAGE_UFFD_WP); 303 } 304 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 305 306 static inline pte_t pte_mkclean(pte_t pte) 307 { 308 return pte_clear_flags(pte, _PAGE_DIRTY); 309 } 310 311 static inline pte_t pte_mkold(pte_t pte) 312 { 313 return pte_clear_flags(pte, _PAGE_ACCESSED); 314 } 315 316 static inline pte_t pte_wrprotect(pte_t pte) 317 { 318 return pte_clear_flags(pte, _PAGE_RW); 319 } 320 321 static inline pte_t pte_mkexec(pte_t pte) 322 { 323 return pte_clear_flags(pte, _PAGE_NX); 324 } 325 326 static inline pte_t pte_mkdirty(pte_t pte) 327 { 328 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 329 } 330 331 static inline pte_t pte_mkyoung(pte_t pte) 332 { 333 return pte_set_flags(pte, _PAGE_ACCESSED); 334 } 335 336 static inline pte_t pte_mkwrite(pte_t pte) 337 { 338 return pte_set_flags(pte, _PAGE_RW); 339 } 340 341 static inline pte_t pte_mkhuge(pte_t pte) 342 { 343 return pte_set_flags(pte, _PAGE_PSE); 344 } 345 346 static inline pte_t pte_clrhuge(pte_t pte) 347 { 348 return pte_clear_flags(pte, _PAGE_PSE); 349 } 350 351 static inline pte_t pte_mkglobal(pte_t pte) 352 { 353 return pte_set_flags(pte, _PAGE_GLOBAL); 354 } 355 356 static inline pte_t pte_clrglobal(pte_t pte) 357 { 358 return pte_clear_flags(pte, _PAGE_GLOBAL); 359 } 360 361 static inline pte_t pte_mkspecial(pte_t pte) 362 { 363 return pte_set_flags(pte, _PAGE_SPECIAL); 364 } 365 366 static inline pte_t pte_mkdevmap(pte_t pte) 367 { 368 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 369 } 370 371 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 372 { 373 pmdval_t v = native_pmd_val(pmd); 374 375 return native_make_pmd(v | set); 376 } 377 378 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 379 { 380 pmdval_t v = native_pmd_val(pmd); 381 382 return native_make_pmd(v & ~clear); 383 } 384 385 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 386 static inline int pmd_uffd_wp(pmd_t pmd) 387 { 388 return pmd_flags(pmd) & _PAGE_UFFD_WP; 389 } 390 391 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 392 { 393 return pmd_set_flags(pmd, _PAGE_UFFD_WP); 394 } 395 396 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 397 { 398 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 399 } 400 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 401 402 static inline pmd_t pmd_mkold(pmd_t pmd) 403 { 404 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 405 } 406 407 static inline pmd_t pmd_mkclean(pmd_t pmd) 408 { 409 return pmd_clear_flags(pmd, _PAGE_DIRTY); 410 } 411 412 static inline pmd_t pmd_wrprotect(pmd_t pmd) 413 { 414 return pmd_clear_flags(pmd, _PAGE_RW); 415 } 416 417 static inline pmd_t pmd_mkdirty(pmd_t pmd) 418 { 419 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 420 } 421 422 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 423 { 424 return pmd_set_flags(pmd, _PAGE_DEVMAP); 425 } 426 427 static inline pmd_t pmd_mkhuge(pmd_t pmd) 428 { 429 return pmd_set_flags(pmd, _PAGE_PSE); 430 } 431 432 static inline pmd_t pmd_mkyoung(pmd_t pmd) 433 { 434 return pmd_set_flags(pmd, _PAGE_ACCESSED); 435 } 436 437 static inline pmd_t pmd_mkwrite(pmd_t pmd) 438 { 439 return pmd_set_flags(pmd, _PAGE_RW); 440 } 441 442 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 443 { 444 pudval_t v = native_pud_val(pud); 445 446 return native_make_pud(v | set); 447 } 448 449 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 450 { 451 pudval_t v = native_pud_val(pud); 452 453 return native_make_pud(v & ~clear); 454 } 455 456 static inline pud_t pud_mkold(pud_t pud) 457 { 458 return pud_clear_flags(pud, _PAGE_ACCESSED); 459 } 460 461 static inline pud_t pud_mkclean(pud_t pud) 462 { 463 return pud_clear_flags(pud, _PAGE_DIRTY); 464 } 465 466 static inline pud_t pud_wrprotect(pud_t pud) 467 { 468 return pud_clear_flags(pud, _PAGE_RW); 469 } 470 471 static inline pud_t pud_mkdirty(pud_t pud) 472 { 473 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 474 } 475 476 static inline pud_t pud_mkdevmap(pud_t pud) 477 { 478 return pud_set_flags(pud, _PAGE_DEVMAP); 479 } 480 481 static inline pud_t pud_mkhuge(pud_t pud) 482 { 483 return pud_set_flags(pud, _PAGE_PSE); 484 } 485 486 static inline pud_t pud_mkyoung(pud_t pud) 487 { 488 return pud_set_flags(pud, _PAGE_ACCESSED); 489 } 490 491 static inline pud_t pud_mkwrite(pud_t pud) 492 { 493 return pud_set_flags(pud, _PAGE_RW); 494 } 495 496 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 497 static inline int pte_soft_dirty(pte_t pte) 498 { 499 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 500 } 501 502 static inline int pmd_soft_dirty(pmd_t pmd) 503 { 504 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 505 } 506 507 static inline int pud_soft_dirty(pud_t pud) 508 { 509 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 510 } 511 512 static inline pte_t pte_mksoft_dirty(pte_t pte) 513 { 514 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 515 } 516 517 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 518 { 519 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 520 } 521 522 static inline pud_t pud_mksoft_dirty(pud_t pud) 523 { 524 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 525 } 526 527 static inline pte_t pte_clear_soft_dirty(pte_t pte) 528 { 529 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 530 } 531 532 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 533 { 534 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 535 } 536 537 static inline pud_t pud_clear_soft_dirty(pud_t pud) 538 { 539 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 540 } 541 542 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 543 544 /* 545 * Mask out unsupported bits in a present pgprot. Non-present pgprots 546 * can use those bits for other purposes, so leave them be. 547 */ 548 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 549 { 550 pgprotval_t protval = pgprot_val(pgprot); 551 552 if (protval & _PAGE_PRESENT) 553 protval &= __supported_pte_mask; 554 555 return protval; 556 } 557 558 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 559 { 560 pgprotval_t massaged_val = massage_pgprot(pgprot); 561 562 /* mmdebug.h can not be included here because of dependencies */ 563 #ifdef CONFIG_DEBUG_VM 564 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 565 "attempted to set unsupported pgprot: %016llx " 566 "bits: %016llx supported: %016llx\n", 567 (u64)pgprot_val(pgprot), 568 (u64)pgprot_val(pgprot) ^ massaged_val, 569 (u64)__supported_pte_mask); 570 #endif 571 572 return massaged_val; 573 } 574 575 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 576 { 577 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 578 pfn ^= protnone_mask(pgprot_val(pgprot)); 579 pfn &= PTE_PFN_MASK; 580 return __pte(pfn | check_pgprot(pgprot)); 581 } 582 583 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 584 { 585 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 586 pfn ^= protnone_mask(pgprot_val(pgprot)); 587 pfn &= PHYSICAL_PMD_PAGE_MASK; 588 return __pmd(pfn | check_pgprot(pgprot)); 589 } 590 591 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 592 { 593 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 594 pfn ^= protnone_mask(pgprot_val(pgprot)); 595 pfn &= PHYSICAL_PUD_PAGE_MASK; 596 return __pud(pfn | check_pgprot(pgprot)); 597 } 598 599 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 600 { 601 return pfn_pmd(pmd_pfn(pmd), 602 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 603 } 604 605 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 606 607 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 608 { 609 pteval_t val = pte_val(pte), oldval = val; 610 611 /* 612 * Chop off the NX bit (if present), and add the NX portion of 613 * the newprot (if present): 614 */ 615 val &= _PAGE_CHG_MASK; 616 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 617 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 618 return __pte(val); 619 } 620 621 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 622 { 623 pmdval_t val = pmd_val(pmd), oldval = val; 624 625 val &= _HPAGE_CHG_MASK; 626 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 627 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 628 return __pmd(val); 629 } 630 631 /* 632 * mprotect needs to preserve PAT and encryption bits when updating 633 * vm_page_prot 634 */ 635 #define pgprot_modify pgprot_modify 636 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 637 { 638 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 639 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 640 return __pgprot(preservebits | addbits); 641 } 642 643 #define pte_pgprot(x) __pgprot(pte_flags(x)) 644 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 645 #define pud_pgprot(x) __pgprot(pud_flags(x)) 646 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 647 648 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 649 650 static inline pgprot_t arch_filter_pgprot(pgprot_t prot) 651 { 652 return canon_pgprot(prot); 653 } 654 655 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 656 enum page_cache_mode pcm, 657 enum page_cache_mode new_pcm) 658 { 659 /* 660 * PAT type is always WB for untracked ranges, so no need to check. 661 */ 662 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 663 return 1; 664 665 /* 666 * Certain new memtypes are not allowed with certain 667 * requested memtype: 668 * - request is uncached, return cannot be write-back 669 * - request is write-combine, return cannot be write-back 670 * - request is write-through, return cannot be write-back 671 * - request is write-through, return cannot be write-combine 672 */ 673 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 674 new_pcm == _PAGE_CACHE_MODE_WB) || 675 (pcm == _PAGE_CACHE_MODE_WC && 676 new_pcm == _PAGE_CACHE_MODE_WB) || 677 (pcm == _PAGE_CACHE_MODE_WT && 678 new_pcm == _PAGE_CACHE_MODE_WB) || 679 (pcm == _PAGE_CACHE_MODE_WT && 680 new_pcm == _PAGE_CACHE_MODE_WC)) { 681 return 0; 682 } 683 684 return 1; 685 } 686 687 pmd_t *populate_extra_pmd(unsigned long vaddr); 688 pte_t *populate_extra_pte(unsigned long vaddr); 689 690 #ifdef CONFIG_PAGE_TABLE_ISOLATION 691 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 692 693 /* 694 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 695 * Populates the user and returns the resulting PGD that must be set in 696 * the kernel copy of the page tables. 697 */ 698 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 699 { 700 if (!static_cpu_has(X86_FEATURE_PTI)) 701 return pgd; 702 return __pti_set_user_pgtbl(pgdp, pgd); 703 } 704 #else /* CONFIG_PAGE_TABLE_ISOLATION */ 705 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 706 { 707 return pgd; 708 } 709 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 710 711 #endif /* __ASSEMBLY__ */ 712 713 714 #ifdef CONFIG_X86_32 715 # include <asm/pgtable_32.h> 716 #else 717 # include <asm/pgtable_64.h> 718 #endif 719 720 #ifndef __ASSEMBLY__ 721 #include <linux/mm_types.h> 722 #include <linux/mmdebug.h> 723 #include <linux/log2.h> 724 #include <asm/fixmap.h> 725 726 static inline int pte_none(pte_t pte) 727 { 728 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 729 } 730 731 #define __HAVE_ARCH_PTE_SAME 732 static inline int pte_same(pte_t a, pte_t b) 733 { 734 return a.pte == b.pte; 735 } 736 737 static inline int pte_present(pte_t a) 738 { 739 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 740 } 741 742 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 743 static inline int pte_devmap(pte_t a) 744 { 745 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 746 } 747 #endif 748 749 #define pte_accessible pte_accessible 750 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 751 { 752 if (pte_flags(a) & _PAGE_PRESENT) 753 return true; 754 755 if ((pte_flags(a) & _PAGE_PROTNONE) && 756 mm_tlb_flush_pending(mm)) 757 return true; 758 759 return false; 760 } 761 762 static inline int pmd_present(pmd_t pmd) 763 { 764 /* 765 * Checking for _PAGE_PSE is needed too because 766 * split_huge_page will temporarily clear the present bit (but 767 * the _PAGE_PSE flag will remain set at all times while the 768 * _PAGE_PRESENT bit is clear). 769 */ 770 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 771 } 772 773 #ifdef CONFIG_NUMA_BALANCING 774 /* 775 * These work without NUMA balancing but the kernel does not care. See the 776 * comment in include/linux/pgtable.h 777 */ 778 static inline int pte_protnone(pte_t pte) 779 { 780 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 781 == _PAGE_PROTNONE; 782 } 783 784 static inline int pmd_protnone(pmd_t pmd) 785 { 786 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 787 == _PAGE_PROTNONE; 788 } 789 #endif /* CONFIG_NUMA_BALANCING */ 790 791 static inline int pmd_none(pmd_t pmd) 792 { 793 /* Only check low word on 32-bit platforms, since it might be 794 out of sync with upper half. */ 795 unsigned long val = native_pmd_val(pmd); 796 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 797 } 798 799 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 800 { 801 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 802 } 803 804 /* 805 * Currently stuck as a macro due to indirect forward reference to 806 * linux/mmzone.h's __section_mem_map_addr() definition: 807 */ 808 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 809 810 /* 811 * Conversion functions: convert a page and protection to a page entry, 812 * and a page entry and page directory to the page they refer to. 813 * 814 * (Currently stuck as a macro because of indirect forward reference 815 * to linux/mm.h:page_to_nid()) 816 */ 817 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 818 819 static inline int pmd_bad(pmd_t pmd) 820 { 821 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 822 } 823 824 static inline unsigned long pages_to_mb(unsigned long npg) 825 { 826 return npg >> (20 - PAGE_SHIFT); 827 } 828 829 #if CONFIG_PGTABLE_LEVELS > 2 830 static inline int pud_none(pud_t pud) 831 { 832 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 833 } 834 835 static inline int pud_present(pud_t pud) 836 { 837 return pud_flags(pud) & _PAGE_PRESENT; 838 } 839 840 static inline pmd_t *pud_pgtable(pud_t pud) 841 { 842 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 843 } 844 845 /* 846 * Currently stuck as a macro due to indirect forward reference to 847 * linux/mmzone.h's __section_mem_map_addr() definition: 848 */ 849 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 850 851 #define pud_leaf pud_large 852 static inline int pud_large(pud_t pud) 853 { 854 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 855 (_PAGE_PSE | _PAGE_PRESENT); 856 } 857 858 static inline int pud_bad(pud_t pud) 859 { 860 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 861 } 862 #else 863 #define pud_leaf pud_large 864 static inline int pud_large(pud_t pud) 865 { 866 return 0; 867 } 868 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 869 870 #if CONFIG_PGTABLE_LEVELS > 3 871 static inline int p4d_none(p4d_t p4d) 872 { 873 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 874 } 875 876 static inline int p4d_present(p4d_t p4d) 877 { 878 return p4d_flags(p4d) & _PAGE_PRESENT; 879 } 880 881 static inline pud_t *p4d_pgtable(p4d_t p4d) 882 { 883 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 884 } 885 886 /* 887 * Currently stuck as a macro due to indirect forward reference to 888 * linux/mmzone.h's __section_mem_map_addr() definition: 889 */ 890 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 891 892 static inline int p4d_bad(p4d_t p4d) 893 { 894 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 895 896 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 897 ignore_flags |= _PAGE_NX; 898 899 return (p4d_flags(p4d) & ~ignore_flags) != 0; 900 } 901 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 902 903 static inline unsigned long p4d_index(unsigned long address) 904 { 905 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 906 } 907 908 #if CONFIG_PGTABLE_LEVELS > 4 909 static inline int pgd_present(pgd_t pgd) 910 { 911 if (!pgtable_l5_enabled()) 912 return 1; 913 return pgd_flags(pgd) & _PAGE_PRESENT; 914 } 915 916 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 917 { 918 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 919 } 920 921 /* 922 * Currently stuck as a macro due to indirect forward reference to 923 * linux/mmzone.h's __section_mem_map_addr() definition: 924 */ 925 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 926 927 /* to find an entry in a page-table-directory. */ 928 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 929 { 930 if (!pgtable_l5_enabled()) 931 return (p4d_t *)pgd; 932 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 933 } 934 935 static inline int pgd_bad(pgd_t pgd) 936 { 937 unsigned long ignore_flags = _PAGE_USER; 938 939 if (!pgtable_l5_enabled()) 940 return 0; 941 942 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 943 ignore_flags |= _PAGE_NX; 944 945 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 946 } 947 948 static inline int pgd_none(pgd_t pgd) 949 { 950 if (!pgtable_l5_enabled()) 951 return 0; 952 /* 953 * There is no need to do a workaround for the KNL stray 954 * A/D bit erratum here. PGDs only point to page tables 955 * except on 32-bit non-PAE which is not supported on 956 * KNL. 957 */ 958 return !native_pgd_val(pgd); 959 } 960 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 961 962 #endif /* __ASSEMBLY__ */ 963 964 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 965 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 966 967 #ifndef __ASSEMBLY__ 968 969 extern int direct_gbpages; 970 void init_mem_mapping(void); 971 void early_alloc_pgt_buf(void); 972 extern void memblock_find_dma_reserve(void); 973 void __init poking_init(void); 974 unsigned long init_memory_mapping(unsigned long start, 975 unsigned long end, pgprot_t prot); 976 977 #ifdef CONFIG_X86_64 978 extern pgd_t trampoline_pgd_entry; 979 #endif 980 981 /* local pte updates need not use xchg for locking */ 982 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 983 { 984 pte_t res = *ptep; 985 986 /* Pure native function needs no input for mm, addr */ 987 native_pte_clear(NULL, 0, ptep); 988 return res; 989 } 990 991 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 992 { 993 pmd_t res = *pmdp; 994 995 native_pmd_clear(pmdp); 996 return res; 997 } 998 999 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1000 { 1001 pud_t res = *pudp; 1002 1003 native_pud_clear(pudp); 1004 return res; 1005 } 1006 1007 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 1008 pte_t *ptep, pte_t pte) 1009 { 1010 set_pte(ptep, pte); 1011 } 1012 1013 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1014 pmd_t *pmdp, pmd_t pmd) 1015 { 1016 set_pmd(pmdp, pmd); 1017 } 1018 1019 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1020 pud_t *pudp, pud_t pud) 1021 { 1022 native_set_pud(pudp, pud); 1023 } 1024 1025 /* 1026 * We only update the dirty/accessed state if we set 1027 * the dirty bit by hand in the kernel, since the hardware 1028 * will do the accessed bit for us, and we don't want to 1029 * race with other CPU's that might be updating the dirty 1030 * bit at the same time. 1031 */ 1032 struct vm_area_struct; 1033 1034 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1035 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1036 unsigned long address, pte_t *ptep, 1037 pte_t entry, int dirty); 1038 1039 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1040 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1041 unsigned long addr, pte_t *ptep); 1042 1043 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1044 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1045 unsigned long address, pte_t *ptep); 1046 1047 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1048 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1049 pte_t *ptep) 1050 { 1051 pte_t pte = native_ptep_get_and_clear(ptep); 1052 return pte; 1053 } 1054 1055 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1056 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1057 unsigned long addr, pte_t *ptep, 1058 int full) 1059 { 1060 pte_t pte; 1061 if (full) { 1062 /* 1063 * Full address destruction in progress; paravirt does not 1064 * care about updates and native needs no locking 1065 */ 1066 pte = native_local_ptep_get_and_clear(ptep); 1067 } else { 1068 pte = ptep_get_and_clear(mm, addr, ptep); 1069 } 1070 return pte; 1071 } 1072 1073 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1074 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1075 unsigned long addr, pte_t *ptep) 1076 { 1077 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1078 } 1079 1080 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 1081 1082 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1083 1084 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1085 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1086 unsigned long address, pmd_t *pmdp, 1087 pmd_t entry, int dirty); 1088 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1089 unsigned long address, pud_t *pudp, 1090 pud_t entry, int dirty); 1091 1092 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1093 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1094 unsigned long addr, pmd_t *pmdp); 1095 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1096 unsigned long addr, pud_t *pudp); 1097 1098 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1099 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1100 unsigned long address, pmd_t *pmdp); 1101 1102 1103 #define pmd_write pmd_write 1104 static inline int pmd_write(pmd_t pmd) 1105 { 1106 return pmd_flags(pmd) & _PAGE_RW; 1107 } 1108 1109 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1110 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1111 pmd_t *pmdp) 1112 { 1113 return native_pmdp_get_and_clear(pmdp); 1114 } 1115 1116 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1117 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1118 unsigned long addr, pud_t *pudp) 1119 { 1120 return native_pudp_get_and_clear(pudp); 1121 } 1122 1123 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1124 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1125 unsigned long addr, pmd_t *pmdp) 1126 { 1127 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1128 } 1129 1130 #define pud_write pud_write 1131 static inline int pud_write(pud_t pud) 1132 { 1133 return pud_flags(pud) & _PAGE_RW; 1134 } 1135 1136 #ifndef pmdp_establish 1137 #define pmdp_establish pmdp_establish 1138 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1139 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1140 { 1141 if (IS_ENABLED(CONFIG_SMP)) { 1142 return xchg(pmdp, pmd); 1143 } else { 1144 pmd_t old = *pmdp; 1145 WRITE_ONCE(*pmdp, pmd); 1146 return old; 1147 } 1148 } 1149 #endif 1150 /* 1151 * Page table pages are page-aligned. The lower half of the top 1152 * level is used for userspace and the top half for the kernel. 1153 * 1154 * Returns true for parts of the PGD that map userspace and 1155 * false for the parts that map the kernel. 1156 */ 1157 static inline bool pgdp_maps_userspace(void *__ptr) 1158 { 1159 unsigned long ptr = (unsigned long)__ptr; 1160 1161 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1162 } 1163 1164 #define pgd_leaf pgd_large 1165 static inline int pgd_large(pgd_t pgd) { return 0; } 1166 1167 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1168 /* 1169 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1170 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1171 * the user one is in the last 4k. To switch between them, you 1172 * just need to flip the 12th bit in their addresses. 1173 */ 1174 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1175 1176 /* 1177 * This generates better code than the inline assembly in 1178 * __set_bit(). 1179 */ 1180 static inline void *ptr_set_bit(void *ptr, int bit) 1181 { 1182 unsigned long __ptr = (unsigned long)ptr; 1183 1184 __ptr |= BIT(bit); 1185 return (void *)__ptr; 1186 } 1187 static inline void *ptr_clear_bit(void *ptr, int bit) 1188 { 1189 unsigned long __ptr = (unsigned long)ptr; 1190 1191 __ptr &= ~BIT(bit); 1192 return (void *)__ptr; 1193 } 1194 1195 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1196 { 1197 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1198 } 1199 1200 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1201 { 1202 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1203 } 1204 1205 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1206 { 1207 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1208 } 1209 1210 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1211 { 1212 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1213 } 1214 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1215 1216 /* 1217 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1218 * 1219 * dst - pointer to pgd range anywhere on a pgd page 1220 * src - "" 1221 * count - the number of pgds to copy. 1222 * 1223 * dst and src can be on the same page, but the range must not overlap, 1224 * and must not cross a page boundary. 1225 */ 1226 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1227 { 1228 memcpy(dst, src, count * sizeof(pgd_t)); 1229 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1230 if (!static_cpu_has(X86_FEATURE_PTI)) 1231 return; 1232 /* Clone the user space pgd as well */ 1233 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1234 count * sizeof(pgd_t)); 1235 #endif 1236 } 1237 1238 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1239 static inline int page_level_shift(enum pg_level level) 1240 { 1241 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1242 } 1243 static inline unsigned long page_level_size(enum pg_level level) 1244 { 1245 return 1UL << page_level_shift(level); 1246 } 1247 static inline unsigned long page_level_mask(enum pg_level level) 1248 { 1249 return ~(page_level_size(level) - 1); 1250 } 1251 1252 /* 1253 * The x86 doesn't have any external MMU info: the kernel page 1254 * tables contain all the necessary information. 1255 */ 1256 static inline void update_mmu_cache(struct vm_area_struct *vma, 1257 unsigned long addr, pte_t *ptep) 1258 { 1259 } 1260 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1261 unsigned long addr, pmd_t *pmd) 1262 { 1263 } 1264 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1265 unsigned long addr, pud_t *pud) 1266 { 1267 } 1268 1269 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1270 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1271 { 1272 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1273 } 1274 1275 static inline int pte_swp_soft_dirty(pte_t pte) 1276 { 1277 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1278 } 1279 1280 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1281 { 1282 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1283 } 1284 1285 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1286 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1287 { 1288 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1289 } 1290 1291 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1292 { 1293 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1294 } 1295 1296 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1297 { 1298 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1299 } 1300 #endif 1301 #endif 1302 1303 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1304 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1305 { 1306 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1307 } 1308 1309 static inline int pte_swp_uffd_wp(pte_t pte) 1310 { 1311 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1312 } 1313 1314 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1315 { 1316 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1317 } 1318 1319 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1320 { 1321 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1322 } 1323 1324 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1325 { 1326 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1327 } 1328 1329 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1330 { 1331 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1332 } 1333 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1334 1335 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1336 { 1337 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1338 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1339 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1340 #else 1341 return 0; 1342 #endif 1343 } 1344 1345 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1346 { 1347 u32 pkru = read_pkru(); 1348 1349 if (!__pkru_allows_read(pkru, pkey)) 1350 return false; 1351 if (write && !__pkru_allows_write(pkru, pkey)) 1352 return false; 1353 1354 return true; 1355 } 1356 1357 /* 1358 * 'pteval' can come from a PTE, PMD or PUD. We only check 1359 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1360 * same value on all 3 types. 1361 */ 1362 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1363 { 1364 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1365 1366 if (write) 1367 need_pte_bits |= _PAGE_RW; 1368 1369 if ((pteval & need_pte_bits) != need_pte_bits) 1370 return 0; 1371 1372 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1373 } 1374 1375 #define pte_access_permitted pte_access_permitted 1376 static inline bool pte_access_permitted(pte_t pte, bool write) 1377 { 1378 return __pte_access_permitted(pte_val(pte), write); 1379 } 1380 1381 #define pmd_access_permitted pmd_access_permitted 1382 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1383 { 1384 return __pte_access_permitted(pmd_val(pmd), write); 1385 } 1386 1387 #define pud_access_permitted pud_access_permitted 1388 static inline bool pud_access_permitted(pud_t pud, bool write) 1389 { 1390 return __pte_access_permitted(pud_val(pud), write); 1391 } 1392 1393 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1394 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1395 1396 static inline bool arch_has_pfn_modify_check(void) 1397 { 1398 return boot_cpu_has_bug(X86_BUG_L1TF); 1399 } 1400 1401 #define arch_faults_on_old_pte arch_faults_on_old_pte 1402 static inline bool arch_faults_on_old_pte(void) 1403 { 1404 return false; 1405 } 1406 1407 #endif /* __ASSEMBLY__ */ 1408 1409 #endif /* _ASM_X86_PGTABLE_H */ 1410