1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 /* 19 * Macros to add or remove encryption attribute 20 */ 21 #define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot))) 22 #define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot))) 23 24 #ifndef __ASSEMBLY__ 25 #include <asm/x86_init.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 int __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); 31 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, pgd_t *pgd, bool user); 32 void ptdump_walk_pgd_level_checkwx(void); 33 void ptdump_walk_user_pgd_level_checkwx(void); 34 35 #ifdef CONFIG_DEBUG_WX 36 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 37 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 38 #else 39 #define debug_checkwx() do { } while (0) 40 #define debug_checkwx_user() do { } while (0) 41 #endif 42 43 /* 44 * ZERO_PAGE is a global shared page that is always zero: used 45 * for zero-mapped memory areas etc.. 46 */ 47 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 48 __visible; 49 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 50 51 extern spinlock_t pgd_lock; 52 extern struct list_head pgd_list; 53 54 extern struct mm_struct *pgd_page_get_mm(struct page *page); 55 56 extern pmdval_t early_pmd_flags; 57 58 #ifdef CONFIG_PARAVIRT 59 #include <asm/paravirt.h> 60 #else /* !CONFIG_PARAVIRT */ 61 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 62 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) 63 64 #define set_pte_atomic(ptep, pte) \ 65 native_set_pte_atomic(ptep, pte) 66 67 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 68 69 #ifndef __PAGETABLE_P4D_FOLDED 70 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 71 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 72 #endif 73 74 #ifndef set_p4d 75 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 76 #endif 77 78 #ifndef __PAGETABLE_PUD_FOLDED 79 #define p4d_clear(p4d) native_p4d_clear(p4d) 80 #endif 81 82 #ifndef set_pud 83 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 84 #endif 85 86 #ifndef __PAGETABLE_PUD_FOLDED 87 #define pud_clear(pud) native_pud_clear(pud) 88 #endif 89 90 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 91 #define pmd_clear(pmd) native_pmd_clear(pmd) 92 93 #define pgd_val(x) native_pgd_val(x) 94 #define __pgd(x) native_make_pgd(x) 95 96 #ifndef __PAGETABLE_P4D_FOLDED 97 #define p4d_val(x) native_p4d_val(x) 98 #define __p4d(x) native_make_p4d(x) 99 #endif 100 101 #ifndef __PAGETABLE_PUD_FOLDED 102 #define pud_val(x) native_pud_val(x) 103 #define __pud(x) native_make_pud(x) 104 #endif 105 106 #ifndef __PAGETABLE_PMD_FOLDED 107 #define pmd_val(x) native_pmd_val(x) 108 #define __pmd(x) native_make_pmd(x) 109 #endif 110 111 #define pte_val(x) native_pte_val(x) 112 #define __pte(x) native_make_pte(x) 113 114 #define arch_end_context_switch(prev) do {} while(0) 115 116 #endif /* CONFIG_PARAVIRT */ 117 118 /* 119 * The following only work if pte_present() is true. 120 * Undefined behaviour if not.. 121 */ 122 static inline int pte_dirty(pte_t pte) 123 { 124 return pte_flags(pte) & _PAGE_DIRTY; 125 } 126 127 128 static inline u32 read_pkru(void) 129 { 130 if (boot_cpu_has(X86_FEATURE_OSPKE)) 131 return __read_pkru(); 132 return 0; 133 } 134 135 static inline void write_pkru(u32 pkru) 136 { 137 if (boot_cpu_has(X86_FEATURE_OSPKE)) 138 __write_pkru(pkru); 139 } 140 141 static inline int pte_young(pte_t pte) 142 { 143 return pte_flags(pte) & _PAGE_ACCESSED; 144 } 145 146 static inline int pmd_dirty(pmd_t pmd) 147 { 148 return pmd_flags(pmd) & _PAGE_DIRTY; 149 } 150 151 static inline int pmd_young(pmd_t pmd) 152 { 153 return pmd_flags(pmd) & _PAGE_ACCESSED; 154 } 155 156 static inline int pud_dirty(pud_t pud) 157 { 158 return pud_flags(pud) & _PAGE_DIRTY; 159 } 160 161 static inline int pud_young(pud_t pud) 162 { 163 return pud_flags(pud) & _PAGE_ACCESSED; 164 } 165 166 static inline int pte_write(pte_t pte) 167 { 168 return pte_flags(pte) & _PAGE_RW; 169 } 170 171 static inline int pte_huge(pte_t pte) 172 { 173 return pte_flags(pte) & _PAGE_PSE; 174 } 175 176 static inline int pte_global(pte_t pte) 177 { 178 return pte_flags(pte) & _PAGE_GLOBAL; 179 } 180 181 static inline int pte_exec(pte_t pte) 182 { 183 return !(pte_flags(pte) & _PAGE_NX); 184 } 185 186 static inline int pte_special(pte_t pte) 187 { 188 return pte_flags(pte) & _PAGE_SPECIAL; 189 } 190 191 static inline unsigned long pte_pfn(pte_t pte) 192 { 193 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; 194 } 195 196 static inline unsigned long pmd_pfn(pmd_t pmd) 197 { 198 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 199 } 200 201 static inline unsigned long pud_pfn(pud_t pud) 202 { 203 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; 204 } 205 206 static inline unsigned long p4d_pfn(p4d_t p4d) 207 { 208 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 209 } 210 211 static inline unsigned long pgd_pfn(pgd_t pgd) 212 { 213 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 214 } 215 216 static inline int p4d_large(p4d_t p4d) 217 { 218 /* No 512 GiB pages yet */ 219 return 0; 220 } 221 222 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 223 224 static inline int pmd_large(pmd_t pte) 225 { 226 return pmd_flags(pte) & _PAGE_PSE; 227 } 228 229 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 230 static inline int pmd_trans_huge(pmd_t pmd) 231 { 232 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 233 } 234 235 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 236 static inline int pud_trans_huge(pud_t pud) 237 { 238 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 239 } 240 #endif 241 242 #define has_transparent_hugepage has_transparent_hugepage 243 static inline int has_transparent_hugepage(void) 244 { 245 return boot_cpu_has(X86_FEATURE_PSE); 246 } 247 248 #ifdef __HAVE_ARCH_PTE_DEVMAP 249 static inline int pmd_devmap(pmd_t pmd) 250 { 251 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 252 } 253 254 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 255 static inline int pud_devmap(pud_t pud) 256 { 257 return !!(pud_val(pud) & _PAGE_DEVMAP); 258 } 259 #else 260 static inline int pud_devmap(pud_t pud) 261 { 262 return 0; 263 } 264 #endif 265 266 static inline int pgd_devmap(pgd_t pgd) 267 { 268 return 0; 269 } 270 #endif 271 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 272 273 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 274 { 275 pteval_t v = native_pte_val(pte); 276 277 return native_make_pte(v | set); 278 } 279 280 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 281 { 282 pteval_t v = native_pte_val(pte); 283 284 return native_make_pte(v & ~clear); 285 } 286 287 static inline pte_t pte_mkclean(pte_t pte) 288 { 289 return pte_clear_flags(pte, _PAGE_DIRTY); 290 } 291 292 static inline pte_t pte_mkold(pte_t pte) 293 { 294 return pte_clear_flags(pte, _PAGE_ACCESSED); 295 } 296 297 static inline pte_t pte_wrprotect(pte_t pte) 298 { 299 return pte_clear_flags(pte, _PAGE_RW); 300 } 301 302 static inline pte_t pte_mkexec(pte_t pte) 303 { 304 return pte_clear_flags(pte, _PAGE_NX); 305 } 306 307 static inline pte_t pte_mkdirty(pte_t pte) 308 { 309 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 310 } 311 312 static inline pte_t pte_mkyoung(pte_t pte) 313 { 314 return pte_set_flags(pte, _PAGE_ACCESSED); 315 } 316 317 static inline pte_t pte_mkwrite(pte_t pte) 318 { 319 return pte_set_flags(pte, _PAGE_RW); 320 } 321 322 static inline pte_t pte_mkhuge(pte_t pte) 323 { 324 return pte_set_flags(pte, _PAGE_PSE); 325 } 326 327 static inline pte_t pte_clrhuge(pte_t pte) 328 { 329 return pte_clear_flags(pte, _PAGE_PSE); 330 } 331 332 static inline pte_t pte_mkglobal(pte_t pte) 333 { 334 return pte_set_flags(pte, _PAGE_GLOBAL); 335 } 336 337 static inline pte_t pte_clrglobal(pte_t pte) 338 { 339 return pte_clear_flags(pte, _PAGE_GLOBAL); 340 } 341 342 static inline pte_t pte_mkspecial(pte_t pte) 343 { 344 return pte_set_flags(pte, _PAGE_SPECIAL); 345 } 346 347 static inline pte_t pte_mkdevmap(pte_t pte) 348 { 349 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 350 } 351 352 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 353 { 354 pmdval_t v = native_pmd_val(pmd); 355 356 return native_make_pmd(v | set); 357 } 358 359 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 360 { 361 pmdval_t v = native_pmd_val(pmd); 362 363 return native_make_pmd(v & ~clear); 364 } 365 366 static inline pmd_t pmd_mkold(pmd_t pmd) 367 { 368 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 369 } 370 371 static inline pmd_t pmd_mkclean(pmd_t pmd) 372 { 373 return pmd_clear_flags(pmd, _PAGE_DIRTY); 374 } 375 376 static inline pmd_t pmd_wrprotect(pmd_t pmd) 377 { 378 return pmd_clear_flags(pmd, _PAGE_RW); 379 } 380 381 static inline pmd_t pmd_mkdirty(pmd_t pmd) 382 { 383 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 384 } 385 386 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 387 { 388 return pmd_set_flags(pmd, _PAGE_DEVMAP); 389 } 390 391 static inline pmd_t pmd_mkhuge(pmd_t pmd) 392 { 393 return pmd_set_flags(pmd, _PAGE_PSE); 394 } 395 396 static inline pmd_t pmd_mkyoung(pmd_t pmd) 397 { 398 return pmd_set_flags(pmd, _PAGE_ACCESSED); 399 } 400 401 static inline pmd_t pmd_mkwrite(pmd_t pmd) 402 { 403 return pmd_set_flags(pmd, _PAGE_RW); 404 } 405 406 static inline pmd_t pmd_mknotpresent(pmd_t pmd) 407 { 408 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); 409 } 410 411 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 412 { 413 pudval_t v = native_pud_val(pud); 414 415 return native_make_pud(v | set); 416 } 417 418 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 419 { 420 pudval_t v = native_pud_val(pud); 421 422 return native_make_pud(v & ~clear); 423 } 424 425 static inline pud_t pud_mkold(pud_t pud) 426 { 427 return pud_clear_flags(pud, _PAGE_ACCESSED); 428 } 429 430 static inline pud_t pud_mkclean(pud_t pud) 431 { 432 return pud_clear_flags(pud, _PAGE_DIRTY); 433 } 434 435 static inline pud_t pud_wrprotect(pud_t pud) 436 { 437 return pud_clear_flags(pud, _PAGE_RW); 438 } 439 440 static inline pud_t pud_mkdirty(pud_t pud) 441 { 442 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 443 } 444 445 static inline pud_t pud_mkdevmap(pud_t pud) 446 { 447 return pud_set_flags(pud, _PAGE_DEVMAP); 448 } 449 450 static inline pud_t pud_mkhuge(pud_t pud) 451 { 452 return pud_set_flags(pud, _PAGE_PSE); 453 } 454 455 static inline pud_t pud_mkyoung(pud_t pud) 456 { 457 return pud_set_flags(pud, _PAGE_ACCESSED); 458 } 459 460 static inline pud_t pud_mkwrite(pud_t pud) 461 { 462 return pud_set_flags(pud, _PAGE_RW); 463 } 464 465 static inline pud_t pud_mknotpresent(pud_t pud) 466 { 467 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE); 468 } 469 470 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 471 static inline int pte_soft_dirty(pte_t pte) 472 { 473 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 474 } 475 476 static inline int pmd_soft_dirty(pmd_t pmd) 477 { 478 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 479 } 480 481 static inline int pud_soft_dirty(pud_t pud) 482 { 483 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 484 } 485 486 static inline pte_t pte_mksoft_dirty(pte_t pte) 487 { 488 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 489 } 490 491 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 492 { 493 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 494 } 495 496 static inline pud_t pud_mksoft_dirty(pud_t pud) 497 { 498 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 499 } 500 501 static inline pte_t pte_clear_soft_dirty(pte_t pte) 502 { 503 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 504 } 505 506 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 507 { 508 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 509 } 510 511 static inline pud_t pud_clear_soft_dirty(pud_t pud) 512 { 513 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 514 } 515 516 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 517 518 /* 519 * Mask out unsupported bits in a present pgprot. Non-present pgprots 520 * can use those bits for other purposes, so leave them be. 521 */ 522 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 523 { 524 pgprotval_t protval = pgprot_val(pgprot); 525 526 if (protval & _PAGE_PRESENT) 527 protval &= __supported_pte_mask; 528 529 return protval; 530 } 531 532 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 533 { 534 pgprotval_t massaged_val = massage_pgprot(pgprot); 535 536 /* mmdebug.h can not be included here because of dependencies */ 537 #ifdef CONFIG_DEBUG_VM 538 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 539 "attempted to set unsupported pgprot: %016llx " 540 "bits: %016llx supported: %016llx\n", 541 (u64)pgprot_val(pgprot), 542 (u64)pgprot_val(pgprot) ^ massaged_val, 543 (u64)__supported_pte_mask); 544 #endif 545 546 return massaged_val; 547 } 548 549 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 550 { 551 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | 552 check_pgprot(pgprot)); 553 } 554 555 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 556 { 557 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | 558 check_pgprot(pgprot)); 559 } 560 561 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 562 { 563 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) | 564 check_pgprot(pgprot)); 565 } 566 567 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 568 { 569 pteval_t val = pte_val(pte); 570 571 /* 572 * Chop off the NX bit (if present), and add the NX portion of 573 * the newprot (if present): 574 */ 575 val &= _PAGE_CHG_MASK; 576 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 577 578 return __pte(val); 579 } 580 581 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 582 { 583 pmdval_t val = pmd_val(pmd); 584 585 val &= _HPAGE_CHG_MASK; 586 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 587 588 return __pmd(val); 589 } 590 591 /* mprotect needs to preserve PAT bits when updating vm_page_prot */ 592 #define pgprot_modify pgprot_modify 593 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 594 { 595 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 596 pgprotval_t addbits = pgprot_val(newprot); 597 return __pgprot(preservebits | addbits); 598 } 599 600 #define pte_pgprot(x) __pgprot(pte_flags(x)) 601 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 602 #define pud_pgprot(x) __pgprot(pud_flags(x)) 603 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 604 605 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 606 607 static inline pgprot_t arch_filter_pgprot(pgprot_t prot) 608 { 609 return canon_pgprot(prot); 610 } 611 612 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 613 enum page_cache_mode pcm, 614 enum page_cache_mode new_pcm) 615 { 616 /* 617 * PAT type is always WB for untracked ranges, so no need to check. 618 */ 619 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 620 return 1; 621 622 /* 623 * Certain new memtypes are not allowed with certain 624 * requested memtype: 625 * - request is uncached, return cannot be write-back 626 * - request is write-combine, return cannot be write-back 627 * - request is write-through, return cannot be write-back 628 * - request is write-through, return cannot be write-combine 629 */ 630 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 631 new_pcm == _PAGE_CACHE_MODE_WB) || 632 (pcm == _PAGE_CACHE_MODE_WC && 633 new_pcm == _PAGE_CACHE_MODE_WB) || 634 (pcm == _PAGE_CACHE_MODE_WT && 635 new_pcm == _PAGE_CACHE_MODE_WB) || 636 (pcm == _PAGE_CACHE_MODE_WT && 637 new_pcm == _PAGE_CACHE_MODE_WC)) { 638 return 0; 639 } 640 641 return 1; 642 } 643 644 pmd_t *populate_extra_pmd(unsigned long vaddr); 645 pte_t *populate_extra_pte(unsigned long vaddr); 646 647 #ifdef CONFIG_PAGE_TABLE_ISOLATION 648 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 649 650 /* 651 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 652 * Populates the user and returns the resulting PGD that must be set in 653 * the kernel copy of the page tables. 654 */ 655 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 656 { 657 if (!static_cpu_has(X86_FEATURE_PTI)) 658 return pgd; 659 return __pti_set_user_pgtbl(pgdp, pgd); 660 } 661 #else /* CONFIG_PAGE_TABLE_ISOLATION */ 662 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 663 { 664 return pgd; 665 } 666 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 667 668 #endif /* __ASSEMBLY__ */ 669 670 671 #ifdef CONFIG_X86_32 672 # include <asm/pgtable_32.h> 673 #else 674 # include <asm/pgtable_64.h> 675 #endif 676 677 #ifndef __ASSEMBLY__ 678 #include <linux/mm_types.h> 679 #include <linux/mmdebug.h> 680 #include <linux/log2.h> 681 #include <asm/fixmap.h> 682 683 static inline int pte_none(pte_t pte) 684 { 685 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 686 } 687 688 #define __HAVE_ARCH_PTE_SAME 689 static inline int pte_same(pte_t a, pte_t b) 690 { 691 return a.pte == b.pte; 692 } 693 694 static inline int pte_present(pte_t a) 695 { 696 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 697 } 698 699 #ifdef __HAVE_ARCH_PTE_DEVMAP 700 static inline int pte_devmap(pte_t a) 701 { 702 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 703 } 704 #endif 705 706 #define pte_accessible pte_accessible 707 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 708 { 709 if (pte_flags(a) & _PAGE_PRESENT) 710 return true; 711 712 if ((pte_flags(a) & _PAGE_PROTNONE) && 713 mm_tlb_flush_pending(mm)) 714 return true; 715 716 return false; 717 } 718 719 static inline int pmd_present(pmd_t pmd) 720 { 721 /* 722 * Checking for _PAGE_PSE is needed too because 723 * split_huge_page will temporarily clear the present bit (but 724 * the _PAGE_PSE flag will remain set at all times while the 725 * _PAGE_PRESENT bit is clear). 726 */ 727 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 728 } 729 730 #ifdef CONFIG_NUMA_BALANCING 731 /* 732 * These work without NUMA balancing but the kernel does not care. See the 733 * comment in include/asm-generic/pgtable.h 734 */ 735 static inline int pte_protnone(pte_t pte) 736 { 737 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 738 == _PAGE_PROTNONE; 739 } 740 741 static inline int pmd_protnone(pmd_t pmd) 742 { 743 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 744 == _PAGE_PROTNONE; 745 } 746 #endif /* CONFIG_NUMA_BALANCING */ 747 748 static inline int pmd_none(pmd_t pmd) 749 { 750 /* Only check low word on 32-bit platforms, since it might be 751 out of sync with upper half. */ 752 unsigned long val = native_pmd_val(pmd); 753 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 754 } 755 756 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 757 { 758 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 759 } 760 761 /* 762 * Currently stuck as a macro due to indirect forward reference to 763 * linux/mmzone.h's __section_mem_map_addr() definition: 764 */ 765 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 766 767 /* 768 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] 769 * 770 * this macro returns the index of the entry in the pmd page which would 771 * control the given virtual address 772 */ 773 static inline unsigned long pmd_index(unsigned long address) 774 { 775 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 776 } 777 778 /* 779 * Conversion functions: convert a page and protection to a page entry, 780 * and a page entry and page directory to the page they refer to. 781 * 782 * (Currently stuck as a macro because of indirect forward reference 783 * to linux/mm.h:page_to_nid()) 784 */ 785 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 786 787 /* 788 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] 789 * 790 * this function returns the index of the entry in the pte page which would 791 * control the given virtual address 792 */ 793 static inline unsigned long pte_index(unsigned long address) 794 { 795 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 796 } 797 798 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 799 { 800 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 801 } 802 803 static inline int pmd_bad(pmd_t pmd) 804 { 805 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 806 } 807 808 static inline unsigned long pages_to_mb(unsigned long npg) 809 { 810 return npg >> (20 - PAGE_SHIFT); 811 } 812 813 #if CONFIG_PGTABLE_LEVELS > 2 814 static inline int pud_none(pud_t pud) 815 { 816 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 817 } 818 819 static inline int pud_present(pud_t pud) 820 { 821 return pud_flags(pud) & _PAGE_PRESENT; 822 } 823 824 static inline unsigned long pud_page_vaddr(pud_t pud) 825 { 826 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); 827 } 828 829 /* 830 * Currently stuck as a macro due to indirect forward reference to 831 * linux/mmzone.h's __section_mem_map_addr() definition: 832 */ 833 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 834 835 /* Find an entry in the second-level page table.. */ 836 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 837 { 838 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 839 } 840 841 static inline int pud_large(pud_t pud) 842 { 843 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 844 (_PAGE_PSE | _PAGE_PRESENT); 845 } 846 847 static inline int pud_bad(pud_t pud) 848 { 849 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 850 } 851 #else 852 static inline int pud_large(pud_t pud) 853 { 854 return 0; 855 } 856 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 857 858 static inline unsigned long pud_index(unsigned long address) 859 { 860 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 861 } 862 863 #if CONFIG_PGTABLE_LEVELS > 3 864 static inline int p4d_none(p4d_t p4d) 865 { 866 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 867 } 868 869 static inline int p4d_present(p4d_t p4d) 870 { 871 return p4d_flags(p4d) & _PAGE_PRESENT; 872 } 873 874 static inline unsigned long p4d_page_vaddr(p4d_t p4d) 875 { 876 return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 877 } 878 879 /* 880 * Currently stuck as a macro due to indirect forward reference to 881 * linux/mmzone.h's __section_mem_map_addr() definition: 882 */ 883 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 884 885 /* Find an entry in the third-level page table.. */ 886 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 887 { 888 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); 889 } 890 891 static inline int p4d_bad(p4d_t p4d) 892 { 893 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 894 895 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 896 ignore_flags |= _PAGE_NX; 897 898 return (p4d_flags(p4d) & ~ignore_flags) != 0; 899 } 900 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 901 902 static inline unsigned long p4d_index(unsigned long address) 903 { 904 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 905 } 906 907 #if CONFIG_PGTABLE_LEVELS > 4 908 static inline int pgd_present(pgd_t pgd) 909 { 910 if (!pgtable_l5_enabled()) 911 return 1; 912 return pgd_flags(pgd) & _PAGE_PRESENT; 913 } 914 915 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 916 { 917 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 918 } 919 920 /* 921 * Currently stuck as a macro due to indirect forward reference to 922 * linux/mmzone.h's __section_mem_map_addr() definition: 923 */ 924 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 925 926 /* to find an entry in a page-table-directory. */ 927 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 928 { 929 if (!pgtable_l5_enabled()) 930 return (p4d_t *)pgd; 931 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 932 } 933 934 static inline int pgd_bad(pgd_t pgd) 935 { 936 unsigned long ignore_flags = _PAGE_USER; 937 938 if (!pgtable_l5_enabled()) 939 return 0; 940 941 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 942 ignore_flags |= _PAGE_NX; 943 944 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 945 } 946 947 static inline int pgd_none(pgd_t pgd) 948 { 949 if (!pgtable_l5_enabled()) 950 return 0; 951 /* 952 * There is no need to do a workaround for the KNL stray 953 * A/D bit erratum here. PGDs only point to page tables 954 * except on 32-bit non-PAE which is not supported on 955 * KNL. 956 */ 957 return !native_pgd_val(pgd); 958 } 959 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 960 961 #endif /* __ASSEMBLY__ */ 962 963 /* 964 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] 965 * 966 * this macro returns the index of the entry in the pgd page which would 967 * control the given virtual address 968 */ 969 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 970 971 /* 972 * pgd_offset() returns a (pgd_t *) 973 * pgd_index() is used get the offset into the pgd page's array of pgd_t's; 974 */ 975 #define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address))) 976 /* 977 * a shortcut to get a pgd_t in a given mm 978 */ 979 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 980 /* 981 * a shortcut which implies the use of the kernel's pgd, instead 982 * of a process's 983 */ 984 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 985 986 987 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 988 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 989 990 #ifndef __ASSEMBLY__ 991 992 extern int direct_gbpages; 993 void init_mem_mapping(void); 994 void early_alloc_pgt_buf(void); 995 extern void memblock_find_dma_reserve(void); 996 997 #ifdef CONFIG_X86_64 998 /* Realmode trampoline initialization. */ 999 extern pgd_t trampoline_pgd_entry; 1000 static inline void __meminit init_trampoline_default(void) 1001 { 1002 /* Default trampoline pgd value */ 1003 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)]; 1004 } 1005 # ifdef CONFIG_RANDOMIZE_MEMORY 1006 void __meminit init_trampoline(void); 1007 # else 1008 # define init_trampoline init_trampoline_default 1009 # endif 1010 #else 1011 static inline void init_trampoline(void) { } 1012 #endif 1013 1014 /* local pte updates need not use xchg for locking */ 1015 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 1016 { 1017 pte_t res = *ptep; 1018 1019 /* Pure native function needs no input for mm, addr */ 1020 native_pte_clear(NULL, 0, ptep); 1021 return res; 1022 } 1023 1024 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 1025 { 1026 pmd_t res = *pmdp; 1027 1028 native_pmd_clear(pmdp); 1029 return res; 1030 } 1031 1032 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1033 { 1034 pud_t res = *pudp; 1035 1036 native_pud_clear(pudp); 1037 return res; 1038 } 1039 1040 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, 1041 pte_t *ptep , pte_t pte) 1042 { 1043 native_set_pte(ptep, pte); 1044 } 1045 1046 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1047 pmd_t *pmdp, pmd_t pmd) 1048 { 1049 native_set_pmd(pmdp, pmd); 1050 } 1051 1052 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1053 pud_t *pudp, pud_t pud) 1054 { 1055 native_set_pud(pudp, pud); 1056 } 1057 1058 /* 1059 * We only update the dirty/accessed state if we set 1060 * the dirty bit by hand in the kernel, since the hardware 1061 * will do the accessed bit for us, and we don't want to 1062 * race with other CPU's that might be updating the dirty 1063 * bit at the same time. 1064 */ 1065 struct vm_area_struct; 1066 1067 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1068 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1069 unsigned long address, pte_t *ptep, 1070 pte_t entry, int dirty); 1071 1072 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1073 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1074 unsigned long addr, pte_t *ptep); 1075 1076 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1077 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1078 unsigned long address, pte_t *ptep); 1079 1080 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1081 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1082 pte_t *ptep) 1083 { 1084 pte_t pte = native_ptep_get_and_clear(ptep); 1085 return pte; 1086 } 1087 1088 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1089 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1090 unsigned long addr, pte_t *ptep, 1091 int full) 1092 { 1093 pte_t pte; 1094 if (full) { 1095 /* 1096 * Full address destruction in progress; paravirt does not 1097 * care about updates and native needs no locking 1098 */ 1099 pte = native_local_ptep_get_and_clear(ptep); 1100 } else { 1101 pte = ptep_get_and_clear(mm, addr, ptep); 1102 } 1103 return pte; 1104 } 1105 1106 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1107 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1108 unsigned long addr, pte_t *ptep) 1109 { 1110 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1111 } 1112 1113 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 1114 1115 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1116 1117 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1118 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1119 unsigned long address, pmd_t *pmdp, 1120 pmd_t entry, int dirty); 1121 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1122 unsigned long address, pud_t *pudp, 1123 pud_t entry, int dirty); 1124 1125 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1126 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1127 unsigned long addr, pmd_t *pmdp); 1128 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1129 unsigned long addr, pud_t *pudp); 1130 1131 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1132 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1133 unsigned long address, pmd_t *pmdp); 1134 1135 1136 #define pmd_write pmd_write 1137 static inline int pmd_write(pmd_t pmd) 1138 { 1139 return pmd_flags(pmd) & _PAGE_RW; 1140 } 1141 1142 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1143 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1144 pmd_t *pmdp) 1145 { 1146 return native_pmdp_get_and_clear(pmdp); 1147 } 1148 1149 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1150 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1151 unsigned long addr, pud_t *pudp) 1152 { 1153 return native_pudp_get_and_clear(pudp); 1154 } 1155 1156 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1157 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1158 unsigned long addr, pmd_t *pmdp) 1159 { 1160 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1161 } 1162 1163 #define pud_write pud_write 1164 static inline int pud_write(pud_t pud) 1165 { 1166 return pud_flags(pud) & _PAGE_RW; 1167 } 1168 1169 #ifndef pmdp_establish 1170 #define pmdp_establish pmdp_establish 1171 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1172 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1173 { 1174 if (IS_ENABLED(CONFIG_SMP)) { 1175 return xchg(pmdp, pmd); 1176 } else { 1177 pmd_t old = *pmdp; 1178 *pmdp = pmd; 1179 return old; 1180 } 1181 } 1182 #endif 1183 /* 1184 * Page table pages are page-aligned. The lower half of the top 1185 * level is used for userspace and the top half for the kernel. 1186 * 1187 * Returns true for parts of the PGD that map userspace and 1188 * false for the parts that map the kernel. 1189 */ 1190 static inline bool pgdp_maps_userspace(void *__ptr) 1191 { 1192 unsigned long ptr = (unsigned long)__ptr; 1193 1194 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1195 } 1196 1197 static inline int pgd_large(pgd_t pgd) { return 0; } 1198 1199 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1200 /* 1201 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1202 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1203 * the user one is in the last 4k. To switch between them, you 1204 * just need to flip the 12th bit in their addresses. 1205 */ 1206 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1207 1208 /* 1209 * This generates better code than the inline assembly in 1210 * __set_bit(). 1211 */ 1212 static inline void *ptr_set_bit(void *ptr, int bit) 1213 { 1214 unsigned long __ptr = (unsigned long)ptr; 1215 1216 __ptr |= BIT(bit); 1217 return (void *)__ptr; 1218 } 1219 static inline void *ptr_clear_bit(void *ptr, int bit) 1220 { 1221 unsigned long __ptr = (unsigned long)ptr; 1222 1223 __ptr &= ~BIT(bit); 1224 return (void *)__ptr; 1225 } 1226 1227 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1228 { 1229 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1230 } 1231 1232 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1233 { 1234 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1235 } 1236 1237 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1238 { 1239 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1240 } 1241 1242 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1243 { 1244 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1245 } 1246 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1247 1248 /* 1249 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1250 * 1251 * dst - pointer to pgd range anwhere on a pgd page 1252 * src - "" 1253 * count - the number of pgds to copy. 1254 * 1255 * dst and src can be on the same page, but the range must not overlap, 1256 * and must not cross a page boundary. 1257 */ 1258 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1259 { 1260 memcpy(dst, src, count * sizeof(pgd_t)); 1261 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1262 if (!static_cpu_has(X86_FEATURE_PTI)) 1263 return; 1264 /* Clone the user space pgd as well */ 1265 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1266 count * sizeof(pgd_t)); 1267 #endif 1268 } 1269 1270 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1271 static inline int page_level_shift(enum pg_level level) 1272 { 1273 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1274 } 1275 static inline unsigned long page_level_size(enum pg_level level) 1276 { 1277 return 1UL << page_level_shift(level); 1278 } 1279 static inline unsigned long page_level_mask(enum pg_level level) 1280 { 1281 return ~(page_level_size(level) - 1); 1282 } 1283 1284 /* 1285 * The x86 doesn't have any external MMU info: the kernel page 1286 * tables contain all the necessary information. 1287 */ 1288 static inline void update_mmu_cache(struct vm_area_struct *vma, 1289 unsigned long addr, pte_t *ptep) 1290 { 1291 } 1292 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1293 unsigned long addr, pmd_t *pmd) 1294 { 1295 } 1296 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1297 unsigned long addr, pud_t *pud) 1298 { 1299 } 1300 1301 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1302 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1303 { 1304 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1305 } 1306 1307 static inline int pte_swp_soft_dirty(pte_t pte) 1308 { 1309 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1310 } 1311 1312 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1313 { 1314 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1315 } 1316 1317 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1318 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1319 { 1320 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1321 } 1322 1323 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1324 { 1325 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1326 } 1327 1328 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1329 { 1330 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1331 } 1332 #endif 1333 #endif 1334 1335 #define PKRU_AD_BIT 0x1 1336 #define PKRU_WD_BIT 0x2 1337 #define PKRU_BITS_PER_PKEY 2 1338 1339 static inline bool __pkru_allows_read(u32 pkru, u16 pkey) 1340 { 1341 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; 1342 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); 1343 } 1344 1345 static inline bool __pkru_allows_write(u32 pkru, u16 pkey) 1346 { 1347 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; 1348 /* 1349 * Access-disable disables writes too so we need to check 1350 * both bits here. 1351 */ 1352 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); 1353 } 1354 1355 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1356 { 1357 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1358 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1359 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1360 #else 1361 return 0; 1362 #endif 1363 } 1364 1365 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1366 { 1367 u32 pkru = read_pkru(); 1368 1369 if (!__pkru_allows_read(pkru, pkey)) 1370 return false; 1371 if (write && !__pkru_allows_write(pkru, pkey)) 1372 return false; 1373 1374 return true; 1375 } 1376 1377 /* 1378 * 'pteval' can come from a PTE, PMD or PUD. We only check 1379 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1380 * same value on all 3 types. 1381 */ 1382 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1383 { 1384 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1385 1386 if (write) 1387 need_pte_bits |= _PAGE_RW; 1388 1389 if ((pteval & need_pte_bits) != need_pte_bits) 1390 return 0; 1391 1392 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1393 } 1394 1395 #define pte_access_permitted pte_access_permitted 1396 static inline bool pte_access_permitted(pte_t pte, bool write) 1397 { 1398 return __pte_access_permitted(pte_val(pte), write); 1399 } 1400 1401 #define pmd_access_permitted pmd_access_permitted 1402 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1403 { 1404 return __pte_access_permitted(pmd_val(pmd), write); 1405 } 1406 1407 #define pud_access_permitted pud_access_permitted 1408 static inline bool pud_access_permitted(pud_t pud, bool write) 1409 { 1410 return __pte_access_permitted(pud_val(pud), write); 1411 } 1412 1413 #include <asm-generic/pgtable.h> 1414 #endif /* __ASSEMBLY__ */ 1415 1416 #endif /* _ASM_X86_PGTABLE_H */ 1417