1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <linux/spinlock.h> 20 #include <asm/x86_init.h> 21 #include <asm/pkru.h> 22 #include <asm/fpu/api.h> 23 #include <asm/coco.h> 24 #include <asm-generic/pgtable_uffd.h> 25 #include <linux/page_table_check.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 31 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 32 bool user); 33 void ptdump_walk_pgd_level_checkwx(void); 34 void ptdump_walk_user_pgd_level_checkwx(void); 35 36 /* 37 * Macros to add or remove encryption attribute 38 */ 39 #define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot))) 40 #define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot))) 41 42 #ifdef CONFIG_DEBUG_WX 43 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 44 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 45 #else 46 #define debug_checkwx() do { } while (0) 47 #define debug_checkwx_user() do { } while (0) 48 #endif 49 50 /* 51 * ZERO_PAGE is a global shared page that is always zero: used 52 * for zero-mapped memory areas etc.. 53 */ 54 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 55 __visible; 56 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 57 58 extern spinlock_t pgd_lock; 59 extern struct list_head pgd_list; 60 61 extern struct mm_struct *pgd_page_get_mm(struct page *page); 62 63 extern pmdval_t early_pmd_flags; 64 65 #ifdef CONFIG_PARAVIRT_XXL 66 #include <asm/paravirt.h> 67 #else /* !CONFIG_PARAVIRT_XXL */ 68 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 69 70 #define set_pte_atomic(ptep, pte) \ 71 native_set_pte_atomic(ptep, pte) 72 73 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 74 75 #ifndef __PAGETABLE_P4D_FOLDED 76 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 77 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 78 #endif 79 80 #ifndef set_p4d 81 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 82 #endif 83 84 #ifndef __PAGETABLE_PUD_FOLDED 85 #define p4d_clear(p4d) native_p4d_clear(p4d) 86 #endif 87 88 #ifndef set_pud 89 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 90 #endif 91 92 #ifndef __PAGETABLE_PUD_FOLDED 93 #define pud_clear(pud) native_pud_clear(pud) 94 #endif 95 96 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 97 #define pmd_clear(pmd) native_pmd_clear(pmd) 98 99 #define pgd_val(x) native_pgd_val(x) 100 #define __pgd(x) native_make_pgd(x) 101 102 #ifndef __PAGETABLE_P4D_FOLDED 103 #define p4d_val(x) native_p4d_val(x) 104 #define __p4d(x) native_make_p4d(x) 105 #endif 106 107 #ifndef __PAGETABLE_PUD_FOLDED 108 #define pud_val(x) native_pud_val(x) 109 #define __pud(x) native_make_pud(x) 110 #endif 111 112 #ifndef __PAGETABLE_PMD_FOLDED 113 #define pmd_val(x) native_pmd_val(x) 114 #define __pmd(x) native_make_pmd(x) 115 #endif 116 117 #define pte_val(x) native_pte_val(x) 118 #define __pte(x) native_make_pte(x) 119 120 #define arch_end_context_switch(prev) do {} while(0) 121 #endif /* CONFIG_PARAVIRT_XXL */ 122 123 /* 124 * The following only work if pte_present() is true. 125 * Undefined behaviour if not.. 126 */ 127 static inline int pte_dirty(pte_t pte) 128 { 129 return pte_flags(pte) & _PAGE_DIRTY; 130 } 131 132 static inline int pte_young(pte_t pte) 133 { 134 return pte_flags(pte) & _PAGE_ACCESSED; 135 } 136 137 static inline int pmd_dirty(pmd_t pmd) 138 { 139 return pmd_flags(pmd) & _PAGE_DIRTY; 140 } 141 142 static inline int pmd_young(pmd_t pmd) 143 { 144 return pmd_flags(pmd) & _PAGE_ACCESSED; 145 } 146 147 static inline int pud_dirty(pud_t pud) 148 { 149 return pud_flags(pud) & _PAGE_DIRTY; 150 } 151 152 static inline int pud_young(pud_t pud) 153 { 154 return pud_flags(pud) & _PAGE_ACCESSED; 155 } 156 157 static inline int pte_write(pte_t pte) 158 { 159 return pte_flags(pte) & _PAGE_RW; 160 } 161 162 static inline int pte_huge(pte_t pte) 163 { 164 return pte_flags(pte) & _PAGE_PSE; 165 } 166 167 static inline int pte_global(pte_t pte) 168 { 169 return pte_flags(pte) & _PAGE_GLOBAL; 170 } 171 172 static inline int pte_exec(pte_t pte) 173 { 174 return !(pte_flags(pte) & _PAGE_NX); 175 } 176 177 static inline int pte_special(pte_t pte) 178 { 179 return pte_flags(pte) & _PAGE_SPECIAL; 180 } 181 182 /* Entries that were set to PROT_NONE are inverted */ 183 184 static inline u64 protnone_mask(u64 val); 185 186 static inline unsigned long pte_pfn(pte_t pte) 187 { 188 phys_addr_t pfn = pte_val(pte); 189 pfn ^= protnone_mask(pfn); 190 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 191 } 192 193 static inline unsigned long pmd_pfn(pmd_t pmd) 194 { 195 phys_addr_t pfn = pmd_val(pmd); 196 pfn ^= protnone_mask(pfn); 197 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 198 } 199 200 static inline unsigned long pud_pfn(pud_t pud) 201 { 202 phys_addr_t pfn = pud_val(pud); 203 pfn ^= protnone_mask(pfn); 204 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 205 } 206 207 static inline unsigned long p4d_pfn(p4d_t p4d) 208 { 209 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 210 } 211 212 static inline unsigned long pgd_pfn(pgd_t pgd) 213 { 214 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 215 } 216 217 #define p4d_leaf p4d_large 218 static inline int p4d_large(p4d_t p4d) 219 { 220 /* No 512 GiB pages yet */ 221 return 0; 222 } 223 224 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 225 226 #define pmd_leaf pmd_large 227 static inline int pmd_large(pmd_t pte) 228 { 229 return pmd_flags(pte) & _PAGE_PSE; 230 } 231 232 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 233 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */ 234 static inline int pmd_trans_huge(pmd_t pmd) 235 { 236 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 237 } 238 239 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 240 static inline int pud_trans_huge(pud_t pud) 241 { 242 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 243 } 244 #endif 245 246 #define has_transparent_hugepage has_transparent_hugepage 247 static inline int has_transparent_hugepage(void) 248 { 249 return boot_cpu_has(X86_FEATURE_PSE); 250 } 251 252 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 253 static inline int pmd_devmap(pmd_t pmd) 254 { 255 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 256 } 257 258 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 259 static inline int pud_devmap(pud_t pud) 260 { 261 return !!(pud_val(pud) & _PAGE_DEVMAP); 262 } 263 #else 264 static inline int pud_devmap(pud_t pud) 265 { 266 return 0; 267 } 268 #endif 269 270 static inline int pgd_devmap(pgd_t pgd) 271 { 272 return 0; 273 } 274 #endif 275 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 276 277 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 278 { 279 pteval_t v = native_pte_val(pte); 280 281 return native_make_pte(v | set); 282 } 283 284 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 285 { 286 pteval_t v = native_pte_val(pte); 287 288 return native_make_pte(v & ~clear); 289 } 290 291 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 292 static inline int pte_uffd_wp(pte_t pte) 293 { 294 return pte_flags(pte) & _PAGE_UFFD_WP; 295 } 296 297 static inline pte_t pte_mkuffd_wp(pte_t pte) 298 { 299 return pte_set_flags(pte, _PAGE_UFFD_WP); 300 } 301 302 static inline pte_t pte_clear_uffd_wp(pte_t pte) 303 { 304 return pte_clear_flags(pte, _PAGE_UFFD_WP); 305 } 306 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 307 308 static inline pte_t pte_mkclean(pte_t pte) 309 { 310 return pte_clear_flags(pte, _PAGE_DIRTY); 311 } 312 313 static inline pte_t pte_mkold(pte_t pte) 314 { 315 return pte_clear_flags(pte, _PAGE_ACCESSED); 316 } 317 318 static inline pte_t pte_wrprotect(pte_t pte) 319 { 320 return pte_clear_flags(pte, _PAGE_RW); 321 } 322 323 static inline pte_t pte_mkexec(pte_t pte) 324 { 325 return pte_clear_flags(pte, _PAGE_NX); 326 } 327 328 static inline pte_t pte_mkdirty(pte_t pte) 329 { 330 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 331 } 332 333 static inline pte_t pte_mkyoung(pte_t pte) 334 { 335 return pte_set_flags(pte, _PAGE_ACCESSED); 336 } 337 338 static inline pte_t pte_mkwrite(pte_t pte) 339 { 340 return pte_set_flags(pte, _PAGE_RW); 341 } 342 343 static inline pte_t pte_mkhuge(pte_t pte) 344 { 345 return pte_set_flags(pte, _PAGE_PSE); 346 } 347 348 static inline pte_t pte_clrhuge(pte_t pte) 349 { 350 return pte_clear_flags(pte, _PAGE_PSE); 351 } 352 353 static inline pte_t pte_mkglobal(pte_t pte) 354 { 355 return pte_set_flags(pte, _PAGE_GLOBAL); 356 } 357 358 static inline pte_t pte_clrglobal(pte_t pte) 359 { 360 return pte_clear_flags(pte, _PAGE_GLOBAL); 361 } 362 363 static inline pte_t pte_mkspecial(pte_t pte) 364 { 365 return pte_set_flags(pte, _PAGE_SPECIAL); 366 } 367 368 static inline pte_t pte_mkdevmap(pte_t pte) 369 { 370 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 371 } 372 373 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 374 { 375 pmdval_t v = native_pmd_val(pmd); 376 377 return native_make_pmd(v | set); 378 } 379 380 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 381 { 382 pmdval_t v = native_pmd_val(pmd); 383 384 return native_make_pmd(v & ~clear); 385 } 386 387 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 388 static inline int pmd_uffd_wp(pmd_t pmd) 389 { 390 return pmd_flags(pmd) & _PAGE_UFFD_WP; 391 } 392 393 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 394 { 395 return pmd_set_flags(pmd, _PAGE_UFFD_WP); 396 } 397 398 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 399 { 400 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 401 } 402 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 403 404 static inline pmd_t pmd_mkold(pmd_t pmd) 405 { 406 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 407 } 408 409 static inline pmd_t pmd_mkclean(pmd_t pmd) 410 { 411 return pmd_clear_flags(pmd, _PAGE_DIRTY); 412 } 413 414 static inline pmd_t pmd_wrprotect(pmd_t pmd) 415 { 416 return pmd_clear_flags(pmd, _PAGE_RW); 417 } 418 419 static inline pmd_t pmd_mkdirty(pmd_t pmd) 420 { 421 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 422 } 423 424 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 425 { 426 return pmd_set_flags(pmd, _PAGE_DEVMAP); 427 } 428 429 static inline pmd_t pmd_mkhuge(pmd_t pmd) 430 { 431 return pmd_set_flags(pmd, _PAGE_PSE); 432 } 433 434 static inline pmd_t pmd_mkyoung(pmd_t pmd) 435 { 436 return pmd_set_flags(pmd, _PAGE_ACCESSED); 437 } 438 439 static inline pmd_t pmd_mkwrite(pmd_t pmd) 440 { 441 return pmd_set_flags(pmd, _PAGE_RW); 442 } 443 444 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 445 { 446 pudval_t v = native_pud_val(pud); 447 448 return native_make_pud(v | set); 449 } 450 451 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 452 { 453 pudval_t v = native_pud_val(pud); 454 455 return native_make_pud(v & ~clear); 456 } 457 458 static inline pud_t pud_mkold(pud_t pud) 459 { 460 return pud_clear_flags(pud, _PAGE_ACCESSED); 461 } 462 463 static inline pud_t pud_mkclean(pud_t pud) 464 { 465 return pud_clear_flags(pud, _PAGE_DIRTY); 466 } 467 468 static inline pud_t pud_wrprotect(pud_t pud) 469 { 470 return pud_clear_flags(pud, _PAGE_RW); 471 } 472 473 static inline pud_t pud_mkdirty(pud_t pud) 474 { 475 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 476 } 477 478 static inline pud_t pud_mkdevmap(pud_t pud) 479 { 480 return pud_set_flags(pud, _PAGE_DEVMAP); 481 } 482 483 static inline pud_t pud_mkhuge(pud_t pud) 484 { 485 return pud_set_flags(pud, _PAGE_PSE); 486 } 487 488 static inline pud_t pud_mkyoung(pud_t pud) 489 { 490 return pud_set_flags(pud, _PAGE_ACCESSED); 491 } 492 493 static inline pud_t pud_mkwrite(pud_t pud) 494 { 495 return pud_set_flags(pud, _PAGE_RW); 496 } 497 498 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 499 static inline int pte_soft_dirty(pte_t pte) 500 { 501 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 502 } 503 504 static inline int pmd_soft_dirty(pmd_t pmd) 505 { 506 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 507 } 508 509 static inline int pud_soft_dirty(pud_t pud) 510 { 511 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 512 } 513 514 static inline pte_t pte_mksoft_dirty(pte_t pte) 515 { 516 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 517 } 518 519 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 520 { 521 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 522 } 523 524 static inline pud_t pud_mksoft_dirty(pud_t pud) 525 { 526 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 527 } 528 529 static inline pte_t pte_clear_soft_dirty(pte_t pte) 530 { 531 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 532 } 533 534 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 535 { 536 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 537 } 538 539 static inline pud_t pud_clear_soft_dirty(pud_t pud) 540 { 541 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 542 } 543 544 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 545 546 /* 547 * Mask out unsupported bits in a present pgprot. Non-present pgprots 548 * can use those bits for other purposes, so leave them be. 549 */ 550 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 551 { 552 pgprotval_t protval = pgprot_val(pgprot); 553 554 if (protval & _PAGE_PRESENT) 555 protval &= __supported_pte_mask; 556 557 return protval; 558 } 559 560 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 561 { 562 pgprotval_t massaged_val = massage_pgprot(pgprot); 563 564 /* mmdebug.h can not be included here because of dependencies */ 565 #ifdef CONFIG_DEBUG_VM 566 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 567 "attempted to set unsupported pgprot: %016llx " 568 "bits: %016llx supported: %016llx\n", 569 (u64)pgprot_val(pgprot), 570 (u64)pgprot_val(pgprot) ^ massaged_val, 571 (u64)__supported_pte_mask); 572 #endif 573 574 return massaged_val; 575 } 576 577 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 578 { 579 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 580 pfn ^= protnone_mask(pgprot_val(pgprot)); 581 pfn &= PTE_PFN_MASK; 582 return __pte(pfn | check_pgprot(pgprot)); 583 } 584 585 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 586 { 587 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 588 pfn ^= protnone_mask(pgprot_val(pgprot)); 589 pfn &= PHYSICAL_PMD_PAGE_MASK; 590 return __pmd(pfn | check_pgprot(pgprot)); 591 } 592 593 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 594 { 595 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 596 pfn ^= protnone_mask(pgprot_val(pgprot)); 597 pfn &= PHYSICAL_PUD_PAGE_MASK; 598 return __pud(pfn | check_pgprot(pgprot)); 599 } 600 601 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 602 { 603 return pfn_pmd(pmd_pfn(pmd), 604 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 605 } 606 607 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 608 609 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 610 { 611 pteval_t val = pte_val(pte), oldval = val; 612 613 /* 614 * Chop off the NX bit (if present), and add the NX portion of 615 * the newprot (if present): 616 */ 617 val &= _PAGE_CHG_MASK; 618 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 619 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 620 return __pte(val); 621 } 622 623 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 624 { 625 pmdval_t val = pmd_val(pmd), oldval = val; 626 627 val &= _HPAGE_CHG_MASK; 628 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 629 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 630 return __pmd(val); 631 } 632 633 /* 634 * mprotect needs to preserve PAT and encryption bits when updating 635 * vm_page_prot 636 */ 637 #define pgprot_modify pgprot_modify 638 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 639 { 640 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 641 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 642 return __pgprot(preservebits | addbits); 643 } 644 645 #define pte_pgprot(x) __pgprot(pte_flags(x)) 646 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 647 #define pud_pgprot(x) __pgprot(pud_flags(x)) 648 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 649 650 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 651 652 static inline pgprot_t arch_filter_pgprot(pgprot_t prot) 653 { 654 return canon_pgprot(prot); 655 } 656 657 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 658 enum page_cache_mode pcm, 659 enum page_cache_mode new_pcm) 660 { 661 /* 662 * PAT type is always WB for untracked ranges, so no need to check. 663 */ 664 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 665 return 1; 666 667 /* 668 * Certain new memtypes are not allowed with certain 669 * requested memtype: 670 * - request is uncached, return cannot be write-back 671 * - request is write-combine, return cannot be write-back 672 * - request is write-through, return cannot be write-back 673 * - request is write-through, return cannot be write-combine 674 */ 675 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 676 new_pcm == _PAGE_CACHE_MODE_WB) || 677 (pcm == _PAGE_CACHE_MODE_WC && 678 new_pcm == _PAGE_CACHE_MODE_WB) || 679 (pcm == _PAGE_CACHE_MODE_WT && 680 new_pcm == _PAGE_CACHE_MODE_WB) || 681 (pcm == _PAGE_CACHE_MODE_WT && 682 new_pcm == _PAGE_CACHE_MODE_WC)) { 683 return 0; 684 } 685 686 return 1; 687 } 688 689 pmd_t *populate_extra_pmd(unsigned long vaddr); 690 pte_t *populate_extra_pte(unsigned long vaddr); 691 692 #ifdef CONFIG_PAGE_TABLE_ISOLATION 693 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 694 695 /* 696 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 697 * Populates the user and returns the resulting PGD that must be set in 698 * the kernel copy of the page tables. 699 */ 700 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 701 { 702 if (!static_cpu_has(X86_FEATURE_PTI)) 703 return pgd; 704 return __pti_set_user_pgtbl(pgdp, pgd); 705 } 706 #else /* CONFIG_PAGE_TABLE_ISOLATION */ 707 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 708 { 709 return pgd; 710 } 711 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 712 713 #endif /* __ASSEMBLY__ */ 714 715 716 #ifdef CONFIG_X86_32 717 # include <asm/pgtable_32.h> 718 #else 719 # include <asm/pgtable_64.h> 720 #endif 721 722 #ifndef __ASSEMBLY__ 723 #include <linux/mm_types.h> 724 #include <linux/mmdebug.h> 725 #include <linux/log2.h> 726 #include <asm/fixmap.h> 727 728 static inline int pte_none(pte_t pte) 729 { 730 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 731 } 732 733 #define __HAVE_ARCH_PTE_SAME 734 static inline int pte_same(pte_t a, pte_t b) 735 { 736 return a.pte == b.pte; 737 } 738 739 static inline int pte_present(pte_t a) 740 { 741 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 742 } 743 744 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 745 static inline int pte_devmap(pte_t a) 746 { 747 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 748 } 749 #endif 750 751 #define pte_accessible pte_accessible 752 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 753 { 754 if (pte_flags(a) & _PAGE_PRESENT) 755 return true; 756 757 if ((pte_flags(a) & _PAGE_PROTNONE) && 758 atomic_read(&mm->tlb_flush_pending)) 759 return true; 760 761 return false; 762 } 763 764 static inline int pmd_present(pmd_t pmd) 765 { 766 /* 767 * Checking for _PAGE_PSE is needed too because 768 * split_huge_page will temporarily clear the present bit (but 769 * the _PAGE_PSE flag will remain set at all times while the 770 * _PAGE_PRESENT bit is clear). 771 */ 772 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 773 } 774 775 #ifdef CONFIG_NUMA_BALANCING 776 /* 777 * These work without NUMA balancing but the kernel does not care. See the 778 * comment in include/linux/pgtable.h 779 */ 780 static inline int pte_protnone(pte_t pte) 781 { 782 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 783 == _PAGE_PROTNONE; 784 } 785 786 static inline int pmd_protnone(pmd_t pmd) 787 { 788 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 789 == _PAGE_PROTNONE; 790 } 791 #endif /* CONFIG_NUMA_BALANCING */ 792 793 static inline int pmd_none(pmd_t pmd) 794 { 795 /* Only check low word on 32-bit platforms, since it might be 796 out of sync with upper half. */ 797 unsigned long val = native_pmd_val(pmd); 798 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 799 } 800 801 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 802 { 803 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 804 } 805 806 /* 807 * Currently stuck as a macro due to indirect forward reference to 808 * linux/mmzone.h's __section_mem_map_addr() definition: 809 */ 810 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 811 812 /* 813 * Conversion functions: convert a page and protection to a page entry, 814 * and a page entry and page directory to the page they refer to. 815 * 816 * (Currently stuck as a macro because of indirect forward reference 817 * to linux/mm.h:page_to_nid()) 818 */ 819 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 820 821 static inline int pmd_bad(pmd_t pmd) 822 { 823 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 824 } 825 826 static inline unsigned long pages_to_mb(unsigned long npg) 827 { 828 return npg >> (20 - PAGE_SHIFT); 829 } 830 831 #if CONFIG_PGTABLE_LEVELS > 2 832 static inline int pud_none(pud_t pud) 833 { 834 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 835 } 836 837 static inline int pud_present(pud_t pud) 838 { 839 return pud_flags(pud) & _PAGE_PRESENT; 840 } 841 842 static inline pmd_t *pud_pgtable(pud_t pud) 843 { 844 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 845 } 846 847 /* 848 * Currently stuck as a macro due to indirect forward reference to 849 * linux/mmzone.h's __section_mem_map_addr() definition: 850 */ 851 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 852 853 #define pud_leaf pud_large 854 static inline int pud_large(pud_t pud) 855 { 856 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 857 (_PAGE_PSE | _PAGE_PRESENT); 858 } 859 860 static inline int pud_bad(pud_t pud) 861 { 862 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 863 } 864 #else 865 #define pud_leaf pud_large 866 static inline int pud_large(pud_t pud) 867 { 868 return 0; 869 } 870 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 871 872 #if CONFIG_PGTABLE_LEVELS > 3 873 static inline int p4d_none(p4d_t p4d) 874 { 875 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 876 } 877 878 static inline int p4d_present(p4d_t p4d) 879 { 880 return p4d_flags(p4d) & _PAGE_PRESENT; 881 } 882 883 static inline pud_t *p4d_pgtable(p4d_t p4d) 884 { 885 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 886 } 887 888 /* 889 * Currently stuck as a macro due to indirect forward reference to 890 * linux/mmzone.h's __section_mem_map_addr() definition: 891 */ 892 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 893 894 static inline int p4d_bad(p4d_t p4d) 895 { 896 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 897 898 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 899 ignore_flags |= _PAGE_NX; 900 901 return (p4d_flags(p4d) & ~ignore_flags) != 0; 902 } 903 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 904 905 static inline unsigned long p4d_index(unsigned long address) 906 { 907 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 908 } 909 910 #if CONFIG_PGTABLE_LEVELS > 4 911 static inline int pgd_present(pgd_t pgd) 912 { 913 if (!pgtable_l5_enabled()) 914 return 1; 915 return pgd_flags(pgd) & _PAGE_PRESENT; 916 } 917 918 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 919 { 920 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 921 } 922 923 /* 924 * Currently stuck as a macro due to indirect forward reference to 925 * linux/mmzone.h's __section_mem_map_addr() definition: 926 */ 927 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 928 929 /* to find an entry in a page-table-directory. */ 930 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 931 { 932 if (!pgtable_l5_enabled()) 933 return (p4d_t *)pgd; 934 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 935 } 936 937 static inline int pgd_bad(pgd_t pgd) 938 { 939 unsigned long ignore_flags = _PAGE_USER; 940 941 if (!pgtable_l5_enabled()) 942 return 0; 943 944 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 945 ignore_flags |= _PAGE_NX; 946 947 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 948 } 949 950 static inline int pgd_none(pgd_t pgd) 951 { 952 if (!pgtable_l5_enabled()) 953 return 0; 954 /* 955 * There is no need to do a workaround for the KNL stray 956 * A/D bit erratum here. PGDs only point to page tables 957 * except on 32-bit non-PAE which is not supported on 958 * KNL. 959 */ 960 return !native_pgd_val(pgd); 961 } 962 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 963 964 #endif /* __ASSEMBLY__ */ 965 966 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 967 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 968 969 #ifndef __ASSEMBLY__ 970 971 extern int direct_gbpages; 972 void init_mem_mapping(void); 973 void early_alloc_pgt_buf(void); 974 extern void memblock_find_dma_reserve(void); 975 void __init poking_init(void); 976 unsigned long init_memory_mapping(unsigned long start, 977 unsigned long end, pgprot_t prot); 978 979 #ifdef CONFIG_X86_64 980 extern pgd_t trampoline_pgd_entry; 981 #endif 982 983 /* local pte updates need not use xchg for locking */ 984 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 985 { 986 pte_t res = *ptep; 987 988 /* Pure native function needs no input for mm, addr */ 989 native_pte_clear(NULL, 0, ptep); 990 return res; 991 } 992 993 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 994 { 995 pmd_t res = *pmdp; 996 997 native_pmd_clear(pmdp); 998 return res; 999 } 1000 1001 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1002 { 1003 pud_t res = *pudp; 1004 1005 native_pud_clear(pudp); 1006 return res; 1007 } 1008 1009 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 1010 pte_t *ptep, pte_t pte) 1011 { 1012 page_table_check_pte_set(mm, addr, ptep, pte); 1013 set_pte(ptep, pte); 1014 } 1015 1016 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1017 pmd_t *pmdp, pmd_t pmd) 1018 { 1019 page_table_check_pmd_set(mm, addr, pmdp, pmd); 1020 set_pmd(pmdp, pmd); 1021 } 1022 1023 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1024 pud_t *pudp, pud_t pud) 1025 { 1026 page_table_check_pud_set(mm, addr, pudp, pud); 1027 native_set_pud(pudp, pud); 1028 } 1029 1030 /* 1031 * We only update the dirty/accessed state if we set 1032 * the dirty bit by hand in the kernel, since the hardware 1033 * will do the accessed bit for us, and we don't want to 1034 * race with other CPU's that might be updating the dirty 1035 * bit at the same time. 1036 */ 1037 struct vm_area_struct; 1038 1039 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1040 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1041 unsigned long address, pte_t *ptep, 1042 pte_t entry, int dirty); 1043 1044 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1045 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1046 unsigned long addr, pte_t *ptep); 1047 1048 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1049 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1050 unsigned long address, pte_t *ptep); 1051 1052 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1053 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1054 pte_t *ptep) 1055 { 1056 pte_t pte = native_ptep_get_and_clear(ptep); 1057 page_table_check_pte_clear(mm, addr, pte); 1058 return pte; 1059 } 1060 1061 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1062 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1063 unsigned long addr, pte_t *ptep, 1064 int full) 1065 { 1066 pte_t pte; 1067 if (full) { 1068 /* 1069 * Full address destruction in progress; paravirt does not 1070 * care about updates and native needs no locking 1071 */ 1072 pte = native_local_ptep_get_and_clear(ptep); 1073 page_table_check_pte_clear(mm, addr, pte); 1074 } else { 1075 pte = ptep_get_and_clear(mm, addr, ptep); 1076 } 1077 return pte; 1078 } 1079 1080 #define __HAVE_ARCH_PTEP_CLEAR 1081 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 1082 pte_t *ptep) 1083 { 1084 if (IS_ENABLED(CONFIG_PAGE_TABLE_CHECK)) 1085 ptep_get_and_clear(mm, addr, ptep); 1086 else 1087 pte_clear(mm, addr, ptep); 1088 } 1089 1090 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1091 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1092 unsigned long addr, pte_t *ptep) 1093 { 1094 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1095 } 1096 1097 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 1098 1099 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1100 1101 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1102 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1103 unsigned long address, pmd_t *pmdp, 1104 pmd_t entry, int dirty); 1105 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1106 unsigned long address, pud_t *pudp, 1107 pud_t entry, int dirty); 1108 1109 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1110 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1111 unsigned long addr, pmd_t *pmdp); 1112 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1113 unsigned long addr, pud_t *pudp); 1114 1115 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1116 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1117 unsigned long address, pmd_t *pmdp); 1118 1119 1120 #define pmd_write pmd_write 1121 static inline int pmd_write(pmd_t pmd) 1122 { 1123 return pmd_flags(pmd) & _PAGE_RW; 1124 } 1125 1126 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1127 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1128 pmd_t *pmdp) 1129 { 1130 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1131 1132 page_table_check_pmd_clear(mm, addr, pmd); 1133 1134 return pmd; 1135 } 1136 1137 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1138 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1139 unsigned long addr, pud_t *pudp) 1140 { 1141 pud_t pud = native_pudp_get_and_clear(pudp); 1142 1143 page_table_check_pud_clear(mm, addr, pud); 1144 1145 return pud; 1146 } 1147 1148 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1149 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1150 unsigned long addr, pmd_t *pmdp) 1151 { 1152 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1153 } 1154 1155 #define pud_write pud_write 1156 static inline int pud_write(pud_t pud) 1157 { 1158 return pud_flags(pud) & _PAGE_RW; 1159 } 1160 1161 #ifndef pmdp_establish 1162 #define pmdp_establish pmdp_establish 1163 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1164 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1165 { 1166 page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd); 1167 if (IS_ENABLED(CONFIG_SMP)) { 1168 return xchg(pmdp, pmd); 1169 } else { 1170 pmd_t old = *pmdp; 1171 WRITE_ONCE(*pmdp, pmd); 1172 return old; 1173 } 1174 } 1175 #endif 1176 /* 1177 * Page table pages are page-aligned. The lower half of the top 1178 * level is used for userspace and the top half for the kernel. 1179 * 1180 * Returns true for parts of the PGD that map userspace and 1181 * false for the parts that map the kernel. 1182 */ 1183 static inline bool pgdp_maps_userspace(void *__ptr) 1184 { 1185 unsigned long ptr = (unsigned long)__ptr; 1186 1187 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1188 } 1189 1190 #define pgd_leaf pgd_large 1191 static inline int pgd_large(pgd_t pgd) { return 0; } 1192 1193 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1194 /* 1195 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1196 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1197 * the user one is in the last 4k. To switch between them, you 1198 * just need to flip the 12th bit in their addresses. 1199 */ 1200 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1201 1202 /* 1203 * This generates better code than the inline assembly in 1204 * __set_bit(). 1205 */ 1206 static inline void *ptr_set_bit(void *ptr, int bit) 1207 { 1208 unsigned long __ptr = (unsigned long)ptr; 1209 1210 __ptr |= BIT(bit); 1211 return (void *)__ptr; 1212 } 1213 static inline void *ptr_clear_bit(void *ptr, int bit) 1214 { 1215 unsigned long __ptr = (unsigned long)ptr; 1216 1217 __ptr &= ~BIT(bit); 1218 return (void *)__ptr; 1219 } 1220 1221 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1222 { 1223 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1224 } 1225 1226 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1227 { 1228 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1229 } 1230 1231 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1232 { 1233 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1234 } 1235 1236 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1237 { 1238 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1239 } 1240 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1241 1242 /* 1243 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1244 * 1245 * dst - pointer to pgd range anywhere on a pgd page 1246 * src - "" 1247 * count - the number of pgds to copy. 1248 * 1249 * dst and src can be on the same page, but the range must not overlap, 1250 * and must not cross a page boundary. 1251 */ 1252 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1253 { 1254 memcpy(dst, src, count * sizeof(pgd_t)); 1255 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1256 if (!static_cpu_has(X86_FEATURE_PTI)) 1257 return; 1258 /* Clone the user space pgd as well */ 1259 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1260 count * sizeof(pgd_t)); 1261 #endif 1262 } 1263 1264 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1265 static inline int page_level_shift(enum pg_level level) 1266 { 1267 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1268 } 1269 static inline unsigned long page_level_size(enum pg_level level) 1270 { 1271 return 1UL << page_level_shift(level); 1272 } 1273 static inline unsigned long page_level_mask(enum pg_level level) 1274 { 1275 return ~(page_level_size(level) - 1); 1276 } 1277 1278 /* 1279 * The x86 doesn't have any external MMU info: the kernel page 1280 * tables contain all the necessary information. 1281 */ 1282 static inline void update_mmu_cache(struct vm_area_struct *vma, 1283 unsigned long addr, pte_t *ptep) 1284 { 1285 } 1286 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1287 unsigned long addr, pmd_t *pmd) 1288 { 1289 } 1290 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1291 unsigned long addr, pud_t *pud) 1292 { 1293 } 1294 1295 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1296 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1297 { 1298 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1299 } 1300 1301 static inline int pte_swp_soft_dirty(pte_t pte) 1302 { 1303 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1304 } 1305 1306 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1307 { 1308 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1309 } 1310 1311 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1312 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1313 { 1314 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1315 } 1316 1317 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1318 { 1319 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1320 } 1321 1322 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1323 { 1324 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1325 } 1326 #endif 1327 #endif 1328 1329 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1330 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1331 { 1332 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1333 } 1334 1335 static inline int pte_swp_uffd_wp(pte_t pte) 1336 { 1337 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1338 } 1339 1340 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1341 { 1342 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1343 } 1344 1345 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1346 { 1347 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1348 } 1349 1350 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1351 { 1352 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1353 } 1354 1355 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1356 { 1357 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1358 } 1359 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1360 1361 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1362 { 1363 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1364 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1365 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1366 #else 1367 return 0; 1368 #endif 1369 } 1370 1371 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1372 { 1373 u32 pkru = read_pkru(); 1374 1375 if (!__pkru_allows_read(pkru, pkey)) 1376 return false; 1377 if (write && !__pkru_allows_write(pkru, pkey)) 1378 return false; 1379 1380 return true; 1381 } 1382 1383 /* 1384 * 'pteval' can come from a PTE, PMD or PUD. We only check 1385 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1386 * same value on all 3 types. 1387 */ 1388 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1389 { 1390 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1391 1392 if (write) 1393 need_pte_bits |= _PAGE_RW; 1394 1395 if ((pteval & need_pte_bits) != need_pte_bits) 1396 return 0; 1397 1398 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1399 } 1400 1401 #define pte_access_permitted pte_access_permitted 1402 static inline bool pte_access_permitted(pte_t pte, bool write) 1403 { 1404 return __pte_access_permitted(pte_val(pte), write); 1405 } 1406 1407 #define pmd_access_permitted pmd_access_permitted 1408 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1409 { 1410 return __pte_access_permitted(pmd_val(pmd), write); 1411 } 1412 1413 #define pud_access_permitted pud_access_permitted 1414 static inline bool pud_access_permitted(pud_t pud, bool write) 1415 { 1416 return __pte_access_permitted(pud_val(pud), write); 1417 } 1418 1419 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1420 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1421 1422 static inline bool arch_has_pfn_modify_check(void) 1423 { 1424 return boot_cpu_has_bug(X86_BUG_L1TF); 1425 } 1426 1427 #define arch_faults_on_old_pte arch_faults_on_old_pte 1428 static inline bool arch_faults_on_old_pte(void) 1429 { 1430 return false; 1431 } 1432 1433 #endif /* __ASSEMBLY__ */ 1434 1435 #endif /* _ASM_X86_PGTABLE_H */ 1436